JPH06105513B2 - Tracking controller - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a tracking control device, and in particular, cyclically applies pilot signals of different frequencies to recording tracks formed in order on a recording medium so as to cross the traveling direction. Tracking with an automatic track following method (hereinafter referred to as ATF method) that records the video signal together with the video signal and detects the frequency difference of the pilot signals reproduced from the tracks adjacent to each other during reproduction to cause the reproduction head to track to a predetermined track. It is suitable for application to a control device.

[Background technology and its problems]

As this ATF type tracking control device, a four-frequency type control device having a structure shown in FIG. 1 in which four types of pilot signals of frequencies f _{1 to} f ₄ are sequentially recorded in a recording track has been proposed. In this case, a part of the reproduced video signal S1 of the rotary video head as the recording / reproducing head is received by the pilot signal detecting circuit 1 of the low pass filter and the reproduction output of the pilot signal recorded on the magnetic tape as the recording medium is used as a component. A reproduction pilot signal S2 is generated and the reproduction pilot signal S2 is supplied to the error signal forming circuit 3. The error signal forming circuit 3 sends out a tracking error signal S3 formed under the control of the reference pilot signal forming circuit 4.

As shown in FIG. 2, on the tape 5, four video tracks T in which a plurality of, for example, four types of pilot signals f ₁ , f ₂ , f ₃ , f ₄ having different frequencies are recorded together with the video signal are recorded.
The set of 1, T2, T3, T4 is formed obliquely and closely so as to repeat cyclically in sequence. Here, the effective width of the video head constituting the recording / reproducing head 6 is selected to be, for example, a value substantially equal to the width of the tracks T1 to T4, whereby the reproducing head 6 is currently reproducing and scanning as shown by the solid line in FIG. When correctly tracking an existing track (this is called a reproduction track), by reproducing only the pilot signal recorded in the track, the reproduction frequency component contained in the reproduction output becomes one kind, while the broken line As shown in the figure, when the head 6 is in the right-shifted or left-shifted state with respect to the track, the pilot signal recorded in the track adjacent to the right or left side of the playback track is also included in the playback output. There are two types of pilot frequency components, and the magnitude of each pilot frequency component corresponds to the corresponding track. And the length of the reproduction heads facing each other is set to be the same.

However, the frequencies f _{1 to} f ₄ of the four types of pilot signals are selected in the lower band of the color components converted to the low frequency range (600 to 700 [kHz]), and the four tracks T1 to T4 that circulate have odd numbers, for example. The frequency difference with the pilot signal of the right track is Δf _A , and the frequency difference with the pilot signal of the left track is Δf _B , centered around the numbered tracks T1 and T3. frequency difference between the pilot signal of the right track and the track T2, T4 at the center frequency difference between the pilot signal of Delta] f _B next and left track, have been made so that Delta] f _a.

Therefore, when the head 6 is reproducing odd-numbered tracks T1 and T3, if there is a signal component with a frequency difference Δf _A as the frequency component of the pilot signal included in the reproduction signal, the head 6
Is right-shifted, and if there is a signal component with a frequency difference of Δf _B , it is known that the head 6 is left-shifted, and if there is no signal component with a frequency difference of Δf _A and Δf _B , You can see that it is tracked correctly.

Similarly, when the head 6 is reproducing the even-numbered tracks T2 and T4, if there is a signal component with a frequency difference Δf _B as the frequency component of the pilot signal included in the reproduced signal, the head 6 is in the right shift state. And the frequency difference is Δ
If there is a signal component of f _A , it can be seen that the head 6 is in a left-shifted state.

In the case of this embodiment, the first, second, third and fourth tracks T1, T2,
The frequencies f ₁ , f ₂ , f ₃ , f ₄ assigned to T3 and T4 are f ₁ = 10
2 [kHz], f ₂ = 118 [kHz], f ₃ = 164 [kHz], f ₄ = 148
[KHz], therefore the difference frequencies Δf _A and Δf _B are Δf _A = | f ₁ −f ₂ | = | f ₃ −f ₄ | = 16 [kHz] (1) Δf _B = | f ₂ −f ₃ | = | f ₄ −f ₁ | = 46 [kHz] …… It is selected as (2).

Reproduced signal with such contents obtained from head 6
S1 is a pilot signal detection circuit 1 with a low-pass filter configuration
And a reproduction pilot signal S2 obtained by extracting the pilot signal contained in the reproduction signal S1
Given as a multiplication input for. The reference pilot signal S11 of the reference pilot signal forming circuit 4 is supplied to the multiplication circuit 14 as a second multiplication input.

The reference pilot signal forming circuit 4 scans a tape of two video heads in association with a pilot signal generating circuit 16 for generating four pilot frequency outputs of frequencies f _{1 to} f ₄ and a rotating drum (not shown). Switch circuit 17 which receives a head switching pulse RF-SW for changing the logic level each time the head is switched. In the case of this embodiment, the switch circuit 17 outputs the head switching pulse RF-SW. It has a divider circuit to divide The 1st to 4th tracks T1 to T4 are controlled by the 2-bit switch control signal consisting of the frequency division output and the head switching pulse RF-SW.
It has been made to deliver a reference pilot signal S11 sequentially selects pilot signals f ₁ ~f ₄ corresponding to.

In this way, the head 6 is the first to fourth tracks T1.
The reference pilot signal S11 generated in synchronism with the relevant reproduction track is added to the reproduction pilot signal S2 obtained at the output end of the pilot signal detection circuit 1 during scanning of each of .about.T4.
By multiplying by, a multiplication calculation force S12 including a signal component having a frequency difference between the frequency component contained in the reproduction pilot signal S2 when there is a tracking error and the frequency of the reference pilot signal S11 is obtained (actually Slip calculation power S
12 also includes other signal components such as the sum frequency component). The multiplication calculation force S12 is the first composed of a bandpass filter and a rectifying circuit connected to the output end of the bandpass filter.
And second difference frequency detection circuits 20 and 21. Thus, the first difference frequency detection circuit 20 extracts and rectifies the signal component of the difference frequency Δf _A based on the above equation (1) when the multiplying force S12 contains the first error detection signal of the DC level. Send S13. In the same manner, the second difference frequency detection circuit 21 extracts and rectifies the signal component of the difference frequency Δf _B based on the above equation (2) when the multiplication calculation force S12 includes the second component of the DC level. The error detection signal S14 is transmitted.

Here, the reference pilot signal S11 is sequentially frequency _{f 1, f 2, f 3} , f 4
At the timing of switching to the head, the head 6 moves to the tracks T1, T
If it is shifted to the right with respect to 2, T3 and T4, the reproduced video signal S1 of the head 6 is reproduced at frequencies f ₁ and f ₂ , f ₂ and f ₃ , f ₃ and f ₄ , f ₄ and f ₁ , respectively. As a result, the pilot signal component is included, and as a result, the multiplying force S12 is sequentially added to the difference frequency component Δf.
_A (= f _{1 to} f ₂ ), Δf _B (= f _{2 to} f ₃ ), Δf _A (= f ₃ to
f ₄ ) and Δf _B (= f _{4 to} f ₁ ) are included. When head 6 conversely is shifted to the left, the reference pilot signal S11 is sequentially frequency f _1, f _2, f _3, respectively, at the frequency f ₄ and f ₁ the reproduced video signal S1 at the timing of f _4, f ₁ and f ₂ , f ₂ and f ₃ ,
Since the reproduction pilot signal components of f ₃ and f ₄ are included, the difference frequency component Δf _B is sequentially added to the multiplication calculation force S12 accordingly.
(= F _{4 to} f ₁ ), Δf _A (= f _{1 to} f ₂ ), Δf _B (= f _{2 to} f ₃ ),
Δf _A (= f _{3 to} f ₄ ) is sequentially included. On the other hand, when the head 6 enters the just tracking state, the frequencies of the reproduction video signal S1 and the reproduction pilot signal S2 are sequentially changed.
Since there are f ₁ , f ₂ , f ₃ , and f ₄ , the frequency difference component does not occur in the multiplication calculation force S12.

Therefore, the reference pilot signal S11 is sequentially frequency f ₁ , f ₂ ,
If the head 6 is in the just tracking state when switching to f ₃ and f ₄ , the Δf _A and Δf _B difference frequency detection circuit 20
The levels of the error detection signals S13 and S14 of 21 and 21 become zero. On the other hand, if the head 6 shifts to the right or to the left, the error detection signals S13 and S14 of the Δf _A and Δf _B difference frequency detection circuits 20 and 21 are alternately changed from 0 level to a level corresponding to the amount of deviation. There is a change, and the timing of the change is in the opposite phase with respect to the right shift or the left shift.

After being subtracted in this Delta] f _A and Delta] f _B difference error detection signal S13 and the subtraction circuit is applied to the error signal forming circuit 22 S14 in the frequency detection circuit 20 and 21, head switching signal RF-SW
Is used as a timing signal, the tracking error signal becomes 0 level in the just tracking state, and becomes a positive level when in the right shift state and becomes a negative level when in the left shift state. Form S3. Therefore, if this tracking error signal S3 is used as a correction signal in the phase servo circuit of the capstan servo loop, if it is corrected so that the tape running speed is slowed when the tape is positive and increased when the tape is negative, the video head and playback are performed. The phase shift with the track can be corrected, and thus the correct ATF tracking servo can be realized.

In the above-described principle configuration, the principle has been described that the difference frequency component does not occur at the output end of the multiplication circuit 14 when the head 6 correctly tracks to each track. However, in reality, even in this tracking state, the reproduction signal S1 of the head is reproduced. Produces a pilot signal for adjacent tracks on the left and right sides.

That is, in practice, when a guard band is not provided between tracks at the time of recording, the tracks to be newly recorded in the recording mode are sequentially recorded so as to partially overlap with the already recorded adjacent tracks. Therefore, in this case, the width of the head 6 is larger than the width of each of the tracks T1 to T4, so that the head 6 protrudes to the tracks adjacent to the left side and the right side when properly tracked. Accordingly, since the head 6 reproduces the pilot signals of the tracks adjacent to the left and right sides, the error detection signals S13 and S14 corresponding to the signal component of the difference frequency having a size corresponding to the protruding length, the difference frequency detection circuit 20 and twenty one
Arises from.

When a guard band is provided, the width of the head 6 is almost equal to the width of the track, but the pilot signals recorded on the tracks adjacent to the left and right sides are mixed as crosstalk signals in the reproduced signal of the head 6. To do. Therefore, the error detection signals S13 and S14 include the signal component of the difference frequency corresponding to the crosstalk signal.

However, since the pilot signal mixed in the reproduction output S1 of the head 6 from the adjacent track is simultaneously generated as the signal components of the difference frequencies Δf _A and Δf _B at the output end of the multiplication circuit 14, the error detection signals S13 and S14 are generated. The subtraction circuits 24 provided in the error signal forming circuit 22 cancel each other when subtracting each other. Moreover, when the head 6 is properly tracked, the head 6 is located symmetrically with respect to the tracks adjacent to the left side and the right side. Therefore, the protruding lengths of the head 6 are almost equal to each other in the left-right direction, and the crosstalk size is almost the same. The left and right phases are equal, and the content of the error signal S3 is equivalent to the above-mentioned case in which the width of the head 6 is considered to be almost equal to the width of the track. Therefore, crosstalk does not adversely affect the component of the difference frequency that occurs simultaneously from the adjacent tracks on both sides.

Although the components used in the reproduction mode have been described above, in the recording mode, the reference pilot signal S11 obtained at the output end of the switch circuit 17 is sent to the video head 6 as the recording pilot signal S4 via the signal line 18. Thus, the video head 6 has the first to fourth tracks T1.
Scanning the ~T4 applied to progressive video head 6 pilot signal of frequency f ₁ ~f ₄ corresponding between it and the track T1~
It is designed to be recorded by T4.

As described above, according to the tracking control device having the configuration shown in FIG. 1, it is possible to obtain the just tracking state in which the head is always tracked to the predetermined track in the just tracked state, but the VTR operation is performed. The mode is not limited to the normal recording and reproducing mode, but it is in the variable speed reproducing mode, the part where the signal is not recorded on the tape and the part is scanned in the reproducing mode, or the pilot signal is recorded. There is a possibility of various operating states such as a state of reproducing a tape which has not been reproduced.

Even in such various states, it is desirable for the VTR to be configured so that the tracking servo can always be applied. By the way, if this is not done, the tape running state during playback cannot be controlled, so the tape may run out of control, or it may lock up at an unplanned tape running phase, which is still a sufficient function for an ATF tracking controller. I can't say that I have.

[Object of the Invention]

The present invention has been made in consideration of the above points, and when the VTR enters an operation mode of various modes, the reference pilot signal corresponding to the operation mode is surely generated so that the ATF tracking can be performed. This is to ensure that the servo can be operated.

[Outline of Invention]

To achieve such an object, in the present invention, a pilot signal generating circuit is provided which obtains the reference pilot signal by dividing the input clock signal, and is inserted in the recording or reproducing video signal as the input clock signal. A first clock signal obtained based on the synchronizing signal and a second clock signal which is a frequency signal generated from a frequency signal oscillator independently of the synchronizing signal are switched by a clock switching circuit to be given.

〔Example〕

An embodiment of the present invention will be described in detail below with reference to FIG. 3 in which parts corresponding to those in FIG. In this case, the reference pilot signal forming circuit 4 comprises a pilot signal generating circuit 31 having a variable frequency dividing circuit, and the first and second clock signals CL ₁ and CL ₂ are used as the clock input CL to the variable frequency dividing circuit. It is given through 32 switching terminals a1 and a2. The pilot signal generating circuit 31 has a head switching signal RF-
It receives SW and divides this by 1/2, and this head switching signal RF-S
W and its 1/2 frequency division output are used as frequency division command signals of 2 bits to obtain four kinds of frequencies f _{1 to} f ₄ . Incidentally with selecting the frequency of the clock signal CL to 375f _H, respectively "dividing ratio" Yotsute to setting the "reference pilot signal to the logic level of, as shown in FIG. 4," division command signal " S11 in the frequency "a are made to be able to change in synchronism with the sequential head switching signal RF-SW to f ₁ ~f _4.

Here, the first clock signal CL ₁ is transmitted through the recording side terminal R of the recording / playback switching circuit 34 in the recording mode to the recording synchronization signal SY ₁
And a reproduction synchronization signal SY ₂ through the reproduction side terminal P of the recording / reproduction switching circuit 34 in the reproduction mode. Here, the recording synchronization signal SY ₁ is applied as a frequency signal of 375 f _H by multiplying the horizontal synchronization signal inserted in the video signal in the recording mode, and the reproduction synchronization signal SY ₂ is supplied in the reproduction mode carrier color signal reproduction circuit 40. The horizontal synchronizing signal obtained by separating from the reproduction luminance signal is multiplied and given as a frequency signal of frequency 375f _H.

On the other hand, the oscillation output from the crystal oscillator 50 having an oscillation frequency of 375f _H is given to the terminal a2 of the clock switching circuit 32 as the second clock signal CL ₂ .

The carrier color signal reproduction circuit 40 converts the reproduction reduction conversion color signal S22 (frequency f _S = 688 [KHz]) into the carrier color signal S23 (frequency f _C = 3.58 [MHz]) in the frequency conversion circuit 41.
The burst signal S24 extracted from the carrier color signal S23 in the burst sampling circuit 42 is compared with the output of the crystal oscillator 44 (oscillation frequency = 3.58 [MHz]) in the phase comparison circuit 43, and the voltage control type crystal is detected by the difference signal. The oscillation frequency of the oscillator 45 is controlled to match the frequency of the oscillation output S25 with the frequency f _{C of the} oscillator 44. On the other hand, a horizontal synchronizing signal S27 (frequency f _H ) separated from the reproduction luminance signal S26 by the horizontal synchronizing separation circuit 46 is given to the PLL multiplication circuit 47, and the frequency of its output S28 is changed to the frequency f _{S of the} reproduction low frequency conversion color signal S22. Frequency is multiplied so that. This output S28 is given to the frequency conversion circuit 48 together with the output S25 of the oscillation circuit 45, and the sum frequency f _C
A frequency output S29 having a frequency of + f _S (= 4.27 [MHz]) is given to the frequency conversion circuit 41 as a conversion input.

According to the carrier color signal reproducing circuit 40 having such a configuration, the frequency of the carrier color signal S23 is set to the frequency of the output of the oscillator 44 (= 3.58 [MH
z)) can be stably drawn in, and the color lock can be made more stable by obtaining the conversion frequency of the frequency conversion circuit 41 based on the horizontal synchronizing signal S27 included in the reproduction luminance signal S26. it can.

Here, in addition to the above operation, the PLL multiplication circuit 47 multiplies the frequency f _H of the reproduction horizontal synchronization signal S27 by 375 times to reproduce the reproduction synchronization signal SY.
₂ is formed, and this is supplied as a first clock signal CL1 through the terminal P of the recording / reproducing switching circuit 34 to the clock switching circuit 32.
Give to.

In the configuration of FIG. 3, the reference pilot signal S11 sent from the pilot signal generating circuit 31 is always reliably generated by selecting the clock switching circuit 32 and the recording / reproducing switching circuit 34 according to the operation mode of the VTR. be able to. First, in the recording mode, when a synchronizing signal is inserted to the luminance signal and the chrominance signal to record on the tape (in the normal recording mode), the recording / reproducing switching circuit 34 is switched to the recording side terminal R and Connect the clock switching circuit 32 to terminal a1.
Switch to the side. In this way, the recording synchronization signal SY _{1 is used} as the clock signal CL for the pilot signal generation circuit 31.
Is supplied through the switching circuits 34 and 32, the pilot signal generating circuit 31 synchronizes with the head switching signal RF-SW and the head 6 sequentially scans the tracks T1 to T4.
So that the frequency in synchronization with this it is possible to record a predetermined pilot signal to the corresponding track T1~T4 by sending pilot signal S4 obtained by sequentially changing the f ₁ ~f ₄ via the recording signal line 18 .

Second, in the VTR recording mode, for example, RF sweep is performed when measuring the reproduction characteristics at the time of factory shipment or at the time of service (the reproduction characteristics are measured by experimentally recording and reproducing a plurality of carrier frequencies of no signal). In such a case, the sync signal may not be inserted in the recording signal.
In this case, the clock switching circuit 32 is switched to the terminal a2 side.
Thus, the clock signal C which is the output CL2 of the crystal oscillator 50
L is supplied to the pilot signal generating circuit 31 through the clock switching circuit 32. Accordance connexion sent via the recording signal line 18 a pilot signal S4 pilot signal generating circuit 31 is frequency changes to f ₁ ~f ₄ based on the clock signal CL ₂ of fixed frequency 375F _H in the oscillator 50 in this case Thus, since the pilot signal can be recorded on the tape, the ATF servo operation can be surely performed during reproduction.

Thirdly, in the state where the VTR is in the reproduction mode, when the ATF tracking is performed while the normal reproduction, that is, the pilot signal recorded in each track at the normal speed is reproduced, the clock switching circuit 32 is switched to the contact a1 side. At the same time, the recording / reproducing switching circuit 34 is switched to the reproducing side terminal P side. In this way, the pilot signal generating circuit 31 is provided with the clock signal CL obtained on the basis of the reproduction synchronizing signal SY ₂ obtained by multiplying the reproduction synchronizing signal S27 included in the reproduction luminance signal S26, and thus the pilot signal is generated. Generator circuit
31 can provide a reference pilot signal S11 having a commensurate ivy frequency f ₁ ~f ₄ to the tape speed during reproduction to the error signal forming circuit 3. Therefore, since the frequency difference of the difference frequency signal component obtained in the multiplication circuit 14 surely becomes the predetermined values Δf _A and Δf _B , the levels of the error detection signals S13 and S14 surely correspond to the deviation amount of the head with respect to the track. Therefore, ATF tracking can be performed with high accuracy.

Fourth, when the VTR performs variable speed reproduction such as high speed reproduction or slow reproduction, the clock switching circuit 32 is switched to the terminal a1 side and the recording / reproducing circuit 34 is switched to the terminal P side. In this way, when the frequency of the reproduction synchronization signal SY ₂ obtained from the PLL multiplication circuit 47 changes due to the tape speed varying, the tape is supplied to the pilot signal generation circuit 31 in the same manner as described above for the normal reproduction mode. The frequency of the clock signal CL also changes. Therefore, since the pilot signal generation circuit 31 can shift the frequencies f _{1 to} f ₄ of the reference pilot signal S11 according to the tape speed, the difference frequency detection circuit
It is possible to prevent the output S13 and S14 of 20 and 21 from causing an error due to a change in tape speed. By the way, if the tape speed changes, the frequency of the reproduction pilot signal S2 included in the reproduction video signal S1 also shifts, but by shifting the frequency of the reference pilot signal S11, the error generated in the error detection signals S13 and S14 is canceled. You can do it.

Fifthly, when the VTR is reproducing the tape portion in which the signal is not recorded to the signal recording portion in which the synchronizing signal is inserted, the clock switching circuit 32 is switched to the terminal a2 side in advance. . At this time, the pilot signal generation circuit 31
A fixed-frequency clock signal CL ₂ is applied as a clock CL from the oscillator 50 to the reference pilot signal S11.
Is sent stably. Therefore, the tape is stably controlled by ATF tracking by the reproduction pilot signal S2 contained in the reproduction video signal S1, and thus stable so as not to become a pseudo lock state when the mode is transferred from the non-recorded portion to the recorded portion. You can switch modes. Here, the pseudo-lock state is a tracking control state in which the scanning position of the head is shifted by two tracks and the tracking error signal S3 becomes 0, or the tracking error signal S3 is shifted when the scanning position of the head is displaced. When the change curve of (1) is disturbed and a small unevenness is partially formed, it means that a tracking control state is reached in which a tracking error signal is not output from the recessed portion. In this case, the clock switching circuit 32 may be switched to the contact a1 side after entering the signal portion where the synchronizing signal is inserted.

Sixth, when the pass tone is obtained by the VTR (that is, in the adjustment mode in which the contact between the magnetic head and the magnetic tape is improved by adjusting the tape guide), the clock switching circuit 32 is switched to the terminal a2 side. By the way, since the playback synchronization signal SY ₂ cannot be stably obtained because the head and the tape are not sufficiently hit in the pass adjustment, the fixed frequency oscillation output CL ₂ is used to obtain the clock signal CL. Thus, in this case as well, the tape can be stably ATF tracked.

〔The invention's effect〕

As described above, according to the present invention, the clock signal CL for the pilot signal generating circuit 31 is inserted into the video signal in accordance with various operation modes, adjustment modes, or states of signals recorded in the recording track that the VTR can take. It is possible to easily obtain a stable ATF by selecting whether to obtain the signal according to the synchronization signal or from a fixed frequency oscillator.
You can get a tracking servo.

[Brief description of drawings]

FIG. 1 is a block diagram showing the basic structure of the ATF tracking control device, FIG. 2 is a schematic diagram showing the recording pattern of the tape, FIG. 3 is a block diagram showing the tracking control device according to the present invention, and FIG. 6 is a chart showing the configuration of the reference pilot signal generation circuit. 1 ... Pilot signal detection circuit, 3 ... Error signal formation circuit, 4 ... Reference pilot signal formation circuit, 31 ... Pilot signal generation circuit, 32 ... Clock switching circuit, 34 ... Record / reproduction switching circuit, 40 ... Carrier color signal reproduction Circuit, 46 ... Horizontal sync separation circuit, 47 ... PLL multiplication circuit.

 ─────────────────────────────────────────────────── ─── Continuation of front page (56) Reference JP-A-56-34136 (JP, A) JP-A-59-223970 (JP, A) JP-A-59-207452 (JP, A) JP-A-59- 191166 (JP, A) JP 57-99086 (JP, A) JP 59-75450 (JP, A) JP 4-21395 (JP, B2) JP 1-54786 (JP, B2) Japanese Patent Publication Hei 3-15242 (JP, B2) Japanese Patent Sho 64-5374 (JP, B2) Japanese Patent Sho 59-31795 (JP, B2)

Claims (1)

[Claims] 1. A recording pilot signal whose frequency changes cyclically in sequence is recorded in a recording track, and when reproducing the recording track, the frequency is sequentially cyclically reproduced with respect to a reproduction pilot signal obtained by reproducing the pilot signal. In the tracking control device adapted to control the tracking position of the reproduction head by multiplying the changing reference pilot signal and detecting the difference frequency component generated in the multiplication calculation force, the input clock signal is divided. A pilot signal generating circuit for generating the reference pilot signal, and in the first case of the recording mode, a first clock signal obtained on the basis of a synchronizing signal related to the recording video signal is sent as the input clock signal, and the reproduction mode is set. In the second case of, the second clock obtained based on the synchronization signal inserted in the reproduced video signal. In the third case, a clock signal is sent as the input clock signal and a video signal not including a sync signal is recorded or reproduced, or the sync signal inserted in the reproduced video signal cannot be stably reproduced. And a clock signal switching circuit for transmitting a third clock signal, which is a frequency signal generated from a signal generator, as the input clock signal.