JPH06104737A - 論理回路の間にプログラム可能な相互接続経路を設けるための装置および方法 - Google Patents
論理回路の間にプログラム可能な相互接続経路を設けるための装置および方法Info
- Publication number
- JPH06104737A JPH06104737A JP5149198A JP14919893A JPH06104737A JP H06104737 A JPH06104737 A JP H06104737A JP 5149198 A JP5149198 A JP 5149198A JP 14919893 A JP14919893 A JP 14919893A JP H06104737 A JPH06104737 A JP H06104737A
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- power supply
- programmable
- voltage level
- supply voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 238000000034 method Methods 0.000 title claims description 16
- 238000009434 installation Methods 0.000 title 1
- 239000003990 capacitor Substances 0.000 claims abstract description 7
- 230000010355 oscillation Effects 0.000 claims abstract description 3
- 239000000470 constituent Substances 0.000 abstract 1
- 239000000758 substrate Substances 0.000 description 13
- 230000008569 process Effects 0.000 description 5
- 230000015556 catabolic process Effects 0.000 description 4
- 238000006731 degradation reaction Methods 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 230000003071 parasitic effect Effects 0.000 description 2
- 230000009467 reduction Effects 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 230000001668 ameliorated effect Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000002301 combined effect Effects 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 101150031507 porB gene Proteins 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
- H03K19/17736—Structural details of routing resources
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/06—Modifications for ensuring a fully conducting state
- H03K17/063—Modifications for ensuring a fully conducting state in field-effect transistor switches
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
- H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
- H03K19/1778—Structural details for adapting physical parameters
Landscapes
- Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Logic Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US90235792A | 1992-06-22 | 1992-06-22 | |
| US902357 | 1992-06-22 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH06104737A true JPH06104737A (ja) | 1994-04-15 |
Family
ID=25415751
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5149198A Withdrawn JPH06104737A (ja) | 1992-06-22 | 1993-06-21 | 論理回路の間にプログラム可能な相互接続経路を設けるための装置および方法 |
Country Status (3)
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9246492B1 (en) * | 2015-06-24 | 2016-01-26 | Xilinx, Inc. | Power grid architecture for voltage scaling in programmable integrated circuits |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4481566A (en) * | 1983-04-04 | 1984-11-06 | International Business Machines Corporation | On chip charge trap compensated high voltage converter |
| NL8800287A (nl) * | 1988-02-08 | 1989-09-01 | Philips Nv | Geheugenschakeling met een uitwisbaar programmeerbaar geheugen, generator voor het opwekken van een programmeerspanning voor het geheugen, spanningsregelaar en flankregelaar, beide geschikt voor toepassing in de generator, en een diode-element. |
| JPH0654873B2 (ja) * | 1989-09-04 | 1994-07-20 | 株式会社東芝 | プログラマブル型論理装置 |
-
1992
- 1992-12-03 TW TW81109692A patent/TW229341B/zh active
-
1993
- 1993-05-27 EP EP93304113A patent/EP0581420A1/en not_active Withdrawn
- 1993-06-21 JP JP5149198A patent/JPH06104737A/ja not_active Withdrawn
Also Published As
| Publication number | Publication date |
|---|---|
| TW229341B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1994-09-01 |
| EP0581420A1 (en) | 1994-02-02 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A300 | Withdrawal of application because of no request for examination |
Free format text: JAPANESE INTERMEDIATE CODE: A300 Effective date: 20000905 |