JPH06101809B2 - Vertical contour correction circuit - Google Patents

Description

Description: TECHNICAL FIELD OF THE INVENTION The present invention relates to a vertical contour correction circuit for an image obtained by a progressive scan conversion process for improving the definition accompanying an increase in image quality, and in particular, an interpolation error due to field interpolation. The present invention relates to a vertical contour correction circuit with reduced interference with an image based on.

[Technical Background of the Invention and Problems to be Solved]

Conventionally, interlace scanning has been adopted as a scanning method for video signals in TV receivers and VTRs in order to reduce screen flicker.

In this method, as shown in FIG. 4A, instead of scanning every other scanning line to reduce the pixel density in the vertical direction, the field frequency is doubled. In this interlaced scanning, one complete picture (frame) is scanned by the first field and the second field. Therefore, in the case of NTSC system, the number of scanning lines in one field is
The number is 262.5 and the number of screens is 30 / sec.

As described above, in the interlaced scanning, the pixel density (the number of scanning lines) in the vertical direction per screen is lowered, so the scanning becomes rough and the gap between the scanning lines becomes conspicuous. The larger the screen, the more noticeable the screen becomes and the more difficult the screen is to see.

Therefore, in order to eliminate the deterioration of the pixel density in the vertical direction due to the above-mentioned interlaced scanning, IDTV (Improved Difinition TV) or the like aiming to greatly improve the image quality is
A method has been adopted in which a signal in scanning line units is doubled.

That is, the horizontal frequency is doubled while the field frequency (vertical frequency) is left unchanged, and the number of scanning lines per field is doubled to 525 lines. This allows
The interlaced scanning is converted into the sequential scanning (non-interlaced scanning) shown in FIG. 4B, and the pixel density in the vertical direction can be increased.

The above-mentioned interlaced scanning to progressive scanning conversion is realized by writing a signal to the memory for each scanning line and reading it at a speed twice the writing speed.

FIG. 5 is a schematic drawing of the above-described progressive scanning conversion from the interlaced scanning, and shows a state in which the scanning lines of each field screen are viewed from the side on the time axis. As shown in the figure, by inserting interpolation scan lines (marked with ●) between the original scan lines (marked with ○), it is possible to double the number of scan lines per field to 525 lines. It is possible to achieve higher definition than in the case of interlaced scanning. That is, it is possible to convert the sequential scanning of 525 lines per field in a pseudo manner.

In this case, as a method of generating a scanning line signal (interpolation signal) to be interpolated, for example, a field interpolation method in which an interpolation signal is generated from adjacent fields as shown in the figure is used. Then, as the interpolation signal in this field interpolation, a signal which is deviated in time is used.

Therefore, in the case of a still image, the above-mentioned interpolated signal is exactly the same as the original signal, so that there is no problem in image quality. However, in the case of a moving image, interpolation is performed with an interpolation signal that is deviated by 1/60 seconds in time, so it looks as if an afterimage or a double image has occurred
It deteriorates the image quality.

Thus, in the case where an image having the above-mentioned interlaced scanning configuration is sequentially scan-converted by scanning line interpolation from adjacent fields,
Due to a mistake in static / moving discrimination that discriminates between a still portion and a moving portion of an image, when interpolation is performed by using information from an adjacent field as an interpolation signal for a moving image portion, every other scanning line has a stripe pattern with a different pattern. It becomes an image and hinders the improvement of image quality.

Furthermore, the image that has been disturbed as described above is displayed as peaking frequency = total number of scanning lines / 2 (525/2 in the case of NTSC system) line / hight
When the signal is passed through the vertical contour correction circuit, the frequency of the disturbing portion matches the peaking frequency of the vertical contour correcting circuit, so that there is a problem that the above disturbance is further emphasized.

In addition, in the video signal output from the video camera etc.,
Almost no frequency component corresponding to the above interference frequency is included.

[Object of the Invention]

The present invention has been made to solve the above-mentioned conventional problems, and is obtained by subjecting an image formed by interlaced scanning to sequential scan conversion by scanning line interpolation from adjacent fields, and performing the sequential scan conversion. It is an object of the present invention to provide a vertical contour correction circuit in which the vertical contour correction circuit for an image reduces the emphasis of scanning line interpolation errors.

[Outline of Invention]

A maximum peaking frequency detection circuit for detecting a peaking frequency portion based on a plurality of scanning lines including a scanning line used for vertical contour enhancement after progressive scanning conversion of a video signal, and a second derivative for a contour component for vertical contour enhancement A secondary differentiating circuit for performing the above, and based on the detection output from the maximum peaking frequency detecting circuit described above, the second derivative component from the second differentiating circuit is set to 0 only near the peaking frequency, and the sequential scanning conversion is performed. This is to reduce the emphasis of the accompanying scan line interpolation error.

〔Example〕

 Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of a vertical contour correction circuit according to the present invention.

In the figure, reference numeral 1 denotes a delay line, which is constituted by continuous connection of 1H delay lines 2, 3, and 4. The output from the 1H delay line 2 is supplied to a maximum peaking frequency detection circuit 5, a subtractor 8, and an adder 11. The output from the 1H delay line 3 is supplied to the maximum peaking frequency detection circuit 5 and the adder 7, and the output from the 1H delay line 4 is supplied to the maximum peaking frequency detection circuit 5. Note that 1H here means 1H after progressive scan conversion,
The signal after the sequential scan conversion is sequentially supplied to the input of the delay line 1 through the input terminal T ₁ .

A maximum peaking frequency detection circuit 5 receives a plurality of scanning lines including a scanning line used for vertical contour enhancement, and detects the degree of change between lines based on arithmetic processing for the plurality of scanning lines. Thus, the peaking frequency portion is detected, and the vertical contour correction amount is controlled based on this output so as not to affect the impulse and step response.

Reference numeral 6 is a quadratic differential circuit that performs quadratic differential on the contour component for vertical contour enhancement, and adds the signal from the input terminal T ₁ and the signal through the 1H delay lines 2 and 3 And a subtracter 8 for taking a subtraction output of the signal from the adder 7 and the signal via the 1H delay line 2.

Reference numeral 9 is a multiplier for controlling the vertical contour emphasizing output from the secondary differentiating circuit 6 based on the output from the maximum peaking frequency detecting circuit 5, and 10 is a vertical contour emphasizing output from the secondary differentiating circuit 6 to an appropriate level. An amplifier 11 for amplifying and shaping the signal is provided with an addition output of the signal through the 1H delay line 2 and the vertical contour emphasizing output through the amplifier 10, and an appropriate vertical contour for sequential scanning is output to an output terminal T _2. It is an adder that outputs a corrected signal.

FIG. 2 is a specific example of the maximum peaking frequency detection circuit 5 shown in FIG.

Here, for convenience of explanation, a plurality of signals which are input to the maximum peaking frequency detection circuit 5 and which have been subjected to progressive scan conversion are a, b, c and d.
The signal a corresponds to the scanning line input to the input terminal T ₁ , the signal b corresponds to the scanning line shifted by 1H from the signal a at the output of the 1H delay line 2, and the signal c Is
The signal corresponding to the scanning line shifted by 2H from the a signal at the output of the 1H delay line 3, and the d signal corresponding to the scanning line shifted by 3H from the a signal at the output of the 1H delay line 4 are 2 This signal corresponds to a plurality of scanning lines including a scanning line used for vertical contour enhancement in the secondary differentiating circuit 6.

In the maximum peaking frequency detection circuit 5, the adder 21 adds the signal a and the signal c shifted by 2H based on the above-mentioned input signal after the progressive scan conversion.
And the b signal deviated by 1H are subtracted by the subtractor 22 to obtain a second derivative output for the b signal at the output of the subtractor 22.

Also, in the subtractor 23, the b signal deviated from the a signal by 1H and the a signal
The signal c is deviated by 2H from the signal, and the subtracter 23 outputs the first-order derivative of the signal b and the signal c. Further, the adder 24 performs addition of the b signal deviated by 1H from the a signal and the d signal deviated by 3H from the a signal,
By subtracting the output of the adder 24 and the c signal by the subtracter 25, a secondary differential output with respect to the c signal is obtained at the output of the subtractor 25.

Second derivative output for the b signal from the output of the subtractor 22, first derivative output for the b signal and c signal from the output of the subtractor 23, and second derivative output for the c signal from the output of the subtractor 25. Are converted into absolute values by the absolute value circuits 26, 27 and 28, respectively, and then input to the arithmetic processing unit 29.

Then, the arithmetic processing unit 29 performs a process of detecting the peaking frequency portion based on the above input.
In the case of the above-mentioned specific example, the degree of change between lines based on the input of four scanning lines a, b, c, d is detected, and the repetition frequency between the lines is the highest, that is, The peaking frequency is assumed to be the maximum when the degree of change of the scanning lines of the book changes digitally (1,0,1,0) for each line, and the detection output at this time is "0". "Is output. In cases other than the above, "1" is output as the detection output.

Thus, the signal after the sequential scanning conversion is supplied to the input terminal T ₁ , and the above-described signals a to d are input to the maximum peaking frequency detection circuit 5, and the peaking is performed based on the degree of change between these lines. The frequency part is detected, and "0" is output as the detection output only when the peaking frequency part is detected. In other cases, "1" is output as the detection output, and the detection output is 2 It is supplied to a multiplier 9 interposed between the secondary differentiating circuit 6 and the amplifier 10.

On the other hand, from the output of the quadratic differentiation circuit 6, a signal for vertical contour correction obtained by performing quadratic differentiation on the contour component for vertical contour enhancement is obtained. Then, based on the detection output from the maximum peaking frequency detection circuit 5, the vertical contour correction signal obtained by the secondary differentiation circuit 6 is controlled.

That is, the secondary differential component for vertical contour correction from the secondary differential circuit 6 is controlled so as to be 0 only near the peaking frequency detected by the maximum peaking frequency detection circuit 5. Note that FIG. 3 shows the output characteristic of the secondary differential component from the secondary differential circuit 6.

As described above, based on the detection output obtained by the maximum peaking frequency detection circuit 5 supplied to the multiplier 9, the secondary differential component from the secondary differential circuit 6 becomes 0 only near the peaking frequency. After being controlled to become the amplifier 10
Is supplied to the adder 11 via the signal output from the output terminal T ₂ and is added to the signal via the 1H delay line 2 to be subjected to proper vertical contour correction for sequential scanning.

In the above embodiment, the detection output from the maximum peaking frequency detecting circuit 5 is supplied to the multiplier 9 provided on the output side of the secondary differentiating circuit 6, but the multiplier 9 is used. The amplifier 10 is composed of, for example, a voltage controlled amplifier (VCA) without using, and the detection output from the maximum peaking frequency detection circuit 5 is supplied to the voltage controlled amplifier.
Even if the voltage controlled amplifier controls the output from the secondary differential circuit 6 based on the detected output, the same effect as described above can be obtained.

〔effect〕

According to the present invention described above, the peaking frequency portion is detected by a plurality of scanning lines including the scanning line used for vertical contour enhancement by the maximum peaking frequency detection circuit, and based on the detection output from the maximum peaking frequency detection circuit, Two
Since the secondary differential component for vertical contour correction obtained by the secondary differential circuit is controlled so as to be 0 only in the vicinity of the peaking frequency, it has no influence on the impulse and the step response. It is possible to perform vertical contour correction with a narrow shoot without emphasizing scanning line interpolation error in progressive scan conversion.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a vertical contour correction circuit according to the present invention, FIG. 2 is a block diagram showing a concrete example of a maximum peaking frequency detection circuit in the embodiment, and FIG. FIG. 4 is a diagram showing the output characteristic of the secondary differentiating circuit, FIG. 4 is a diagram for explaining interlaced scanning and progressive scanning, and FIG. 5 is a diagram for explaining a state from interlaced scanning to progressive scanning conversion. 5 ... Maximum peaking frequency detection circuit, 6 ... Secondary differentiation circuit.

Claims (1)

[Claims] 1. A maximum peaking frequency detection circuit for detecting a peaking frequency portion based on a plurality of scanning lines including a scanning line used for vertical contour enhancement after progressive scanning conversion of a video signal, and a contour for vertical contour enhancement. And a secondary differential circuit for performing a secondary differential on the component, and the secondary differential component for vertical contour correction output from the secondary differential circuit is based on the detection output from the maximum peaking frequency detection circuit. A vertical contour correction circuit characterized in that it becomes 0 only in the vicinity.