JPH0232680A - Perpendicular ring contour correction circuit - Google Patents

Perpendicular ring contour correction circuit

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Publication number
JPH0232680A
JPH0232680A JP63181701A JP18170188A JPH0232680A JP H0232680 A JPH0232680 A JP H0232680A JP 63181701 A JP63181701 A JP 63181701A JP 18170188 A JP18170188 A JP 18170188A JP H0232680 A JPH0232680 A JP H0232680A
Authority
JP
Japan
Prior art keywords
signal
output
circuit
contour correction
peaking frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP63181701A
Other languages
Japanese (ja)
Other versions
JPH06101809B2 (en
Inventor
Tetsuro Nagakubo
哲朗 長久保
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Pioneer Corp
Original Assignee
Pioneer Electronic Corp
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Filing date
Publication date
Application filed by Pioneer Electronic Corp filed Critical Pioneer Electronic Corp
Priority to JP63181701A priority Critical patent/JPH06101809B2/en
Publication of JPH0232680A publication Critical patent/JPH0232680A/en
Publication of JPH06101809B2 publication Critical patent/JPH06101809B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

PURPOSE:To perform perpendicular ring contour correction with fine shoot and without enhancing the mis-interpolation of a scanning line by applying control so that a quadratic differential component for perpendicular ring contour correction obtained at a quadratic differential circuit can go to 0 only in the neighborhood of a peaking frequency based on detected output from a maximum peaking frequency detection circuit. CONSTITUTION:The control is applied so that the quadratic differential component from the quadratic deferential circuit 6 can go to 0 only in the neighborhood of the peaking frequency based on the detected output supplied to a multiplier 9 and obtained by detecting by the maximum peaking frequency detection circuit. After that, the component is supplied to an adder 11 via an amplifier 10, and is added on a signal via a 1H delay line 2, and is outputted as the signal in which the perpendicular ring contour correction appropriate for sequential scan is applied from an output terminal T2. In such a way, it is possible to reduce the enhancement of the mis-interpolation of the scanning line and to perform the perpendicular ring contour correction with the fine shoot left.

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は、高画質化に伴う精細度向上のための順次走査
変換処理により得られる画像の垂直輪郭補正回路に係り
、特にフィールド補間による補間ミスに基づく画像への
妨害を低減した垂直輪郭補正回路に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a vertical contour correction circuit for images obtained by progressive scan conversion processing to improve definition accompanying high image quality, and in particular to a circuit for correcting interpolation errors caused by field interpolation. This invention relates to a vertical contour correction circuit that reduces disturbances to images based on .

〔発明の技術的背景および解決しようとする課題〕従来
より、TV受信機やVTRなどにおける映像信号の走査
方式としては、画面のちらつきを少なくするために飛越
走査(インタレース走査)が採用されている。
[Technical Background of the Invention and Problems to be Solved] Conventionally, interlaced scanning has been adopted as a scanning method for video signals in TV receivers, VTRs, etc. in order to reduce screen flickering. There is.

これは、第4図(a)に示すように、走査線を1本おき
に走査して垂直方向の画素密度を下げる代わりに、フィ
ールド周波数を2倍にする方式である。
As shown in FIG. 4(a), this is a method in which the field frequency is doubled instead of scanning every other scanning line to lower the pixel density in the vertical direction.

そして、この飛越走査においては、第1フイールドと第
2フイールドとにより1枚の完全な絵(フレーム)が走
査される。従って、NTSC方弐の場合は、1つのフィ
ールドの走査線数は262.5本であり、また画面数は
30枚/秒である。
In this interlaced scanning, one complete picture (frame) is scanned by the first field and the second field. Therefore, in the case of NTSC, the number of scanning lines in one field is 262.5, and the number of screens is 30 frames per second.

上記のように、飛越走査では1画面光たりの垂直方向の
画素密度(走査線数)を下げているので、走査が粗いも
のとなり1.走査線と走査線の間のすき間が目立つよう
になり、これは画面が大きいはど顕著になり見にくい画
面となるものである。
As mentioned above, in interlaced scanning, the vertical pixel density (number of scanning lines) per screen light is lowered, so the scanning becomes coarse.1. The gaps between the scanning lines become noticeable, and the larger the screen, the more noticeable the gaps become, making the screen difficult to see.

そこで、上記した飛越走査による垂直方向における画素
密度の劣化を解消するために、画質の大幅な改善をねら
ったI D T V (Improved Difin
itionTV)等においては、1走査線単位での信号
を2倍に圧縮する方法がとられている。
Therefore, in order to eliminate the deterioration of pixel density in the vertical direction due to the above-mentioned interlaced scanning, IDT V (Improved Definition) was developed to significantly improve image quality.
tionTV), etc., a method is used in which the signal in units of one scanning line is compressed twice.

すなわち、フィールド周波数(垂直周波数)はそのまま
として水平周波数を2倍にし、1フイールド当たりの走
査線数を2倍の525本にする方法である。これにより
、飛越走査が第4図(blに示す順次走査(ノンインク
レース走査)に変換され、垂直方向における画素密度を
上げることができる。
That is, the field frequency (vertical frequency) is kept unchanged, the horizontal frequency is doubled, and the number of scanning lines per field is doubled to 525. As a result, interlaced scanning is converted to progressive scanning (non-incremental scanning) shown in FIG. 4 (bl), and the pixel density in the vertical direction can be increased.

なお、上記の飛越走査からの順次走査変換は、1走査線
ごとにメモリに信号を書込み、この書込み速度の2倍の
速度で読出すことにより実現される。
Note that the above-mentioned conversion from interlaced scanning to progressive scanning is realized by writing a signal into the memory for each scanning line and reading it out at twice the writing speed.

第5図は、上記した飛越走査からの順次走査変換の様子
を模式的に描いたものであり、各フィールド画面の走査
線を時間軸上で横から見た場合の状態を示している。図
のように、本来の走査線(O印で示す)の間に補間走査
線(・印で示す)を挿入することにより、1フイールド
当たりの走査線を2倍の525本とすることができ、飛
越走査の場合と比較して高精細化することができる。す
なわち、1フイールド525本の順次走査に擬似的に変
換することができる。
FIG. 5 schematically depicts the conversion from the above-described interlaced scanning to progressive scanning, and shows the scanning lines of each field screen viewed from the side on the time axis. As shown in the figure, by inserting interpolated scanning lines (indicated by *) between the original scanning lines (indicated by O), the number of scanning lines per field can be doubled to 525. , it is possible to achieve higher definition than in the case of interlaced scanning. That is, it is possible to pseudo-convert to sequential scanning of 525 lines per field.

この場合、補間する走査線の信号(補間信号)を作る方
法としては、例えば図示するように隣接するフィールド
から補間信号を作るようにしたフィールド補間方式が用
いられる。そして、このフィールド補間における補間信
号としては、時間的にずれた信号を使用することになる
In this case, as a method of creating a scanning line signal to be interpolated (an interpolation signal), for example, as shown in the figure, a field interpolation method is used in which an interpolation signal is created from adjacent fields. In this field interpolation, a temporally shifted signal is used as an interpolation signal.

従って、静止画の場合には、上記の補間信号は本来の信
号とまったく同じとなるため、画質に対しては何らの問
題も生じないものである。しかし、動画の場合には、時
間的に1/60秒だけずれた補間信号により補間するこ
とになるため、残像あるいは2重像を生じたように見え
て、画質を劣化させるものである。
Therefore, in the case of a still image, the interpolated signal described above is exactly the same as the original signal, so there is no problem with the image quality. However, in the case of a moving image, since interpolation is performed using interpolation signals temporally shifted by 1/60 seconds, it appears as if an afterimage or a double image has occurred, degrading the image quality.

而して、上記した飛越走査構成による画像を、隣接フィ
ールドからの走査線補間により順次走査変換する場合、
画像の静止部分と動き部分を判別する静動判別のミスか
ら、動画部に対して隣接フィールドからの情報を補間信
号として補間を行なうと、走査線の1本おきに絵柄の違
った縞状の画像となり、画質向上の妨害となる。
Therefore, when an image with the above-mentioned interlaced scanning configuration is sequentially scan-converted by scanning line interpolation from adjacent fields,
Due to a mistake in static and motion discrimination, which distinguishes between still and moving parts of an image, when interpolation is performed on a moving image part using information from adjacent fields as an interpolation signal, stripes with different patterns are generated on every other scanning line. image, which obstructs image quality improvement.

さらに、上記の妨害を受けた画像を、ピーキング周波数
=全走査線数/2 (NTSC方式の場合は525 /
 2 ) 1ine/hightの垂直輪郭補正回路に
通すと、妨害部分の周波数が該垂直輪郭補正回路の上記
ピーキング周波数と一致するため、上記の妨害を一層強
調する結果となるといった問題があった。
Furthermore, the image affected by the above interference is calculated by peaking frequency = total number of scanning lines / 2 (525 / 2 in the case of NTSC system).
2) When the signal is passed through a 1ine/high vertical contour correction circuit, the frequency of the interference portion matches the peaking frequency of the vertical contour correction circuit, which causes the problem that the interference is further emphasized.

なお、ビデオカメラ等から出力される映像信号中には、
上記の妨害周波数に相当する周波数成分はほとんど含ま
れていない。
In addition, in the video signal output from a video camera, etc.,
Almost no frequency components corresponding to the above-mentioned interference frequencies are included.

〔発明の目的〕[Purpose of the invention]

本発明は、上記した従来における問題を解決するために
なされたもので、飛越走査で構成された画像を、隣接フ
ィールドからの走査線補間により順次走査変換し、該順
次走査変換して得られた画像が垂直輪郭補正回路により
、走査線の補間ミスが強調されるのを低減した垂直輪郭
補正回路を提供することを目的としている。
The present invention was made in order to solve the above-mentioned problems in the conventional art. An object of the present invention is to provide a vertical contour correction circuit that reduces the emphasis on scanning line interpolation errors caused by the vertical contour correction circuit.

〔発明の概要〕[Summary of the invention]

映像信号の順次走査変換後の垂直輪郭強調に用いる走査
線を含む複数の走査線に基づいてピーキング周波数部分
を検出する最大ピーキング周波数検出回路と、垂直輪郭
強調のための輪郭成分に対する2次微分を行なう2次微
分回路とを備え、上記の最大ピーキング周波数検出回路
からの検出出力に基づいて、2次微分回路からの2次微
分成分がピーキング周波数近傍でのみ0となるようにし
、順次走査変換に゛伴う走査線の補間ミスが強調される
のを低減したものである。
A maximum peaking frequency detection circuit that detects a peaking frequency portion based on a plurality of scanning lines including a scanning line used for vertical contour enhancement after progressive scan conversion of a video signal, and a second-order differential for contour components for vertical contour enhancement. Based on the detection output from the maximum peaking frequency detection circuit, the second-order differential component from the second-order differentiation circuit becomes 0 only in the vicinity of the peaking frequency, and performs progressive scan conversion. This reduces the emphasis on scanning line interpolation errors.

〔実施例〕〔Example〕

以下、本発明の実施例を図に基づいて説明する。 Embodiments of the present invention will be described below based on the drawings.

第1図は、本発明による垂直輪郭補正回路の一実施例を
示す構成図である。
FIG. 1 is a block diagram showing an embodiment of a vertical contour correction circuit according to the present invention.

図において、1は遅延線でありIH遅延線2゜3.4の
縦続接続により構成されており、IH遅延線2からの出
力は最大ピーキング周波数検出回路5と減算器8と加算
器11に供給され、IH遅延線3からの出力は最大ピー
キング周波数検出回路5と加算器7に供給され、IH遅
延線4からの出力は最大ピーキング周波数検出回路5に
供給される。なお、ここでのI Hは順次走査変換後に
おけるIHを意味し、上記の遅延線1の入力には順次走
査変換後の信号が入力端子T1を介して順次供給される
In the figure, 1 is a delay line, which is constructed by cascading IH delay lines 2°3.4, and the output from the IH delay line 2 is supplied to a maximum peaking frequency detection circuit 5, a subtracter 8, and an adder 11. The output from the IH delay line 3 is supplied to the maximum peaking frequency detection circuit 5 and the adder 7, and the output from the IH delay line 4 is supplied to the maximum peaking frequency detection circuit 5. Note that IH here means IH after progressive scan conversion, and the signal after progressive scan conversion is sequentially supplied to the input of the delay line 1 through the input terminal T1.

5は最大ピーキング周波数検出回路であり、垂直輪郭強
調に用いる走査線を含む複数の走査線を入力とし、該複
数の走査線に対しての演算処理に基づいてライン間の変
化の度合いを検出することにより、ピーキング周波数部
分を検出し、この出力に基づいてインパルスおよびステ
ップ応答等に影響を与えないように垂直輪郭補正量を制
御するものである。
Reference numeral 5 denotes a maximum peaking frequency detection circuit, which receives as input a plurality of scanning lines including the scanning line used for vertical contour enhancement, and detects the degree of change between lines based on arithmetic processing on the plurality of scanning lines. By this, the peaking frequency portion is detected, and based on this output, the vertical contour correction amount is controlled so as not to affect the impulse, step response, etc.

6は垂直輪郭強調のための輪郭成分に対する2次微分を
行なう2次微分回路であり、上記の入力端子T、からの
信号とIH遅延線2.3を介した信号との加算出力をと
る加算器7と、該加算器7からの信号とIH遅延線2を
介した信号との減算出力をとる減算器8とから構成され
ている。
Reference numeral 6 denotes a second-order differentiation circuit that performs second-order differentiation on contour components for vertical contour enhancement, and an addition circuit that takes the summation output of the signal from the input terminal T and the signal via the IH delay line 2.3. The subtracter 8 is composed of a subtracter 7 and a subtracter 8 which obtains an output by subtracting the signal from the adder 7 and the signal via the IH delay line 2.

9は上記の2次微分回路6からの垂直輪郭強調出力を最
大ピーキング周波数検出回路5からの出力に基づいて制
御する乗算器、10は2次微分回路6からの垂直輪郭強
調出力を適宜なレベルに増幅整形する増幅器、11はI
H遅延線2を介した信号と上記の増幅器10を介した垂
直輪郭強調出力との加算出力をとり、出力端子T2に順
次走査に対しての適正な垂直輪郭補正が行なわれた信号
を出力する加算器である。
9 is a multiplier that controls the vertical contour emphasis output from the second-order differentiation circuit 6 based on the output from the maximum peaking frequency detection circuit 5; 10 is a multiplier that controls the vertical contour emphasis output from the second-order differentiation circuit 6 to an appropriate level; 11 is an amplifier that amplifies and shapes I.
The signal via the H delay line 2 and the vertical contour enhancement output via the amplifier 10 described above are summed together, and a signal that has been properly corrected for vertical contours for sequential scanning is output to the output terminal T2. It is an adder.

第2図は、上記した第1図中に示した最大ピーキング周
波数検出回路5の一興体例である。
FIG. 2 is an example of the maximum peaking frequency detection circuit 5 shown in FIG. 1 described above.

ここでは説明の都合上、最大ピーキング周波数検出回路
5に入力される順次走査変換後の複数の信号をa、  
b、  c、 dとして説明するが、C信号は入力端子
T+に入力された走査線に相当する信号、b信号はIH
遅延線2の出力でC信号よりもIHだけずれた走査線に
相当する信号、C信号はIH遅延線3の出力でC信号よ
りも2Hだけずれた走査線に相当する信号、そしてC信
号はIH遅延線4の出力でC信号よりも3Hだけずれた
走査線に相当する信号で、2次微分回路6での垂直輪郭
強調に用いる走査線を含んだ複数の走査線に相当する信
号である。
For convenience of explanation, a plurality of signals after sequential scan conversion input to the maximum peaking frequency detection circuit 5 will be described here as a,
b, c, and d, the C signal corresponds to the scanning line input to the input terminal T+, and the b signal corresponds to the IH
The C signal is the output of delay line 2 and corresponds to a scanning line shifted by IH from the C signal, the C signal is the output of IH delay line 3 and corresponds to a scanning line shifted by 2H from C signal, and the C signal is This signal corresponds to a scanning line that is output from the IH delay line 4 and is shifted by 3H from the C signal, and is a signal that corresponds to a plurality of scanning lines including the scanning line used for vertical contour enhancement in the quadratic differentiation circuit 6. .

最大ピーキング周波数検出回路5は、順次走査変換後の
上記した入力信号に基づいて、加算器21でC信号とこ
れより2HだけずれたC信号との加算を行ない、該加算
器21の出力とC信号とIHだけずれたb信号とを減算
器22で減算することにより、該減算器22の出力にb
信号に対する2次微分出力を得る。
The maximum peaking frequency detection circuit 5 uses an adder 21 to add the C signal and a C signal shifted by 2H from the C signal based on the above-mentioned input signal after the progressive scan conversion, and the output of the adder 21 and the C signal are added. By subtracting the signal and the b signal that is shifted by IH in the subtracter 22, the output of the subtracter 22 becomes b.
Obtain the second derivative output for the signal.

また、減算器23でC信号よりIHだけずれたb信号と
、C信号より2HだけずれたC信号との減算を行ない、
該減算器23の出力にb信号とC信号に対する1次微分
出力を得る。さらに、加算器24でC信号よりIHだけ
ずれたb信号と、C信号より3HだけずれたC信号との
加算を行ない、該加算器24の出力とC信号とを減算器
25で減算することにより、該減算器25の出力にC信
号に対する2次微分出力を得る。
Further, the subtracter 23 subtracts the b signal which is shifted by IH from the C signal and the C signal which is shifted by 2H from the C signal,
At the output of the subtracter 23, a first-order differential output with respect to the b signal and the C signal is obtained. Further, the adder 24 adds the b signal which is shifted by IH from the C signal and the C signal which is shifted by 3H from the C signal, and the output of the adder 24 and the C signal are subtracted by the subtracter 25. As a result, a second-order differential output with respect to the C signal is obtained as the output of the subtracter 25.

上記の減算器22の出力からのb信号に対する2次微分
出力、減算器23の出力からのb信号とC信号に対する
1次微分出力、および減算器25の出力からのC信号に
対する2次微分出力は、それぞれ絶対値回路26,27
.28により絶対値化された後に演算処理部29に入力
される。
A second differential output for the b signal from the output of the subtracter 22, a first differential output for the b signal and C signal from the output of the subtracter 23, and a second differential output for the C signal from the output of the subtracter 25. are absolute value circuits 26 and 27, respectively.
.. After being converted into an absolute value by 28, it is input to the arithmetic processing section 29.

そして、演算処理部29においては、上記の入力に基づ
いてピーキング周波数部分を検出する処理が行なわれる
。上記の一具体例の場合は、a。
Then, in the arithmetic processing section 29, a process of detecting the peaking frequency portion is performed based on the above input. In the case of the above specific example, a.

b、c、dの4本の走査線入力に基づいたライン間の変
化の度合いが検出され、該ライン間における繰り返し周
波数がもっとも高い場合、すなわち上記4本の走査線の
変化の度合いがディジタル的に考えて<1.0.1.O
)といった具合にライン毎に変化する場合をピーキング
周波数が最大であるとし、このときに検出出力として6
0″を出力する。また、上記以外の場合は、検出出力と
して“1”を出力する。
The degree of change between lines based on the input of four scanning lines b, c, and d is detected, and if the repetition frequency between the lines is the highest, that is, the degree of change of the four scanning lines is digital. Considering <1.0.1. O
), when the peaking frequency changes from line to line, it is considered to be the maximum, and at this time, the detection output is 6.
0" is output. In cases other than the above, "1" is output as the detection output.

而して、順次走査変換後の信号が入力端子T1に供給さ
れ、最大ピーキング周波数検出回路5には、上記した信
号a〜dが入力されて、これらライン間における変化の
度合いに基づいてピーキング周波数部分の検出が行なわ
れ、該ピーキング周波数部分が検出されたときにのみ検
出出力として“0”が出力され、また上記以外のときは
検出出力として“1”が出力され、該検出出力が2次微
分回路6と増幅器10との間に介在された乗算器9に供
給される。
The signal after sequential scan conversion is supplied to the input terminal T1, and the above-mentioned signals a to d are input to the maximum peaking frequency detection circuit 5, and the peaking frequency is determined based on the degree of change between these lines. When the peaking frequency part is detected, "0" is output as the detection output, and in other cases, "1" is output as the detection output, and the detection output is used as the secondary The signal is supplied to a multiplier 9 interposed between a differentiating circuit 6 and an amplifier 10.

一方、2次微分回路6の出力からは、垂直輪郭強調のた
めの輪郭成分に対する2次微分を行なって得た垂直輪郭
補正用の信号が得られる。そして、上記の最大ピーキン
グ周波数検出回路5からの検出出力に基づいて、2次微
分回路6で得た垂直輪郭補正信号に対する制御が行なわ
れる。
On the other hand, from the output of the second-order differentiation circuit 6, a signal for vertical contour correction is obtained by performing second-order differentiation on the contour component for vertical contour enhancement. Based on the detection output from the maximum peaking frequency detection circuit 5, the vertical contour correction signal obtained by the second-order differentiation circuit 6 is controlled.

すなわち、2次微分回路6からの垂直輪郭補正のための
2次微分成分が、最大ピーキング周波数検出回路5で検
出されたピーキング周波数近傍でのみ0になるように制
御される。なお、第3図は上記の2次微分回路6からの
2次微分成分の出力特性を示すものである。
That is, the second-order differential component for vertical contour correction from the second-order differentiation circuit 6 is controlled to become 0 only near the peaking frequency detected by the maximum peaking frequency detection circuit 5. Incidentally, FIG. 3 shows the output characteristics of the second-order differential component from the above-mentioned second-order differential circuit 6.

上記のようにして、乗算器9に供給される最大ピーキン
グ周波数検出回路5で検出して得た検出出力に基づいて
、2次微分回路6からの2次微分成分がピーキング周波
数近傍でのみ0になるように制御された後、増幅器10
を介して加算器11に供給され、ここでIH遅延線2を
介した信号と加算されて順次走査に対しての適正な垂直
輪郭補正が行なわれた信号として出力端子T2より出力
される。
As described above, based on the detection output obtained by detection by the maximum peaking frequency detection circuit 5 supplied to the multiplier 9, the second-order differential component from the second-order differentiation circuit 6 becomes 0 only near the peaking frequency. After being controlled so that the amplifier 10
The signal is supplied to the adder 11 via the IH delay line 2, where it is added to the signal via the IH delay line 2, and the signal is outputted from the output terminal T2 as a signal that has undergone appropriate vertical contour correction for sequential scanning.

なお、上記した実施例においては、最大ピーキング周波
数検出回路5からの検出出力を2次微分回路6の出力側
に設けられた乗算器9に供給する構成のもので説明した
が、該乗算器9を使用することなく増幅器10を例えば
電圧制御増幅器(VCA)で構成し、最大ピーキング周
波数検出回路5からの検出出力を電圧制御増幅器に供給
し、上記の2次微分回路6からの出力を上記検出出力に
基づいて該電圧制御増幅器により制御する構成としても
、上記したと同等の効果を得ることができるものである
In the above embodiment, the detection output from the maximum peaking frequency detection circuit 5 is supplied to the multiplier 9 provided on the output side of the second-order differentiation circuit 6. For example, the amplifier 10 is configured with a voltage-controlled amplifier (VCA) without using a voltage-controlled amplifier, and the detection output from the maximum peaking frequency detection circuit 5 is supplied to the voltage-controlled amplifier, and the output from the second-order differentiator circuit 6 is supplied to the voltage-controlled amplifier. Even with a configuration in which control is performed by the voltage control amplifier based on the output, the same effect as described above can be obtained.

〔効 果〕〔effect〕

以上説明した本発明によれば、最大ピーキング周波数検
出回路により垂直輪郭強調に用いる走査線を含む複数の
走査線によりピーキング周波数部分を検出し、該最大ピ
ーキング周波数検出回路からの検出出力に基づいて、2
次微分回路で得た垂直輪郭補正用の2次微分成分がピー
キング周波数近傍でのみ0になるように制御する構成と
したので、インパルスおよびステップ応答等に対しては
何らの影響を与えることな(、順次走査変換での走査線
の補間ミスを強調せずにシュートの細いままの垂直輪郭
補正を行なうことができる。
According to the present invention described above, the peaking frequency portion is detected by a plurality of scanning lines including the scanning line used for vertical contour enhancement by the maximum peaking frequency detection circuit, and based on the detection output from the maximum peaking frequency detection circuit, 2
The configuration is such that the second-order differential component for vertical contour correction obtained by the second-order differentiation circuit is controlled to become 0 only near the peaking frequency, so it does not have any effect on impulse and step responses, etc. , it is possible to perform vertical contour correction while keeping the chute thin without emphasizing interpolation errors of scanning lines in progressive scan conversion.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明による垂直輪郭補正回路の一実施例を示
す構成図、 第2図は実施例中の最大ピーキング周波数検出回路の一
具体例を示す構成図、 第3図は実施例中の2次微分回路の出力特性を示す図、 第4図は飛越走査と順次走査を説明するための図、 第5図は飛越走査から順次走査変換への様子を説明する
ための図である。 5・・・最大ピーキング周波数検出回路、6・・・2次
微分回路。 特許出願人   パイオニア株式会社 2が虫&べ介 第 図 毛(縁262.58 え、を婢262.5手 (引 乏f麓525蛋 (ルイ〉タレース乏鷺) (bl 第 図 」1婢525) (イ)7レースtS> 〜早颯−一一一
FIG. 1 is a block diagram showing an embodiment of the vertical contour correction circuit according to the present invention, FIG. 2 is a block diagram showing a specific example of the maximum peaking frequency detection circuit in the embodiment, and FIG. 3 is a block diagram showing a specific example of the maximum peaking frequency detection circuit in the embodiment. FIG. 4 is a diagram showing the output characteristics of the second-order differential circuit; FIG. 4 is a diagram for explaining interlaced scanning and progressive scanning; FIG. 5 is a diagram for explaining the conversion from interlaced scanning to progressive scanning. 5... Maximum peaking frequency detection circuit, 6... Second order differential circuit. Patent Applicant: Pioneer Co., Ltd. ) (a) 7 races tS> ~ Hayaso-111

Claims (1)

【特許請求の範囲】 映像信号の順次走査変換後の垂直輪郭強調に用いる走査
線を含む複数の走査線に基づいてピーキング周波数部分
を検出する最大ピーキング周波数検出回路と、 上記垂直輪郭強調のための輪郭成分に対する2次微分を
行なう2次微分回路とを備え、 上記最大ピーキング周波数検出回路からの検出出力に基
づいて、上記2次微分回路から出力される垂直輪郭補正
用の2次微分成分がピーキング周波数近傍でのみ0とな
るようにしたことを特徴とする垂直輪郭補正回路。
[Scope of Claims] A maximum peaking frequency detection circuit for detecting a peaking frequency portion based on a plurality of scanning lines including a scanning line used for vertical contour enhancement after progressive scan conversion of a video signal; and a second-order differential circuit that performs second-order differentiation on the contour component, and the second-order differential component for vertical contour correction output from the second-order differential circuit is peaked based on the detection output from the maximum peaking frequency detection circuit. A vertical contour correction circuit characterized in that the value becomes 0 only near the frequency.
JP63181701A 1988-07-22 1988-07-22 Vertical contour correction circuit Expired - Lifetime JPH06101809B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63181701A JPH06101809B2 (en) 1988-07-22 1988-07-22 Vertical contour correction circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63181701A JPH06101809B2 (en) 1988-07-22 1988-07-22 Vertical contour correction circuit

Publications (2)

Publication Number Publication Date
JPH0232680A true JPH0232680A (en) 1990-02-02
JPH06101809B2 JPH06101809B2 (en) 1994-12-12

Family

ID=16105348

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63181701A Expired - Lifetime JPH06101809B2 (en) 1988-07-22 1988-07-22 Vertical contour correction circuit

Country Status (1)

Country Link
JP (1) JPH06101809B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012043336A (en) * 2010-08-23 2012-03-01 Mitsubishi Electric Corp Image processing apparatus

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012043336A (en) * 2010-08-23 2012-03-01 Mitsubishi Electric Corp Image processing apparatus
US8805082B2 (en) 2010-08-23 2014-08-12 Mitsubishi Electric Corporation Image processing apparatus

Also Published As

Publication number Publication date
JPH06101809B2 (en) 1994-12-12

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