JPH0595292A - Variable length decoder - Google Patents

Abstract

PURPOSE:To reduce the decoding table by setting a variable length code to a same coding value in the decoding table and devising one variable length code to occupy only one address. CONSTITUTION:A variable length code of an input buffer 11 is program-searched by a barrel shifter 12 and a head address of the variable length code of a decoding table 13 is outputted from an offset generating circuit 15. Simultaneously, the variable length code is inputted to a displacement generating circuit 14, in which parts other than an ID code of the variable length code (displacement) are extracted. An adder circuit 16 adds an output of the circuit 15 and an output V of the circuit 14 and outputs the result of the sum. It is inputted as an address of the table 13 and data stored in the address are outputted. Then the table 13 sets the variable length code to a same coding value and devises it that one coding value occupied only one address. Thus, the capacity of the coding table is reduced.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a variable length coded digital image, voice signal, data string of data, etc.
The present invention relates to a variable length decoder that performs decoding.

[0002]

2. Description of the Related Art Variable-length coding is performed as a whole by assigning a short code to an information sample having a high frequency of occurrence to a fixed-length information sample and a long code to an information sample having a low frequency of occurrence. This is a coding method that reduces the amount of generated information (Reference: Information Theory by Yasuo Taki Iwanami Shoten P66-68 3.4 Coding of Information Source).

FIG. 3A shows a code tree when instantaneous decoding is possible. This code tree represents all the code words of the variable length code, and each end point (leaf) represents the code word. "0" or "1" is assigned to each branch of the tree of this code, and the code word corresponding to each leaf corresponds to the bit string of the branch that passes from the origin to this leaf. Therefore, information samples with a high probability of occurrence are assigned to leaves with a small number of branches (short bit strings) in the code tree, and information samples with a low probability of occurrence have a large number of branches in the code tree (bit string). (Longer) leaves are allocated to suppress the total amount of generated information. The code that can be decoded instantaneously means that the code word exists only at the end points of the code tree.

A conventional variable length decoder will be described with reference to FIG. However, it is assumed that a code that can be instantaneously decoded is used.

This variable length decoder is mainly composed of an input buffer (IN-BUFF) 1 for storing a continuous variable length code string.
And a barrel shifter (B-SFT) 2 for cueing a code based on a conventional shift input from a variable length code string extracted from the input buffer 1, and a decoding for decoding the output of the barrel shifter 2 into fixed length information. Table (DEC-TB
L) 3 and a code length determination table (VL-TBL) 4 for determining the code length of the variable length code output from the barrel shifter 2 and inputting this code length to the shift input of the barrel shifter 2.

In this variable-length decoder, when a continuous data string of variable-length codes is input, the barrel shifter 2 detects (starts) the beginning of the variable-length code, and the decoding table 3 changes the variable-length code. The code is decoded, and the codeword length of this codeword is determined by the code length determination table 4 to detect the beginning of the next codeword. Based on this codeword length, the barrel shifter 2 starts the next codeword. Send out. That is, each variable length code is sequentially searched from a continuous variable length coded sequence,
Each time, it is decoded into a fixed length code by the decoding table 3.

Here, the code length of the variable length code is determined as follows. As shown in FIG. 3B, for the code having the same code length, the word beginning of the code (hereinafter referred to as “ID code”) is formed in the same pattern, and this ID code is detected in the code length determination table 4. By doing so, the code length is determined. For example, in the case of FIG. 3B, a0, a
The code words of 1, a2, and a3 are all 4 bits, and the ID code is "00". Further, the codewords of a4 and a5 are both 3 bits, and the ID code is "01". a6,
The code word of a7 is 2 bits, and the ID code is "1".
Becomes (Reference: IBM TechnicaL Disclosure Bulle
tin: DECOMPACTION: VOL.26 NO.9 February 1984)

[0008]

By the way, the decoding table 3 is realized by a read-only memory (ROM), and all the input addresses are the number of bits corresponding to the maximum word length of the variable-length code (in the example of FIG. 3, in the example of FIG. 3). 4 bits). Then, the decoded data of the variable length code is stored in the address of each variable length code.

FIG. 4 shows an example of the decoding table 3. In this decoding table 3, two addresses are used for each of the code words a4 and a5, and four addresses are used for each of the a6 and a7. Furthermore, each address is set to the number of bits that matches the maximum code length.

Therefore, the address must have a capacity larger than the total number of code words, and the capacity of the decoding table 3 becomes unnecessarily large.

The present invention has been made in consideration of the above problems, and an object of the present invention is to provide a variable length decoder capable of suppressing the capacity of the decoding table to the total number of code words.

[0012]

In order to solve such a problem, the present invention relates to a variable length decoder for decoding a variable length code. In such a variable length decoder, 1
Assign only one address to one variable length code,
And a decoding table in which variable-length codes having the same code length are all decoded and placed at addresses, and an ID code indicating the code length in the variable-length code is used to store an area corresponding to the code length in the decoding table. An offset generation circuit that generates an offset that is a start address, a displacement generation circuit that extracts a displacement other than an ID code that indicates a code length from a variable length code, the offset is added to the displacement, and the addition result is decoded. And an adder circuit for outputting to the address input of the table.

[0013]

With the above construction, the variable length code is cueed by the barrel shifter, and the head address of the variable length code in the decoding table is output by the offset generating circuit. At the same time, the variable length code is also input to the displacement generating circuit, and the portion (displacement) other than the ID code of the variable length code is extracted. In the adding circuit, the output of the offset generating circuit is added to the output of the displacement generating circuit, and the addition result is output. The result of this addition is input as the address of the decoding table, and the data stored at this address is output. In the decoding table, the variable length code is set to the same coded value, and one coded value is made to occupy only one address, so that the decoding table is made small.

[0014]

An embodiment of the present invention will be described in detail below with reference to the accompanying drawings. FIG. 1 is a block diagram showing a variable length decoder according to this embodiment.

This variable length decoder mainly comprises an input buffer (IN-BUFF) 1 for storing a continuous variable length code string.
1, a barrel shifter (B-SFT) 12 for cueing a code from a variable length code string extracted from the input buffer 11 based on a shift input described later, and one address for one variable length code, and A decoding table (DEC-TBL) 13 in which all variable-length codes have the same code length and are placed at addresses having the same number of bits, and a barrel shifter 12
With respect to the variable length code cueed by the above, the displacement generator (D-GEN) 14 as a displacement generating circuit for extracting a part (displacement part) other than the ID code, and the variable length code cueed by the barrel shifter 12. Against the decoding table 1
The start address of the area in which the encoded value of the code word having the same code length as the code word in 3 is stored (hereinafter referred to as “offset”).
Offset generator (OFFS) as an offset generation circuit for generating
ET-GEN) 15, the displacement output from the displacement generator 14 and the offset output from the offset generator 15 are added, and the addition result is output as an address input of the decoding table 13 as an adder circuit. (ADDE
R) 16 and a code length determination table (VL-TBL) 17 that determines the code length of the variable length code cueed by the barrel shifter 12 and outputs the determination result to the shift input of the barrel shifter 12. ing.

The displacement of each variable length code having the same code length starts from 0 and is incremented by 1. In the decoding table 13 of this embodiment, the table shown in FIG. 5 is used for the code tree shown in FIG.

Next, the process of decoding the variable length code "011" of a5 in the code tree of FIG. 3 will be described. Note that a
The ID code of 5 is “01” and the displacement is “1”.

A variable length code "01" in the input buffer 11
1 ”is output by being cueed by the barrel shifter 12. The detected variable length code “011” is input to the offset generator 15, and the start address “100” of the area in the decoding table 13 where the decoded value of the variable length code having a codeword length of 3 bits is stored. Is output. At the same time, the variable length code “011” is also input to the displacement generator 14,
"1" which is a part (displacement) other than the ID code "01" in the variable length code is extracted and output.

In the adder 16, the output "100" of the offset generator 15 is added to the output "1" of the displacement generator 14, and the addition result "101" is output. The addition result “101” of the adder 16 is input as the address of the decoding table 13. In the decryption table 13, the address “1
The data "a5" stored in "01" is output.

The variable length code "011" is decoded as described above.

The variable length code "011" cued by the barrel shifter 12 is input to the code length determination table 17 and it is determined that the code word length is 3 bits. The codeword length that is the result of this determination is input to the shift input of the barrel shifter 12. Then, the cueing of the next variable-length code in the barrel shifter 12 is executed by shifting the input of the barrel shifter 12 by 3 bits, and the next processing is performed.

As described above, the displacement of each variable length code having the same code length starts from 0 and is incremented by 1,
In the case of the code tree shown in FIG. 3A, the table has a 3-bit length as shown in FIG. That is, all of them are set to the same code length and one variable length code occupies only one address, so that the decoding table 13 can be significantly reduced in number.

[0023]

As described above, according to the present invention, the variable length code is set to the same coded value in the decoding table,
Further, since one variable length code occupies only one address, it is possible to reduce the number of decoding tables.

[Brief description of drawings]

FIG. 1 is a block diagram showing a variable length decoder of the present embodiment.

FIG. 2 is a block diagram showing a conventional variable length decoder.

FIG. 3 is an explanatory diagram showing a variable-length code and a code tree.

FIG. 4 is an explanatory diagram showing a conventional decoding table.

FIG. 5 is an explanatory diagram showing a decoding table according to the present embodiment.

[Explanation of symbols]

 11 Input Buffer 12 Barrel Shifter 13 Decoding Table 14 Displacement Generator 15 Offset Generator 16 Adder 17 Code Length Judgment Table

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Yoshiya Murakami 1-7-12 Toranomon, Minato-ku, Tokyo Oki Electric Industry Co., Ltd.

Claims (1)

[Claims] 1. A variable-length decoder for decoding a variable-length code, wherein only one address is assigned to one variable-length code, and the variable-length code having the same code length is all decoded and addressed. A decoding table placed in the variable length code, an offset generating circuit for generating an offset, which is the start address of the area corresponding to the code length in the decoding table from the ID code indicating the code length in the variable length code, and a variable length A displacement generating circuit for extracting a displacement other than the ID code indicating the code length from the code, and an adding circuit for adding the offset to the displacement and outputting the addition result to the address input of the decoding table are provided. Characteristic variable length decoder.