JPH0594237A - Power source controller - Google Patents

Abstract

PURPOSE:To supply a voltage continuously until specific conditions are met even if a power switch is pressed while the voltage is supplied to respective components of electronic equipment. CONSTITUTION:If the power switch 45 is repressed so as to inhibit the voltage from being supplied while the voltage is supplied to the respective components with the power switch 45 ON, a power source controller 50 decides whether a resuming process is completed or not and whether a specific time is elapsed or not after the voltages are supplied. A switch 70 is turned OFF by the power source controller 50 after the resuming process is completed or after the specific time is elapsed so as to inhibit the voltage from being supplied to the respective components.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply control device for electronic equipment.

[0002]

2. Description of the Related Art Many electronic devices such as laptop type personal computers and word processors use AC
It works with an adapter, a built-in rechargeable battery, or both.

By the way, in an electronic device such as a personal computer having a resume function, when the power is turned on, that is, when a voltage is supplied to each component, the state of the system immediately before the power is turned off is restored. Data restoration processing for that purpose, that is, the resume processing is performed.

[0004]

However, if the power is turned off during this resume process, that is, if the voltage supply to each component is stopped, a part of the data group being restored is destroyed. It may happen. Therefore, even if the power is turned on again and the resume process is executed, it is possible to restore only the data group that is partially broken. Further, for example, in a recently developed personal computer having an 80386SL CPU manufactured by Intel Corporation, when the power is turned off during the resume process, this CPU may run away.

From the above, it is an object of the present invention to provide a power supply control device for allowing an electronic device to operate normally even when the power supply is turned off during the resume process.

[0006]

SUMMARY OF THE INVENTION A power control device of the present invention comprises a plurality of components, a power switch, a supply means for supplying a voltage to each component, a switching state of the power switch, and the power switch. When the supply of voltage to each of the components is prohibited, the control means controls the supply of the voltage depending on the switching state, until the predetermined time elapses from the time of prohibiting the voltage supply. It is characterized in that the supply means is controlled so as to continue prohibiting the supply of the voltage to each component.

Further, the power supply control device of the present invention monitors a plurality of components, a power supply switch, a supply means for supplying a voltage to each component, a switching state of the power supply switch, and a switching state of the power supply switch. A control means for controlling the supply means, the control means, when a voltage is supplied to each component, continues supplying the voltage to each component until a predetermined process is completed. And controlling the supply means.

[0008]

With the above configuration, even if the power switch is turned off during the resume process, the power is not turned off immediately, so that the data being restored is destroyed or the predetermined CPU goes out of control. Can be prevented.

[0009]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 2 is a block diagram showing the configuration of a computer system used in the embodiment of the present invention. As shown in FIG. 2, the computer system includes a system bus 10 and a main CPU (centra) that controls the entire system.
l processing unit) 11, a ROM (read only memory) 1 for storing control programs and the like unique to this system
2, RAM (random access memory) 13, direct memory access controller (DMAC) 14 for direct memory access control, programmable interrupt controller (PIC) 1 that can be set by a program
5, a programmable interval timer (PIT) 16 that can be set by a program, a real-time clock (RTC) 17 as a timer module having a driving battery 17a, a large-capacity expansion RAM 18 that can be connected to a dedicated card slot, and a resume function. In order to realize it, it has a backup RAM 19 for storing backup data and the like.

The computer system also has a floppy disk controller (FDC) 20. Floppy disk drive (FDD) 32 and 33
Is connected to the floppy disk controller 20,
It is controlled by the floppy disk controller 20.

The computer system further includes a printer controller (PRT-CONT) 21, a universal asynchronous receiver / transmitter as an input / output interface,
22), keyboard controller (KBC) 2
3. Display controller (DISP-CONT)
Power supply circuit 3 having 24, video RAM (VRAM) 25, power supply interface (PS-IF) 28, AC adapter 29, and power supply controller (PC-CPU) 50
0, keyboard 36, LCD (liquid crystal displa
y) 37, expansion bus connector (EBC) 40, hard disk drive interface 41, hard disk drive 42, power switch 45, and battery 48
Have.

A printer 34 and the like are selectively connected to the printer controller 21. An RS232C interface device 35 is connected to the universal asynchronous receiver / transmitter 22 as necessary. The keyboard controller 23 controls key input from the keyboard 36.

The display controller 24 is an LCD 37 that is swingably attached to the computer body, or a CRT (cathode ray tube) that is selectively connected.
Control the display 38.

The power supply interface 28 is a power supply circuit 3.
Serial data transmission is performed with the zero power supply controller 50.

The AC adapter 29 can be connected to this computer system. The AC adapter 29 is connected to an external power source (not shown), rectifies / smooths the AC voltage from the external power source, and outputs a DC voltage. When the AC adapter 29 is connected to the computer system to drive the computer system, a voltage is supplied from the AC adapter 29 to each component of the computer system via the power supply circuit 30.

RAMs 13 and 18, backup RAM 1
9. The backup voltage VBK is supplied to the VRAM 25.

The expansion bus connector 40 is used for expanding the function of the system. For example, the expansion bus connector 40
An external hard disk drive is selectively connected to. Alternatively, an expansion unit (not shown) having various components, for example, a keyboard, a CRT display, a memory, a main body connection portion, etc. can be selectively connected to the expansion connector 40.

The power switch 45 is used for starting the computer system and is composed of a momentary switch. Therefore, when the DC voltage is not supplied from the power supply circuit 30 to each component, that is,
If the switch 45 is pressed while the power is off, the power is turned on. In addition, the DC voltage is the power supply circuit 30.
When the switch 45 is pressed while the system is operating, that is, while the power is on, the power is turned off.

The battery 48 is rechargeable and can be built into the computer system. When the AC adapter 29 is not connected to the computer system and the battery 48 is built in the computer system,
The battery 4 is used to drive the computer system.
A DC voltage is supplied from 8 through the power supply circuit 30 to each component of the computer system. A nickel-hydrogen battery, for example, is used as the battery 48.

The power supply circuit 30 will now be described.
FIG. 1 is a block diagram showing the configuration of a power supply circuit according to an embodiment of the present invention. In FIG. 1, the power supply circuit 30 includes a power supply controller 50, a DC / DC converter 60, and a voltage detector 6.
1, 62, resistors 65 and 66, and FET switch 7
0, 71, 72, 73.

The AC adapter 29 has a constant voltage output terminal 29.
a, control signal input end 29b, and constant current output end 29c
Have. A constant voltage of 18 V and a constant current of 2.2 A are output from the constant voltage output end 29a and the constant current output end 29c, respectively. A control signal from the power supply controller 50 is input to the control signal input terminal 29b. According to this control signal, a constant voltage or constant current is supplied to the AC adapter 29
Is output from.

The DC / DC converter 60 generates a DC voltage of a predetermined level based on the DC voltage from one of the AC adapter 29 and the battery 48, and supplies the generated DC voltage of the predetermined level to each component. Actually, DC from the AC adapter 29 or the battery 48
The voltage is + 18V, and based on this DC voltage, + 5V
DC voltages of V, + 12V and -9V are supplied to predetermined components.

The voltage detector 61 detects the adapter voltage of the AC adapter 29, that is, the constant voltage output from the constant voltage output end 29a. Further, the voltage detector 62 detects the battery voltage of the battery 48. Based on these detected voltages, it is determined whether the AC adapter 29 and the battery 48 are connected to the computer system.

The FET switch 70 is the AC adapter 29.
Alternatively, it is used to supply the DC voltage from the battery 48 to the DC / DC converter 60 or to prohibit the supply of the DC voltage. That is, when the FET switch 70 is turned on, the DC voltage is supplied to the DC / DC converter 60. Therefore, the DC / DC converter 60 supplies a voltage of a predetermined level as described above to each component.

The FET switch 71 is a DC / DC converter 60 from the battery 48 via the FET switch 70.
Is used to supply a DC voltage to the. Therefore, FE
When the T switch 71 is turned on, the battery 48 to D
The voltage can be supplied to the C / DC converter 60.

The FET switch 72 is the AC adapter 29.
It is used to supply a constant current to the battery 48 from the constant current output terminal 29c. Therefore, when the FET switch 72 is turned on, a constant current is supplied to the battery 48 for quick charging.

The FET switch 73 is the AC adapter 29.
It is used to supply a constant voltage to the battery 48 from the constant voltage output terminal 29a. Therefore, when the FET switch 73 is turned on, a constant voltage is supplied to the battery 48 via the resistor 66 to perform trickle charging.

When the rechargeable battery is charged by the AC adapter, the battery is always charged with a current smaller than the charging current even after the battery is in the fully charged state. It is called trickle charging.

The resistor 65 is used as a current limiting resistor for preventing a large current from being supplied to the battery 48, and usually has a high resistance value.

The resistor 66 is used to perform trickle charging, and usually has a low resistance value, for example, about several tens of ohms.

The power supply controller 50 includes a CPU 51, R
AM52, ROM53, timer 54, output port 55,
It has an A / D converter 56 and an input port 57.

The CPU 51 is composed of one chip and controls the voltage supply to each component and the battery 4
Rapid charge / trickle charge control for 8 is performed.

The ROM 53 controls voltage supply, quick charging /
A control program or the like used for performing trickle charge control is stored.

The RAM 52 is used as a main memory of the CPU 51. In the RAM 52, various flags used in voltage supply control, quick charge / trickle charge control,
A memory area such as a counter is allocated.

The timer 54 sets the timer value to C at a predetermined cycle.
Output to PU51.

The output port 55 includes a control signal input terminal 29b of the AC adapter 29 and FET switches 70, 71 and 7.
The control signal is output to 2, 73, and the data is output to the power supply interface 28. In response to the control signal input to the control signal input terminal 29b of the AC adapter 29, the AC
A constant current or a constant voltage is output from the adapter 29.
Further, each FET switch is turned on / off according to a control signal output to each of the FET switches 70, 71, 72, 73.

The A / D converter 56 includes a voltage detector 6
The analog voltage output from each of 1 and 62 is converted into a digital voltage.

The input port 57 receives a signal indicating whether the power switch 45 has been pressed. As can be seen from FIG. 2, when the power switch 45 is not pressed, the voltage level input to the input port 57 is Vcc. But,
As described above, since the power switch 45 is a momentary switch, every time the power switch 45 is pressed, the voltage level input to the input port 57 becomes 0 within a predetermined time. Therefore, it is possible to know whether or not the power switch 45 has been pressed by detecting the change in the voltage level.

Next, regarding the control of the voltage supplied from the power supply circuit 30 to each component depending on the switching state of the power supply switch 45 when the resume processing can be executed, according to the flowcharts shown in FIGS. 3, 4 and 5. explain. 3 is a flowchart showing the operation of the main CPU 11 capable of executing the resume process in the embodiment of the present invention, and FIGS. 4 and 5 are voltage supply control flowcharts in the CPU 51 in the power supply controller 50 of the embodiment of the present invention.

The main CPU 11 executes the control program having the resume function, which is stored in the ROM 12, when the voltage is supplied from the power supply circuit 30.

In FIG. 3, in step B1, it is judged whether or not the resume flag is set.
The resume flag is, for example, assigned to a predetermined memory area in the RAM 13 and used as a flag indicating whether or not the resume process is necessary. Therefore, if the resume flag is set, the backup RAM
The backup data for restoration is stored in 19.

If the resume flag is not set in step B1, normal initialization processing is executed (step B2), and a switch enable command indicating that the initialization processing is completed is output to the power supply interface 28 ( Step B3). After that, the operating system (OS) is activated. As a result, the computer system is brought into a state capable of executing various application processes.

If the resume flag is set in step B1, the resume process is executed in step B4. That is, the backup RAM 1
The backup data is read from 9. Step B5
Then, the switch valid command indicating that the resume process is completed is output to the power supply interface 28.
As a result, the system state immediately before the power is turned off is restored.

On the other hand, the CPU 51 of the power supply controller 50
Executes the power supply control program stored in the ROM 53. This voltage supply control includes control when the power switch 45 is pressed during the resume process, that is, when there is a request to turn off the power during the resume process.

In this voltage supply control, the contents of the memory area assigned to the RAM 52 as a flag are referred to. The switch invalid flag is a flag that indicates whether or not the power switch 45 has been pressed.
When the FET switch 70 is turned on, the switch invalid flag is set to 1. In this state, the power switch 45
Even if is pressed, the FET switch 70 is not turned on / off. That is, the current voltage supply state is maintained. On the other hand, when the switch valid command is received from the CPU 11 via the power supply interface 28 at the input port 57, or when the timer value of the timer 54 is larger than the timer value corresponding to the set time (for example, 20 seconds), The switch invalid flag is set to 0. Therefore,
When the power switch 45 is pressed in this state, the FET switch 70 is turned on / off.

The switch-on flag is a flag indicating whether or not the power switch 45 has been pressed. When the power switch 45 is pressed while the switch invalid flag is set to 0, the switch-on flag is set to 1. Therefore, the FET switch 70 is turned on / off.
On the other hand, when the FET switch 70 is turned on or off, the switch-on flag is set to 0.

Further, in FIGS. 4 and 5, in step C1, the switch invalid flag and the switch on flag are each set to 0 as an initial setting.

In step C2, it is determined whether the switch invalid flag is 1. That is, it is determined whether or not the FET switch 70 can be turned on / off in response to the pressing of the power switch 45.

If the switch invalid flag is 0 in step C2, the power switch 4 is turned on in step C3.
It is determined whether 5 has been pressed. When the power switch 45 is pressed in step C3, the switch-on flag is set to 1 (step C4). The switch invalid flag is 0 when the power controller 50 is in the initial state or when the FET switch 70 is turned off.
Therefore, when the FET switch 70 is off and the power switch 45 is pressed, the switch-on flag is always set to 1.

In step C5, it is determined whether the FET switch 70 is turned on. When the FET switch 70 is turned on in step C5, it is determined in step C6 whether or not the switch-on flag is set to 1.

When the switch-on flag is 1 in step C6, a control signal for turning off the FET switch 70 is generated (step C7). The generated control signal is output from the output port 55 to the FET switch 70. Further, the switch-on flag is set to 0 (step C8).

In step C5, the FET switch 7
If 0 is not turned on, it is determined in step C9 whether or not the switch-on flag is set to 1. At step C9, the switch-on flag is 1
If so, a control signal for turning on the FET switch 70 is generated (step C10). The generated control signal is output from the output port 55 to the FET switch 70. At step C11, the switch-on flag is set to 0.
Is set to 1, and the switch invalid flag is set to 1.

In step C12, after the timer value of the timer 54 is reset, a control signal for starting the timer 54 is generated.

In step C13, it is determined whether the switch valid command is received at the input port 57. In step C13, when the switch valid command is received by the input port 57, the switch invalid flag is set to 0 (step C14).

In step C15, it is judged whether the timer value of the timer 54 is larger than the timer value corresponding to the set time (for example, 20 seconds). Step C
In 15, when the timer value of the timer 54 is larger than the set timer value corresponding to 20 seconds, the switch invalid flag is set to 0 (step C16).

The processing at steps C15 and C16 is provided for the following reason. That is, if the main CPU 11 cannot output the switch enable command to the CPU 51 of the power supply controller 50 due to some failure, the FET switch 70 will not be turned off forever.

Although the embodiments of the present invention have been described above, the present invention is not limited to the above embodiments, and various modifications can be made within the scope of the gist of the present invention.

[0059]

By performing the above processing, even if the power switch is turned off during the resume processing, the backup data can be restored normally without a resume error.

Further, in the computer system using the 80386SL CPU, even if the power switch is turned off during the resume process, the CPU can be prevented from running away.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a power supply circuit that is an embodiment of the present invention.

FIG. 2 is a block diagram showing the configuration of a computer system used in an embodiment of the present invention.

FIG. 3 is an operation flowchart of a main CPU capable of executing resume processing in the embodiment of the present invention.

FIG. 4 is a voltage supply control flowchart in the CPU in the power supply controller according to the embodiment of the present invention.

FIG. 5 is a voltage supply control flowchart in the CPU in the power supply controller according to the embodiment of the present invention.

[Explanation of symbols]

29 ... AC adapter, 45 ... Power switch, 48 ... Battery, 50 ... Power controller, 51 ... CPU, 52 ...
RAM, 53 ... ROM, 54 ... Timer, 55 ... Output port, 56 ... A / D converter, 57 ... Input port, 60
... DC / DC converter, 70 ... FET switch.

Claims (2)

[Claims] 1. A plurality of components, a power switch, a supply means for supplying a voltage to each component, a control means for monitoring a switching state of the power switch, and controlling the supply means according to the switching state of the power switch. When the supply of the voltage to each component is prohibited, the control means keeps prohibiting the supply of the voltage to each component until a predetermined time elapses from the time when the supply of the voltage is prohibited. A power supply control device for controlling the supply means. 2. A plurality of components, a power switch, a supply means for supplying a voltage to each component, a switching means for monitoring the switching state of the power switch, and a control means for controlling the supply means according to the switching state of the power switch. And, when the voltage is supplied to each component, the control unit controls the supply unit to continue supplying the voltage to each component until a predetermined process is completed. Power control device characterized by.