JPH0588872A - Program structure diagram preparation processing system - Google Patents

Abstract

PURPOSE:To provide the program structure diagram preparation processing system for preparing the structure diagram of an assembler source program which can be easily prepared, grasps a stack level and easily find out bag caused by the error of stack operations. CONSTITUTION:An assemble list file 1 containing specified information (characters or character strings) showing the start and end of a module, and a sub routine is inputted and while referring to a device information file 3 containing information concerning a sub routine calling instruction for each device and a stack operating instruction containing the stack level, a module name, sub routine name and stack operating instruction are retrieved and outputted to a nest list file 4 by detecting the specified information at a CPU 2 while using a start detecting means 21, end detecting means 22 and calling instruction detecting means 23.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is used in a program structure diagram creation processing system, and in particular, a program structure diagram creation processing system by searching for a module name containing a specific character or a specific character string, a subroutine name, and a comment. Regarding

[0002]

2. Description of the Related Art Conventionally, in a structure description language such as C language, there has been a processing method for creating a program structure diagram from a C source program, but in a language that is not a structure description language such as assembler language, a program structure diagram is created. There was no processing method to create.

Further, since no coding rule is set when the assembler source program is written, there is no method for creating a program structure diagram by searching for a specific character or a specific character string.

Therefore, in order to create the structural diagram of the assembler source program, it is necessary to analyze the assembler source program, but this is not a conventional technique.

Further, conventionally, in order to grasp the stack level, the debugger has been operated to look at the contents of the RAM, or the subroutine call instruction is searched for from the source program by itself to calculate the stack level.

Further, since it is not known where the stack operation instruction is in the program, it takes time to find the source of the bug due to the stack operation error.

[0007]

As described above, the conventional program structure diagram creation processing system has a drawback in that the assembler source program must be analyzed when creating the structure diagram of the assembler source program. It was Further, conventionally, it is difficult to create a program structure diagram because it is a manual work. Further, it is difficult for the programmer to manage the stack level when writing the program, which is a drawback. Also, there was a drawback that it was difficult to find bugs due to mistakes in stack operation during programming.

An object of the present invention is to create an assembler source program structure diagram which can be easily created by eliminating the above-mentioned drawbacks and which makes it easy to grasp a stack level and find a bug due to a mistake in stack operation. It is to provide a program structure diagram creation processing system.

[0009]

According to the present invention, in a program structure diagram creation processing system having a nest list file creation means for reading an assemble list file and a device information file and creating a nest list file, the assemble list file is The device information file includes specific information indicating the start and end of a module and a subroutine, the device information file includes information about a subroutine call instruction and a stack operation instruction for each device, and the nest list file creating unit refers to the device information. However, it is characterized by including means for searching the specified information in the assemble list file to detect the start and end of the module and the subroutine, and means for detecting the subroutine call instruction.

[0010]

The assemble list file includes specific information (character or character string) indicating the start and end of the module and the subroutine, and the device information file includes information about the subroutine call instruction and the stack operation instruction for each device. Then, the nest list file creating means detects the start of the module and the subroutine as the specific information in the assemble list file while referring to the device information file, and outputs the detected module name and subroutine name to the nest list file. Also, the start of the stack manipulation instruction is detected and the detected stack level is output to the nest list file. Then, a series of processing is ended by detecting the end specific information.

Therefore, when a series of processing is completed, a nest list file representing a desired program structure diagram is automatically generated.

[0012]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing an essential part of an embodiment of the present invention, FIG. 2 is an explanatory diagram showing an example of an assembler source program thereof, FIG. 3 is an explanatory diagram showing an example of a device information file thereof, and 4 and 5 are explanatory views showing an example of the nest list file.

In this embodiment, the assemble list file 1 is used.
Further, in the program structure diagram creation processing system including the CPU 2 as the nest list file creation means for reading the device information file 3 and creating the nest list file 4, the assemble list file 1 which is a feature of the present invention is composed of modules. The device information file 3 includes specific information indicating the start and end of the subroutine, the device call file and the stack operation instruction for each device, and the CPU 2
A start detection means 21 and an end detection means 22 as means for detecting the start and end of a module and a subroutine by searching for specific information in the assemble list file 1 while referring to the device information file 3, and means for detecting a subroutine call instruction. And a calling instruction detecting means 23 as

The assemble list file 1 is an assembler output of the assembler source program 1a shown in FIG. 2, and the coding rule is determined as follows as specific information indicating the start and end of the module and the subroutine.

The first character of the main module name is half-width “M”.

The first character of the subroutine name is a half-width "S".

The first character of the interrupt module name is a half-width "I".

The end of each module is commented,
Half-width ";END".

FIG. 3 is an example of an assembler source program written based on this coding rule.

The modules of the assembler source program 1a shown in FIG. 2 include a main module named "MAIN" and an interrupt module named "INT". For "MAIN", "SUB1" and "SUB"
Two subroutines "2" are called by the "CALL" instruction. Further, "SUB1" calls a subroutine "SUB11".

In "INT", a subroutine "SUB3" is called. The end of each module is "; E
It is indicated by a comment "ND".

As shown in FIG. 3, the device information file 3 includes a device name 31, a subroutine call instruction 32, and a stack operation instruction (stack level) 33.
Includes and.

Further, the nest list file 4 is shown in FIG.
5 shows a schematic program structure diagram of the assembler source program 1a described by the coding rule as a nest list file 4a shown in FIG. 4, and a program structure diagram shown in FIG. 4 as a nest file list 4b shown in FIG. Shows a schematic program structure diagram with stack level and stack manipulation instructions added.

Next, the operation of this embodiment will be described.

When the assemble list file 1 of the assembler source program 1a described based on the coding rule is input to the CPU 2, the CPU 2 searches the device information file 3 for a specific character or a specific character string as specific information. Nest list file 4
Is generated and output.

First, a first operation example in the case of generating the nest list file shown in FIG. 4 will be described with reference to the flow chart shown in FIG. The target device is 75K in FIG.

The CPU 2 analyzes the syntax line by line from the beginning of the assemble list file 1. At this time, the subroutine call instruction 32 peculiar to the device refers to the device information file 3 to search for a character or a character string. First, one line is read from the assemble list file 1 (step S1), it is confirmed that the file is not at the end (step S2), and the module name is searched (step S3). When the module name can be retrieved, the module name is output to the nest list file 4 (step S4). Next, one line is read from the assemble list file 1 (step S5), it is confirmed that the file is not at the end (step S6), and the comment of the subroutine name or the module end is searched (steps S7 and S8). When the subroutine call instruction can be retrieved, the name of the called subroutine is output to the nest list file 4 (step S9). After searching the comment for the end of the module,
When the module ends, the process returns to step S1 to search for the next module. When the assemble list file 1 is completed, the processing is completed. When the processing is completed, the nest list file 4a is generated.

Next, the nest list file 4 shown in FIG.
A second operation example in the case of generating b will be described with reference to the flowchart shown in FIG.

When the assemble list file 1 of the assembler source program 1a based on the coding rule is used as an input file and output at the stack level is further specified, the module name, the subroutine call instruction, and the module end are designated as in the first operation example. The comment is searched, and if found, the module name and the subroutine name are output to the nest list file 4 (steps S11 to S18).

In the second operation example, when the subroutine call instruction 32 is searched (step S17), the subroutine name is output to the nest list file 4 (step S18), and the subroutine call is made by referring to the device information file 3. The stack level for the instruction is output to the nest list file 4 (step S1
9). When the subroutine call instruction cannot be retrieved (step S17), other stack manipulation instructions are searched by referring to the device information file 3 (step S20), and the stack manipulation instruction is output to the nest list file 4 (step S20). Step S21). Then, if the module end comment is retrieved (step S2
2) The process returns to step S11 and ends when the file ends.

As a result, the assembler source program 1
The nest list file 4b to which the stack level and the stack operation instruction are added is output to the schematic structural diagram of a.

[0033]

As described above, according to the present invention, the module name and the subroutine name are names including a specific character or a specific character string, and the end of the module is indicated by a comment including the specific character or the specific character string. Therefore, it is not necessary to analyze the structure of the assembler source program when creating the structure diagram of the assembler source program, and the schematic structure diagram of the assembler source program can be displayed. In addition, by making the subroutine name a name that represents the processing content of the subroutine, there is an effect that a program structure diagram that is easier to read can be obtained.

The nest list file output according to the present invention can be used for documents, and the nest list file created by designating the stack level output is
You can grasp the static stack level, and the nest list file that outputs the stack operation instruction is
The effect of the stack manipulation is significant, as the location of the stack manipulation in the program becomes clear, and bugs due to stack manipulation mistakes during programming become easier to find.

[Brief description of drawings]

FIG. 1 is a block diagram showing a main part of an embodiment of the present invention.

FIG. 2 is an explanatory diagram showing an example of the assembler source program.

FIG. 3 is an explanatory diagram showing an example of the device information file.

FIG. 4 is an explanatory diagram showing an example of the nest list file.

FIG. 5 is an explanatory diagram showing another example of the nest list file.

FIG. 6 is a flowchart showing the first operation example.

FIG. 7 is a flowchart showing a second operation example thereof.

[Explanation of symbols]

 1 Assemble List File 1a Assembler Source Program 2 CPU 3 Device Information File 4, 4a, 4b Nest List File 21 Start Detecting Means 22 End Detecting Means 23 Calling Instruction Detecting Means 31 Device Name 32 Subroutine Calling Instructions 33 Stack Operating Instructions S1 to S9, Steps S11 to S22

Claims (1)

[Claims] 1. A program structure diagram creation processing system comprising a nest list file creating means for reading an assemble list file and a device information file and creating a nest list file, wherein the assemble list file indicates start and end of modules and subroutines. The device information file includes information about a subroutine call instruction and a stack operation instruction for each device, and the nest list file creating unit specifies the information in the assemble list file while referring to the device information. A program structure diagram creation processing system characterized by including means for retrieving information to detect the start and end of modules and subroutines, and means for detecting subroutine call instructions.