JPH0588644A - Active matrix liquid crystal display device - Google Patents

Active matrix liquid crystal display device

Info

Publication number
JPH0588644A
JPH0588644A JP24977091A JP24977091A JPH0588644A JP H0588644 A JPH0588644 A JP H0588644A JP 24977091 A JP24977091 A JP 24977091A JP 24977091 A JP24977091 A JP 24977091A JP H0588644 A JPH0588644 A JP H0588644A
Authority
JP
Japan
Prior art keywords
liquid crystal
crystal display
display device
active matrix
tft
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP24977091A
Other languages
Japanese (ja)
Inventor
Haruo Wakai
晴夫 若井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Casio Computer Co Ltd
Original Assignee
Casio Computer Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Casio Computer Co Ltd filed Critical Casio Computer Co Ltd
Priority to JP24977091A priority Critical patent/JPH0588644A/en
Publication of JPH0588644A publication Critical patent/JPH0588644A/en
Pending legal-status Critical Current

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  • Liquid Crystal (AREA)
  • Liquid Crystal Display Device Control (AREA)

Abstract

PURPOSE:To provide the active matrix liquid crystal display device which reduces a leak current from a liquid crystal cell and suppresses a voltage drop across the liquid crystal cell. CONSTITUTION:This active matrix type liquid crystal display device is constituted by connecting liquid crystal display cells, each equipped with liquid crystal 16 connected between a signal line 13 and a common electrode 17, two polysilicon TFTs 14 and 15, and auxiliary electrostatic capacitances 18 and 19 connected across one polysilicon TFT 15 between the two polysilicon TFTs 14 and 15, in a matrix.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は液晶セルからのリーク電
流を減少したアクティブマトリクス液晶表示装置に関す
るものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix liquid crystal display device having a reduced leak current from a liquid crystal cell.

【0002】[0002]

【従来の技術】従来、アクティブマトリクス液晶表示装
置は液晶及びTFT(薄膜トランジスタ)を含む液晶表
示セルが走査線及び信号線にマトリクス状に接続されて
構成される。
2. Description of the Related Art Conventionally, an active matrix liquid crystal display device is constructed by connecting liquid crystal display cells including liquid crystal and TFTs (thin film transistors) in a matrix form to scanning lines and signal lines.

【0003】図4は従来のアクティブマトリクス液晶表
示装置の液晶表示セルを示し、信号線2はスイッチング
素子であるTFT3及び液晶5を直列に介してコモン電
極6に接続される。前記TFT3のゲートは走査線1に
接続され、前記TFT3と液晶5の接続点は補助静電容
量4を介して接地される。即ち、走査線1が選択されT
FT3がオンのとき、信号線2の電位をTFT3を通し
て、並列に接続された液晶5と補助静電容量4に書き込
むようになっている。一方、走査線1が非選択でTFT
3がオフのとき、液晶5からTFT3を通して信号線2
に流れる電流がリーク電流IL 1である。この場合、T
FT3にポリシリコンTFTを使うとリーク電流IL
が略100pAと非常に大きくなる。
FIG. 4 shows a liquid crystal display cell of a conventional active matrix liquid crystal display device, in which a signal line 2 is connected to a common electrode 6 via a TFT 3 which is a switching element and a liquid crystal 5 in series. The gate of the TFT 3 is connected to the scanning line 1, and the connection point between the TFT 3 and the liquid crystal 5 is grounded via the auxiliary capacitance 4. That is, the scanning line 1 is selected and T
When the FT 3 is on, the potential of the signal line 2 is written to the liquid crystal 5 and the auxiliary capacitance 4 connected in parallel through the TFT 3. On the other hand, scanning line 1 is not selected and TFT
When 3 is off, the signal line 2 from the liquid crystal 5 through the TFT 3
The current flowing through is the leak current I L 1. In this case, T
If polysilicon TFT is used for FT3, leakage current I L 1
Is very large, about 100 pA.

【0004】アクティブマトリクス液晶表示装置におい
て、補助静電容量4を含めた液晶5の静電容量をC、ポ
リシリコンTFTよりなるTFT3のリーク電流をIL
1とすると、期間t中に生じる液晶セル5の電圧降下Δ
V1は ΔV1=IL 1・t/C (1)
In the active matrix liquid crystal display device, the electrostatic capacity of the liquid crystal 5 including the auxiliary electrostatic capacity 4 is C, and the leak current of the TFT 3 composed of a polysilicon TFT is I L.
Assuming 1, the voltage drop Δ of the liquid crystal cell 5 during the period t
V1 is ΔV1 = I L 1 · t / C (1)

【0005】で近似できる。現プロセスではC=0.6
pF、 t=16.7×10-3sec、 IL 1=10
0pAであり、これらを式(1)に代入すると、電圧降
下ΔV1=2.8Vと近似できる。液晶セル5の印加電
圧が10Vの場合、液晶セル5の電圧は10V−2.8
V=7.2Vとなり、階調表示ができなくなる。従っ
て、現状ではアクティブマトリクス液晶表示装置にポリ
シリコンTFTは使用することができない。
Can be approximated by C = 0.6 in the current process
pF, t = 16.7 × 10 −3 sec, I L 1 = 10
It is 0 pA, and by substituting them into the equation (1), it can be approximated as a voltage drop ΔV1 = 2.8V. When the applied voltage of the liquid crystal cell 5 is 10V, the voltage of the liquid crystal cell 5 is 10V-2.8.
Since V = 7.2V, gradation display cannot be performed. Therefore, at present, the polysilicon TFT cannot be used in the active matrix liquid crystal display device.

【0006】[0006]

【発明が解決しようとする課題】このように従来のアク
ティブマトリクス液晶表示装置では液晶セルからのリー
ク電流が大きく、液晶セルの電圧降下が大きいという欠
点があった。
As described above, the conventional active matrix liquid crystal display device has a drawback that the leak current from the liquid crystal cell is large and the voltage drop of the liquid crystal cell is large.

【0007】本発明は上記の実情に鑑みてなされたもの
で、液晶セルからのリーク電流を減少して、液晶セルの
電圧降下を抑えたアクティブマトリクス液晶表示装置を
提供することを目的とする。
The present invention has been made in view of the above circumstances, and an object thereof is to provide an active matrix liquid crystal display device in which a leak current from a liquid crystal cell is reduced and a voltage drop of the liquid crystal cell is suppressed.

【0008】[0008]

【課題を解決するための手段】本発明は上記課題を解決
するために、信号線とコモン電極との間に直列に接続さ
れた液晶及び複数のスイッチング素子と、この複数のス
イッチング素子のうち1つのスイッチング素子の両端に
それぞれ接続された補助静電容量とを具備する液晶表示
セルがマトリクス状に接続されたことを特徴とするもの
である。
To solve the above problems, the present invention provides a liquid crystal and a plurality of switching elements connected in series between a signal line and a common electrode, and one of the plurality of switching elements. A liquid crystal display cell having auxiliary capacitances connected to both ends of one switching element is connected in a matrix.

【0009】[0009]

【作用】上記手段により、液晶と直列に接続されたスイ
ッチング素子の両端にそれぞれ補助静電容量を接続し
て、スイッチング素子両端の電位差をすくなくすること
により、液晶からスイッチング素子を通して流れるリー
ク電流を減少して、液晶セルの電圧降下を抑えるように
したものである。
By the above means, the auxiliary capacitance is connected to both ends of the switching element connected in series with the liquid crystal to reduce the potential difference across the switching element, thereby reducing the leak current flowing from the liquid crystal through the switching element. Then, the voltage drop of the liquid crystal cell is suppressed.

【0010】[0010]

【実施例】以下図面を参照して本発明の実施例を詳細に
説明する。
Embodiments of the present invention will now be described in detail with reference to the drawings.

【0011】図2は本発明の一実施例に係るアクティブ
マトリクス液晶表示装置の概略図を示し、液晶及びTF
Tを含む液晶表示セル11が走査線12及び信号線13
にマトリクス状に接続されて構成される。
FIG. 2 is a schematic view of an active matrix liquid crystal display device according to an embodiment of the present invention, which shows a liquid crystal and TF.
The liquid crystal display cell 11 including T includes the scanning line 12 and the signal line 13.
And are connected in a matrix form.

【0012】図1は図2のアクティブマトリクス液晶表
示装置の液晶表示セル11の一例を示し、信号線13は
2個のスイッチング素子であるポリシリコンTFT1
4,15及び液晶16を直列に介してコモン電極17に
接続される。前記TFT14,15のそれぞれゲートは
走査線12に接続され、前記TFT15と液晶16の接
続点、及び前記TFT14とTFT15の接続点はそれ
ぞれ対応した補助静電容量18,19を介して接地され
る。即ち、走査線12が選択されTFT14,15がそ
れぞれオンのとき、信号線13の電位をTFT14,1
5を通して、並列に接続された液晶16と補助静電容量
19に書き込むと共にTFT14を通して補助静電容量
18に書き込むようになっている。一方、走査線12が
非選択でTFT14,15がオフのとき、液晶16から
TFT14,15を通して信号線13に流れる電流がリ
ーク電流IL である。
FIG. 1 shows an example of a liquid crystal display cell 11 of the active matrix liquid crystal display device of FIG. 2, in which a signal line 13 is a polysilicon TFT 1 which is two switching elements.
4, 15 and the liquid crystal 16 are connected in series to the common electrode 17. The gates of the TFTs 14 and 15 are connected to the scanning line 12, and the connection point between the TFT 15 and the liquid crystal 16 and the connection point between the TFT 14 and the TFT 15 are grounded via the corresponding auxiliary capacitances 18 and 19, respectively. That is, when the scanning line 12 is selected and the TFTs 14 and 15 are turned on, the potential of the signal line 13 is set to the TFTs 14 and 1.
5, the liquid crystal 16 and the auxiliary capacitance 19 connected in parallel are written through 5, and the auxiliary capacitance 18 is written through the TFT 14. On the other hand, when the scanning line 12 is not selected and the TFTs 14 and 15 are off, the current flowing from the liquid crystal 16 to the signal line 13 through the TFTs 14 and 15 is the leak current I L.

【0013】図3(b)は図3(a)に示すTFTにお
けるリーク電流のドレイン電圧依存性を示す。即ち、ド
レイン電圧VD を上げてゆくと、リーク電流IL 1(ド
レイン電流ID )が急激に上昇している。又、図3
(b)は、TFTのソース・ドレインに印加される電圧
が十分小さい時にはリーク電流IL 1を小さく保てる事
も示している。
FIG. 3B shows the drain voltage dependence of the leak current in the TFT shown in FIG. That is, as the drain voltage V D is raised, the leak current I L 1 (drain current I D ) rises sharply. Also, FIG.
(B) also shows that the leak current I L 1 can be kept small when the voltage applied to the source / drain of the TFT is sufficiently small.

【0014】而して、図1の液晶表示セル11におい
て、走査線12の電位が選択から非選択に切り換わりT
FT14,15がオンからオフに切り換わったとき、補
助静電容量18と補助静電容量19の電位は同電位であ
るため、TFT15のソースとドレインは同電位であ
る。この状態で信号線13の電位が変化すると、その変
化量VS はTFT14のソース・ドレインに印加され
る。そして、前記変化量VSの大きさに対応したリーク
電流IL 4がTFT14を通して流れ、補助静電容量1
8の両端の電圧がΔV1だけ変化する。この電圧変化量
ΔV1がTFT15のソース・ドレインに印加される電
圧になる。前記式(1)の近似計算法ではΔV1=2.
8Vと近似できる。即ち、従来のTFT3のソース・ド
レインに印加される電圧10Vに対し、本実施例のTF
T15のソース・ドレインに印加される電圧は3V以下
であり1/3以下に低減できることになる。TFT15
のソース・ドレインに印加される電圧が約3Vの場合、
図3(b)よりTFT15に流れるリーク電流IL はほ
とんど0pAであり、大幅に低減できることを意味して
おり、結果として液晶16の両端の電位変化はほとんど
0Vであり、液晶16の印加電圧10Vを保持すること
ができ、良好な階調表示をすることができる。従って、
アクティブマトリクス液晶表示装置にポリシリコンTF
Tを使用することができるようになる。
Thus, in the liquid crystal display cell 11 of FIG. 1, the potential of the scanning line 12 is switched from selected to unselected.
When the FTs 14 and 15 are switched from on to off, the auxiliary capacitance 18 and the auxiliary capacitance 19 have the same potential, so that the source and drain of the TFT 15 have the same potential. When the potential of the signal line 13 changes in this state, the change amount V S is applied to the source / drain of the TFT 14. Then, a leakage current I L 4 corresponding to the magnitude of the change amount V S flows through the TFT 14 and the auxiliary capacitance 1
The voltage across 8 changes by ΔV1. This voltage change amount ΔV1 becomes the voltage applied to the source / drain of the TFT 15. According to the approximate calculation method of the equation (1), ΔV1 = 2.
It can be approximated to 8V. That is, with respect to the voltage 10 V applied to the source / drain of the conventional TFT 3, the TF of this embodiment is
The voltage applied to the source / drain of T15 is 3 V or less, which can be reduced to 1/3 or less. TFT15
When the voltage applied to the source and drain of is about 3V,
From FIG. 3B, the leak current I L flowing in the TFT 15 is almost 0 pA, which means that it can be significantly reduced, and as a result, the potential change across the liquid crystal 16 is almost 0 V, and the applied voltage of the liquid crystal 16 is 10 V. Can be held, and good gradation display can be performed. Therefore,
Polysilicon TF for active matrix liquid crystal display
It becomes possible to use T.

【0015】[0015]

【発明の効果】以上述べたように本発明によれば、液晶
セルと直列に接続されたスイッチング素子の両端にそれ
ぞれ補助静電容量を接続して、スイッチング素子両端の
電位差をすくなくすることにより、液晶セルからスイッ
チング素子を通して流れるリーク電流を減少して、液晶
セルの電圧降下を抑えることができる。
As described above, according to the present invention, auxiliary capacitances are connected to both ends of a switching element connected in series with a liquid crystal cell to eliminate the potential difference across the switching element. It is possible to reduce the leak current flowing from the liquid crystal cell through the switching element and suppress the voltage drop of the liquid crystal cell.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明に係る液晶表示セルの一例を示す回路図
である。
FIG. 1 is a circuit diagram showing an example of a liquid crystal display cell according to the present invention.

【図2】本発明の一実施例を示す概略構成説明図であ
る。
FIG. 2 is a schematic configuration explanatory view showing an embodiment of the present invention.

【図3】TFTにおけるリーク電流のドレイン電圧依存
性の一例を示す特性図である。
FIG. 3 is a characteristic diagram showing an example of drain voltage dependency of a leak current in a TFT.

【図4】従来の液晶表示セルを示す回路図である。FIG. 4 is a circuit diagram showing a conventional liquid crystal display cell.

【符号の説明】[Explanation of symbols]

11…液晶表示セル、12…走査線、13…信号線、1
4,15…ポリシリコンTFT、16…液晶、17…コ
モン電極、18,19…補助静電容量。
11 ... Liquid crystal display cell, 12 ... Scan line, 13 ... Signal line, 1
4, 15 ... Polysilicon TFT, 16 ... Liquid crystal, 17 ... Common electrode, 18, 19 ... Auxiliary capacitance.

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 信号線とコモン電極との間に直列に接続
された液晶及び複数のスイッチング素子と、この複数の
スイッチング素子のうち1つのスイッチング素子の両端
にそれぞれ接続された補助静電容量とを具備する液晶表
示セルがマトリクス状に接続されたことを特徴とするア
クティブマトリクス液晶表示装置。
1. A liquid crystal and a plurality of switching elements connected in series between a signal line and a common electrode, and auxiliary capacitances respectively connected to both ends of one of the plurality of switching elements. An active matrix liquid crystal display device, comprising liquid crystal display cells comprising the elements connected in a matrix.
【請求項2】 スイッチング素子としてポリシリコン薄
膜トランジスタを用いたことを特徴とする請求項1記載
のアクティブマトリクス液晶表示装置。
2. The active matrix liquid crystal display device according to claim 1, wherein a polysilicon thin film transistor is used as the switching element.
JP24977091A 1991-09-27 1991-09-27 Active matrix liquid crystal display device Pending JPH0588644A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24977091A JPH0588644A (en) 1991-09-27 1991-09-27 Active matrix liquid crystal display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24977091A JPH0588644A (en) 1991-09-27 1991-09-27 Active matrix liquid crystal display device

Publications (1)

Publication Number Publication Date
JPH0588644A true JPH0588644A (en) 1993-04-09

Family

ID=17197972

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24977091A Pending JPH0588644A (en) 1991-09-27 1991-09-27 Active matrix liquid crystal display device

Country Status (1)

Country Link
JP (1) JPH0588644A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6323918B1 (en) 1996-12-10 2001-11-27 Fujitsu Limited Liquid crystal display device and process for production thereof
JP2011175134A (en) * 2010-02-25 2011-09-08 Sony Corp Pixel circuit, liquid crystal device and electronic device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6323918B1 (en) 1996-12-10 2001-11-27 Fujitsu Limited Liquid crystal display device and process for production thereof
JP2011175134A (en) * 2010-02-25 2011-09-08 Sony Corp Pixel circuit, liquid crystal device and electronic device

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