JPH0584533B2 - - Google Patents

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention writes transfer information in the order of input into a memory block having a block address as a headword.
The present invention also relates to a storage device control method for reading or canceling transfer information from a storage block by specifying a block address or sequence number.

[Prior Art] Conventional storage device control methods of this type include a first-in first-out method, a last-in first-out method, an associative memory method, a storage location specification method, etc. for selecting a storage location (for example, information processing handbook, information processing Society,
Ohmsha, see page 810) does not disclose a first-in arbitrary retrieval method in which the writing position does not require external designation and stored information is designated and retrieved only when reading.

In addition, in packet switching services, there is a method in which, when packetized information arrives one after another, the data contained in the information packets is searched for, for example, the array element number as a headword, and extracted regardless of the order of arrival. This is a program-based method.

[Problem that the invention seeks to solve]

The above-mentioned conventional storage device control method is configured to process the designation of information to be read using software using a control program, so it is difficult to handle data that requires long processing time and requires frequent reading, such as array transfer of packet information. However, in processing, there is a problem in that the efficiency and processing capacity of the central processing unit are reduced, resulting in a decline in service.

[Means for solving problems]

In the storage device control method of the present invention, the storage device control unit writes transfer information in the input order to storage blocks having block addresses, and reads out or cancels the transfer information from the storage blocks by specifying the block address. and an address translation means, the block address of the memory block storing the transfer information is recorded in the lower number of the address register possessed by the address translation means, and the reading or cancellation of the transfer information is performed using the block address or sequence number. Also specify.

Therefore, the sequence number designation means sequentially specifies the sequence number from "0" by writing permission when making a write request, and sequentially advances the sequence number by the number of written memory blocks, while when making a cancellation request. Instructs the sequence number shifted downward by the number of memory blocks to be canceled and waits for the next request. The address registers are assigned sequence numbers (logical addresses for memory blocks) and each records the block address (physical address for a memory block) assigned to a memory block.

When the address translation means receives a cancellation request, it extracts the specified block address or the block address recorded in the address register of the specified sequence number, and assigns it to the extracted area with the lowest number after the sequence number. It fills in the block addresses one by one, records them, and waits for the next request.

FIG. 1 is a diagram corresponding to claims of the present invention. The storage device 10 has a storage block 11, which has block addresses a, b, c, . . . and stores transfer information. In FIG. 1, transfer information A is stored at block address a. The storage device control section 20 writes write information to the storage device 10 and provides a write or read command together with a block address in order to read read information from the storage device 10 . The storage device control section 20 includes a sequence number designation means 21 and an address translation means 22 having an address register 221 as main components. In the address register 221, block addresses a, b, . . . are recorded for each assigned sequence number 0, 1, . In response to a write request, the storage device control unit 20 sets the address register 2 of the sequence number specified by the sequence number designation means 21.
21 and reads the block address from the storage device 10.
Commands writing to the block address read out. In response to a read request, a read is commanded with a direct block address or a block address read from a logical address sequence number.

[Embodiment] Next, a storage device control method of the present invention will be described with reference to the drawings.

FIG. 2 is a functional block diagram showing one embodiment of the present invention. Components that are the same as those in FIG. 1 are given the same numbers and symbols, and explanations thereof will be omitted.

First, the storage device 10 will be explained. Memory device 10 has a memory block 11, a write gate 12, and a read gate 13. The storage block 11 has a block address for each block storing transfer information, and a designated area is coupled to the information input/output line 14 by designation of the block address. When the write gate 12 receives write permission, the gate is passed through the gate, and in response to a write command, the write information is written into the specified area of the memory block. On the other hand, the read gate 13 receives read permission and enters a passing state, and the specified area of the storage block specified by the block address is connected, so that the stored transfer information can be read out as read information.

The storage device control unit 20 includes a sequence number designation means 21,
It has address translation means 22 and selection means 23. The sequence number designating means 21 has an addition/subtraction counter, and when moving the memory block to the next block and writing transfer information, it receives a write permission and a sequence number progression signal and advances the sequence number one by one. When all of the storage blocks are full, a full signal (not shown) is generated. Next, when a cancellation request is made, a cancellation request signal is generated for each block address for one storage block, so for each cancellation request, the sequence number is sequentially returned to the lowest number.

Therefore, the address register 221 up to the number immediately before the sequence number specified by the sequence number designating means 21
Readable transfer information is stored in the memory block having the block address recorded in the block address.
Address register 2 of the specified sequence number
Even if the storage block with the block address recorded in 21 has stored contents, it is treated as if it had no stored contents because it has received a cancellation request.

The address translation means 22 is an address register 22
1. Address registers 221 are assigned sequence numbers and each records a block address. When receiving a sequence number in response to a write or read signal from the selection means 23, the address translation means 22 takes out a block address from the address register 221 of the designated sequence number and receives the block address again. When it is, it is output to the storage device 10 as is. In response to a cancellation request signal, the block address converted from the specified block address or specified sequence number using the address register is taken out from the address register 221, and the block address recorded by the address register 221 after the next sequence number is read. Move addresses sequentially toward the smallest number.

When the selection means 23 receives a write request and a read request, it selects one of them and gives write permission or read permission, and sends a write or read signal to the address translation means 22, and also sends a write or read signal to the memory block 11. Outputs write commands to each.

Next, with reference to FIG. 3, a specific example of a first-in, arbitrary-fetch method for controlling a storage device using an address register will be described. In FIG. 3A, the address registers are assigned sequential numbers as logical addresses starting from "0". address register 0,
Block addresses a, b, c, d, and e are recorded in blocks 1, 2, 3, and 4, respectively. In this example, the stored contents of block addresses a, b, and c are active and can be read. Block address d is currently empty and writable. Writing is sequence number 0
Since the execution is performed sequentially from 1 to 3, the sequence number specified by the current sequence number designation means is sequence number 3, which is the next writing sequence. Therefore, the next time a write request is received, the data will be written to the memory block at the block address d recorded in the designated sequence number 3.

FIG. 3B shows a state in which the information requested for writing in FIG. 3A has been written to block address d, and block address e has been prepared by specifying sequence number 4 for the next write. FIG. 4c shows an example in which block address b or sequence number 1 is designated and extracted or canceled. Since block address b has been extracted, the logical addresses 0 to 3 in use are decreased by one, and block addresses a, c, and d are packed so that they correspond to sequence numbers 0, 1, and 2, respectively. Therefore, sequence number 3 and block address e are specified for the next write. In this example, the retrieved block address b is recorded corresponding to the last sequence number.

That is, the first-in arbitrary retrieval method is executed using logical addresses, and the translation means uniquely specifies and writes a physical address, and at the same time extracts the written physical address and can directly utilize it for reading and canceling.

In the above embodiment, it was explained that block addresses are assigned to all sequence numbers and recorded in the address register. A memory block is set up separately, and only the block address of the memory block containing the memory information to be read for utilization (marked with a circle in Figure 3) is recorded in the address register, and only when a write instruction is received, the specified sequence number is read. It can also be recorded in the address register. In the above description, when reading, the information stored in the storage device is not deleted by only reading, and when the information is retrieved, the stored information is read and canceled at the same time.
Furthermore, the transfer information of a storage block can be read out not only by the method of canceling the previously recorded information when writing occurs, but also by the storage device control unit 20 sending a cancellation command together with the block address to the storage device 10 when a cancellation request is made. This can also be done by not storing anything other than information in the memory block. Further, the method of calling the storage device includes a method of directly calling an address in the storage block to read/cancel as usual, but illustrations and explanations of parts not directly related to the present invention will be omitted.

〔Effect of the invention〕

As explained above, the storage device control method of the present invention stores stored information in the address register in the order in which the stored information was entered first with respect to the logical address, and when the stored information is to be deleted, the stored information is stored in the memory block in which the deleted stored information is stored. The block address is deleted from the address register, and the block addresses recorded in the address registers of the next or later order are sequentially filled and recorded in the empty address register. In contrast to "first-in," when reading, it is possible to increase the processing capacity of the system by directly specifying the block address, which is the physical address of the hardware, or the sequence number, which is the logical address, and reading the stored information in a short time. .

[Brief explanation of drawings]

FIG. 1 is a claim correspondence diagram of the storage device control system of the present invention, FIG. 2 is a functional block diagram showing an embodiment of the present invention, and FIG. 3 is an explanation of the first-in, arbitrary-out method of the address register of the present invention. It is a conceptual diagram. 10...Storage device, 11...Memory block, 2
0...Storage device control unit, 21...Sequence number designating means, 22...Address translation means, 221...Address register.

Claims (1)

[Claims] 1 The storage device control unit that writes transfer information to the storage block of the storage device, and reads or cancels transfer information from the storage block, specifies sequential numbers starting from “0” upon receiving write permission at the time of a write request. At the same time, the sequence number designation means increments the sequence number by the number of memory blocks that have been written, while instructing the sequence number to be shifted down by the number of memory blocks to be canceled in the case of a cancellation request, and waits for the next request. , an address register in which each block address, which is a physical address assigned to a storage block of the storage device, is recorded in correspondence with each of the sequence numbers, which are logical addresses,
When a cancellation request is received, the specified block address or the block address of the specified sequence number is retrieved, and the block address corresponding to the youngest number in the ascending order of the sequence number is sequentially filled and recorded in the retrieved area. 1. A storage device control method comprising: address translation means for waiting for the next request.