JPS6269335A - Control system for storage device - Google Patents

Abstract

PURPOSE:To increase the processing capacity of a control system by reading out the stored information in a short time by directly designating the order number at reading for the 'first-in' storing in arranging the information in order from the first. CONSTITUTION:A storage 10 has a memory block 11 and stores the transferred information in block addresses (a, b, c...). An address register 221 stores these addresses (a, b, c...) in response to the order numbers 0', 1... respectively. A storage control part 20 reads the block addresses out of the register 221 of an order number designated by an order number designating means 21 against a writing request. Then the part 20 supplies a command to the storage 10 to perform writing to the read-out block address. Then a reading operation is indicated against a reading request directly with the block addresses or those block addresses read out of the order numbers of logic addresses.

Description

[Detailed Description of the Invention] [Industrial Field of Application] The invention is to store transfer information in the order of input into a storage block that has a block address as a headword.

Also, a memory gti for extracting or canceling transfer information from a memory block by specifying a block address or sequence number.
Regarding IT control method.

[Conventional technology]

Conventional storage device control methods of this kind include a first-in, first-out method, a last-in, first-out method, an associative memory method, a storage location specification method, etc. for selecting a storage location (for example, Information Processing Handbook, Information Processing Society of Japan).

Ohmsha, psio) does not disclose a first-in arbitrary retrieval method in which the write position does not require external designation and stored information is designated and retrieved only when reading.

In addition, in packet switching services, when packetized information arrives one after another, the first part of the data contained in the information packet is searched for, for example, using the distribution number as a headword, and is extracted regardless of the order of arrival. This method uses a control program.

[Problem that the invention seeks to solve]

In addition to the above-mentioned conventional storage device control method, the designation of information to be continuously output is processed by software using a control program, so it is possible to handle processes that require long processing times and frequent readout, such as array transfer of packet information. In processing, there is a problem in that the efficiency and processing capacity of the central processing unit are reduced, resulting in the loss of services.

[Failure to solve the problem]

In the storage device control method of the present invention, a storage device control unit writes transfer information to storage blocks having block addresses in the order of input, and reads out or retrieves transfer information from the storage blocks by specifying block addresses. It has a number designating means and an address translation means, and records the block address of the memory block in which all the transfer information is stored in the lower number of the address register of the address translation means, and reads or retrieves the transfer information. At, l'j is specified by block address or sequence number.

Therefore, when a write request is made, the sequence number designation means specifies the sequence number starting from nOn by writing permission, and sequentially advances the IN sequence number by the number of written memory blocks, while when making a cancellation request, indicates the sequence number of the memory block to be canceled toward the lowest number and waits for the next request. The address registers are assigned sequence numbers (logical addresses for storage blocks) and each records a block address (physical address for the storage block) assigned to the storage block.

When a cancellation request is sent to the address translation means, the specified block address or the block address recorded in the address register of the specified sequence number is taken out, and the block address recorded in the address register of the specified sequence number is placed in the extracted area. It sequentially fills in and records the block addresses to be attached to and waits for the next request.

Fourteenth is a correspondence diagram of non-inventive claims. memory device fil
O has a storage block 11, and the storage block 11 has block addresses a, b, c, . . . and stores transfer information. In FIG. 1, transfer information A is stored at CJ block address a. Recorded in ffi! The control unit 20 writes write information into the storage device 10 and gives a write or read command together with a block address in order to output subsequent information from the storage device 10. Storage device control unit 2
0 is the sequence number designation means 21. and address register 2
Address translation means 22 having 21 as a main component,
I am prepared. Block addresses a, b, . . . are recorded for each of the assigned sequence numbers 0', 1, . . . in the address register 221. In response to a write request, the storage device control unit 20 writes an address register 22 of the sequence number specified by the sequence number designation means 21.
1, the block address is instructed to be written to the read block address in the bladder storage device 10. In response to a read request, a read is commanded with a direct block address or a block address read from the sequence number of the logical address.

〔Example〕

Next, an inventive storage device control method will be described with reference to the drawings.

FIG. 2 shows functional blocks showing one embodiment of the present invention. Components that are the same as those in FIG. 1 are given the same numbers and symbols, and explanations thereof will be omitted.

First, the storage device 10 will be explained. Note 1), I device 1
0 is the old self memory block 11. Ankomi Gate 12. and a read gate 13. The storage block 11 has a block address for each block that stores transfer information, and by specifying the block address, a specified area is connected to the information person output line 1.
Combine with 4. 〜Input gate 12 receives write permission, passes through the gate, receives 7input command, and writes the memory block (
1. Write the write information in a fixed area. On the other hand, the read gate 13 receives read permission and enters a passing state, and the specified area of the storage block specified by the block address is combined, so that the stored transfer information can be read out as read information.

The left position control section 20 has a sequence number designating means 21, an address translation means 22, and a two-way selection means 23. Sequence number designation means 21 has an MJ calculation/decrease counter (I-), which receives signals after the sequence number along with the calculation when the cooling block is next cooled down and a transfer track is written. When all the gt* blocks are full, @ generates the 4g number (not shown).When there is a cancellation request, the sequence number for one storage block is increased. Since a cancellation request signal is generated for each C!vc address, each cancellation request is returned to the 11Xvc Wakabanto address, which is addressed to one number.

Therefore, readable transfer 1 information is stored in the storage blocks having the block addresses recorded in the address register 221 up to number 114 of the sequence number one before the sequence number specified by the sequence number designating means 21. 2.

Even if the block address recorded in the address register 221 of the specified sequential number is t17 in the self-memory block, the cancellation request is 9 digits long, so it is treated the same as a state with no memory contents. .

The address translation means 22 includes address registers 221 and 221H, which are assigned sequence numbers, each recording a block address. When a sequence number is received in response to a write or read signal from the selection means 23, the address translation means 22 takes out the block address from the address register 221 of the specified sequence number and converts it to the block address. When it is being received, it is output as is to the storage device 10. In response to a cancellation request signal, the block address that has been changed from the specified block address or specified sequence number is retrieved from the address register 221 using the address register 1
The block addresses recorded by the address register 221 after the next sequence number are sequentially shifted toward smaller numbers.

When the alternative means 23 receives the write request 2 and the read request,
Select one of them to give write permission or read permission, and send a write or read signal to the address translation means 22,
It also outputs a write command to the memory block 11, respectively.

Next, with reference to FIG. 3, a specific example of the first-in, arbitrary-out method of controlling the recording device using the address register will be described. In the third position 2, address registers are assigned sequential numbers as logical addresses starting from 'O'. Address registers 0, 1, 2, 3, and 4 have block addresses a+ btc, d, and e, respectively. are recorded. In this example, the memory contents of block addresses a, b, and c can be read out twice. Block address dfl is currently empty and writable. Writing is performed sequentially starting from sequence number O. Therefore, the current sequence number specified by the sequence number designation means is sequence number 3, which is the next write sequence.Therefore, when a write request occurs rarely, it is recorded at the specified sequence number 3. The data is written to the memory block at address d.

Fig. 3 (Bl shows a state in which the information requested for writing in the third inning is written into the block address dVc@, and the block address e is prepared by specifying sequence number 4 for the first writing. Fig. 4 (For Qi, an example is shown in which block address b or sequence number 1 is specified and the extraction or cancellation is performed (7).

Since the block address bt- has been taken out, the logical addresses 0 to 3 in use are decreased by one I7, and block addresses a, c, and d are packed so that they correspond to sequence numbers 0, 1.2, respectively.

Therefore, the order number 3 is specified for writing the arrow. In this example, the retrieved block address b is recorded corresponding to the last sequence number.

That is, the first-in, arbitrary-fetch method is executed using logical addresses, and the translation means uniquely specifies and writes a physical address, and at the same time extracts the written physical address and can directly utilize it for reading and canceling.

In the above embodiment, it was explained that block addresses are assigned to the entire order and recorded in the address register.
A separate comparison table is provided between the 1114 sequence number (logical address) of the address register and the block address (physical address) recorded in the address register.
It is also possible to record the number (marked with a circle in FIG. 3) in the address register and record it in the address register of the designated order number only when a write designation is rarely made. In the above description, the information stored in the storage device is not deleted only by reading, and the information stored in the storage device is retrieved and deleted at the time of reading.

In addition to the method of canceling the information recorded up to that point when there is a transfer information in the transfer information of a storage block, the storage device control unit 20 sends a cancellation command to the recording ffl device 10 together with the block address when requesting cancellation. It is also possible to use a method in which information other than the information that can be generated is not stored in the storage block. Also,
The method of accessing the storage device includes the usual method of directly accessing an address in a storage block to read/cancel, but illustrations and explanations of parts not directly related to the present invention will be omitted.

〔Effect of the invention〕

As explained above, the storage device control method of the present invention stores stored information in the address register in the order in which the stored information was entered first with respect to the logical address, and when the stored information is canceled, the memory block in which the canceled stored information is stored is stored. It has an address translation means that cancels the block address from the address register and sequentially fills the empty address register with the block addresses recorded in the address registers from the 11th place onwards. When reading out the "first-in" stored information, the processing capacity of the system can be increased by directly specifying the block address, which is the physical address of the hardware, or the ant sequence number, which is the logical address, and reading the stored information using the short poem i. The effect of increasing the

[Brief explanation of drawings]

Fig. 1 is a diagram showing how the storage device control system of the present invention corresponds to complaints.
An embodiment of the present invention shown in Fig. 2? Functional block diagram shown, 3rd
FIG. 1 is a conceptual diagram illustrating a first-in, arbitrary-out method of an address register according to the present invention. 10...Storage device, 11...Memorial block, 20...Storage device control unit, 21...
. . . Negative pressure number designation means, 22 . . . Address translation means, 221 .

Claims (1)

[Claims] A storage device control unit that writes transfer information to a storage block of a storage device, or reads or cancels transfer information from a storage block, receives “write permission” at the time of a write request.
0" and advance the sequence number by the number of memory blocks that have been written, while in the case of a cancellation request, specify a sequence number that is shifted downward by the number of memory blocks to be canceled and then and an address register in which each block address, which is a physical address assigned to a storage block of the storage device, is recorded in correspondence with each of the sequence numbers, which are logical addresses. When a request is received, the specified block address or the block address of the specified sequence number is retrieved, and the block address corresponding to the youngest number in the order of the sequence number is filled and recorded in the retrieved area, and then the next block address is stored. 1. A storage device control method, comprising: address translation means that waits for a request.