JPH0583442A - Memory monitor system - Google Patents

Abstract

PURPOSE:To facilitate an analysis of the cause of a fault of a device by storing and saving data for showing an operation of the system in a memory card. CONSTITUTION:First of all, when a switch of a switch setting part 19 is set to a turn-off state, an AND circuit 21 outputs a write enable signal WE1 of a RAM 9 as a write enable signal WE2 of a memory card 17. In such a state, when a power source is turned on to a facsimile communication controller, a microprocessor 1 outputs the write enable signal WE1. When the signal WE1 is outputted, the circuit 21 outputs the signal WE2 to the memory card 17. When the signal WE2 is outputted, the memory card 17 stores data of the RAM 9. Thereafter, the RAM 9 stores transmitting/receiving data and processing data of the device. When a fault is generated in this facsimile communication controller, an operator turns on the switch of the setting part 19. As a result, storage to the memory card 17 is stopped. The operator analyzes the cause of a fault, while looking at the contents of the card 17.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is applied to, for example, a facsimile communication control apparatus and stores data relating to a failure of the facsimile communication control apparatus in a memory card to facilitate analysis of the cause of the failure of the apparatus. Regarding monitoring method.

[0002]

2. Description of the Related Art In recent years, the spread of OA equipment in each office has been remarkable. FIG. 2 shows a system configuration diagram of a control device including a microcomputer, such as a facsimile communication control device, of the above OA equipment.

In the figure, a facsimile communication control device 23 is connected to a host computer 25, and a plurality of facsimile terminal devices 2 connected via a subscriber telephone network 27 in response to a command from the host computer 25.
Image data etc. are transmitted / received to 9a-29n. If a problem such as a failure occurs in the facsimile communication control device 23 during the transmission / reception of this data and the system goes down, the host computer 25 issues an upline dump command for collecting a dump for analyzing the cause of the system down. It is transmitted to the facsimile communication control device 23. In response to the transmitted upline dump command, the facsimile communication control device 23 executes dump collection for transmitting the data stored in the memory (not shown) to the host computer 25. However, the facsimile communication control device 23
In some cases, the dump operation may not be able to be executed due to the condition of failure or other factors, and dump collection may be impossible. As a countermeasure, it is possible to provide a microcomputer of the facsimile communication control device 23 with a dedicated debug system in advance so as to analyze the cause of the failure, but it is possible to prevent the debug system from increasing in size. It wasn't easy.

[0004]

[Problems to be Solved by the Invention] However, in the past,
When a plurality of facsimile communication control devices 23 equipped with a debug system are connected to the host computer 25, if it is necessary to analyze the cause of the failure in the plurality of facsimile communication control devices 23, a great deal of labor is required by the dump analysis. become. Further, in the case of dump analysis of the cause of the failure, a relatively large-scale debug system is provided in each facsimile communication control device 23 in order to speed up the time required for the analysis and the like, which leads to an increase in size of the device. However, there was a risk that maintenance costs would increase.

The present invention has been made in order to solve such a conventional problem, and its object is to prevent an increase in the scale of the debug system and prevent an increase in the maintenance cost of the device. By providing data that causes a failure of the device, it is possible to easily analyze the cause of the failure of the device and surely execute the dump operation, thereby providing a memory monitoring method that improves the performance of the device. Especially.

[0006]

In order to achieve the above object, the present invention provides a RAM for storing data indicating system operation and a memory card for storing data indicating system operation stored in the RAM. A switch for on / off controlling whether or not to store the system operation data stored in the RAM in the memory card; and when the switch is in the off state, the RAM
Of the data indicating the operation of the system stored in the RAM when the switch is on, and the data indicating the operation of the system stored in the RAM when the switch is on. A storage control means for prohibiting storage in the memory card is provided.

[0007]

According to the above-described structure, the switch for controlling whether to store the data indicating the operation of the system stored in the RAM in the memory card is in the off state, and the RAM is in the write enable state. In the case of
Data indicating the operation of the system stored in the AM is stored in the memory card. On the other hand, when the switch is in the ON state, the storage of the data indicating the operation of the system stored in the RAM in the memory card is prohibited, so that the cause of the device failure can be analyzed without complicating the device. Make sure that is feasible.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing control showing an embodiment in which the memory monitor system of the present invention is applied to a facsimile communication control device.

In the figure, the microprocessor 1 is
It controls the entire facsimile communication control device.
The ROM 3 stores a program indicating the control operation of the microprocessor 1 at a predetermined address. The system bus 5 connects the microprocessor 1 to a memory card 17 and the like, which will be described later, and transmits data, addresses and the like.

The host interface 7 executes transmission control with a host computer 25, which will be described later.

The RAM 9 stores image data read from a scanner (not shown), transmission data and reception data of facsimile communication at a predetermined address. Also RAM
Data 9 relating to control of the entire device by the microprocessor 1 (data indicating the operation of the system) is stored at a predetermined address. The data relating to the control of the entire apparatus is, for example, a bug of the program stored in the predetermined address of the ROM 3 which is a cause when the facsimile communication control apparatus fails. Furthermore, memory card 1
7 is portable and is a facsimile communication control device 23.
Can be inserted and removed.

The facsimile adapter section 11 is provided with a buffer (not shown) for temporarily storing the image data, and the image data is transmitted via the subscriber telephone network 27 according to a command from the microprocessor 1 to the facsimile terminal devices 29a-2.
9n.

The DAM control unit 13 is provided with a buffer (not shown), takes in the image data stored in a predetermined address of the RAM 9 in the buffer, and transfers the received image data to the facsimile adapter unit 11. ..

The data address line 15 is shared by the RAM 9 and a memory card 17, which will be described later, and supplies the memory card 17 with data relating to control of the entire apparatus stored at a predetermined address of the RAM 9.

The memory card 17 is, for example, a static R with a battery backup that is fast and consumes less power.
An AM (SRAM) is provided to store data related to control of the entire device, which is stored at a predetermined address of the RAM 19 and the like. Further, the SRAM of the memory card 17 is the same as or faster than the writing speed of the RAM 9,
When actually operating even if is fast in specifications,
It is operated in the speed range shown in the SRAM specifications.

The switch setting section 19 has one end grounded and the other end connected to the voltage (Vcc) and the negative input terminal of the AND circuit 21, so that the switch is in an off state (open state).
And the-input terminal of the AND circuit 21 has a high level of "1".
When the switch is turned on (closed), the-input terminal of the AND circuit 21 becomes low level "0".

The AND circuit 21 whose other input terminal is connected to the write enable signal WE1 of the RAM 9 has the memory card 17 when the switch of the switch setting section 19 is off and the write enable signal WE1 is at high level. The write enable signal WR2 is output. When WR2 is output, the data and the like stored in the RAM 9 and related to the control of the entire apparatus is stored in a predetermined address of the memory card 17 via the data address signal line 15.

The read enable signal RE2 of the memory card 17 is always prohibited.

FIG. 2 is a schematic diagram showing a system in which the memory monitor system of FIG. 1 is applied to a facsimile communication control device.

The facsimile communication control device 23 to which the memory monitor method is applied is connected to the host computer 25 and processes transmission and reception of image data according to a command transmitted from the host computer 25. Further, the facsimile communication control device 23 executes dump collection in response to an upline dump command from the host computer 25. Further, the facsimile communication control device 23 has a plurality of facsimile terminal devices 29a to 29a via the subscriber telephone network 27.
9n, the plurality of facsimile terminal devices 29
Image data is transmitted / received to / from a to 29n.

Next, the operation of this embodiment will be described.

First, before the power source of the facsimile communication control device 23 is turned on, when the operator turns off the switch of the switch setting section 19 (open state), the AND circuit 21 causes the RAM 9 to operate.
The write enable signal WE1 is output as the write enable signal WE2 of the memory card 17.

When the facsimile communication control device 23 is powered on, the microprocessor 1 causes the RAM 9 to operate.
The read enable signal RE1 and the write enable signal WE1 are output via the system bus 5. When the write enable signal WE1 is output, the AND circuit 21
Outputs a write enable signal WE2 to the memory card 17. When the write enable signal WE2 is output, the memory card 17 stores the data stored in the RAM 9 via the data address signal line 15 at a predetermined address.

When a command is input from the host computer 25 after the facsimile communication control device 23 is powered on, the facsimile communication control device 23 subscribes the image data to the facsimile terminal device 29a via the subscriber telephone network 27, for example. It is transmitted via the telephone network 27. The RAM 9 of the facsimile communication control device 23 commands the host computer 25 to receive the write enable signal WE1 at a high level by the microprocessor 1 and is received via the host interface 7, for example, transmission / reception with the facsimile terminal devices 29a to 29n. Data and various data in processing of the device are stored at predetermined addresses. Since the AND circuit 21 outputs the write enable signal WE2 to the memory card 17 even during the above operation, the memory card 17
Stores the data stored in the RAM 9 via the data address signal line 15 at a predetermined address.

When the facsimile communication control device 23 fails, for example, a bug in the program stored in the ROM 3 occurs, the host computer 25 outputs an upline dump command to the facsimile communication control device 23. Despite the upline dump command, when the dump cannot be collected or the data output by the dump is unclear and the cause of the failure cannot be analyzed, the operator turns on the switch of the switch setting unit 19 (closed). State). When the switch is turned on, the AND circuit 21 stops outputting the write enable signal WE2 to the memory card 17, thereby stopping the storage of the data stored in the RAM 9 in the memory card 17. After the switch is turned on, the operator removes the memory card 17 from the facsimile controller 23 and displays it on the display or prints it on the printer. The operator analyzes the cause of the failure while visually checking the data displayed on the display or printed on the printer.

As a result, even when the dump collection is impossible or the dump operation is not preferable, the memory card 1
Since the data of the RAM 9 is stored in 7, the data stored in the memory card 17 is analyzed,
The cause of the device failure can be confirmed.

In this embodiment, the facsimile communication control device 2
Although the case where it is applied to No. 3 has been described, it is also applicable to the control device of other OA equipment.

[0029]

As described above, according to the present invention, since the data indicating the operation of the system is stored and saved in the memory card, the size of the debug system is not increased.
Moreover, by preventing the increase of the maintenance cost of the device and storing the data that causes the device failure, the cause of the device failure can be easily analyzed, and the dump operation can be surely executed. Performance improvement can be realized.

[Brief description of drawings]

FIG. 1 is a block diagram showing control of an embodiment according to a memory monitor system of the present invention.

FIG. 2 is a system configuration diagram in which the present invention is applied to a facsimile communication control device.

[Explanation of symbols]

 1 Microcomputer 9 RAM 15 Data Address Signal Line 17 Memory Card 19 Switch Setting Section 21 AND Circuit WE1, WE2 Write Enable Signal 23 Facsimile Communication Control Device

Claims (1)

[Claims] 1. A RAM for storing data indicating system operation, a memory card for storing data indicating system operation stored in the RAM, and a system for storing the system stored in the RAM in the memory card. A switch for ON / OFF controlling whether or not to store the data indicating the operation, and a data indicating the operation of the system stored in the RAM when the switch is in the OFF state and the RAM is in the write enable state. Stored in the memory card,
A memory monitor method comprising: storage control means for prohibiting storage of data indicating operation of the system stored in the RAM in the memory card when the switch is in an on state.