JPH0583011A - Input/output coupling device for package for semiconductor device - Google Patents

Input/output coupling device for package for semiconductor device

Info

Publication number
JPH0583011A
JPH0583011A JP3245802A JP24580291A JPH0583011A JP H0583011 A JPH0583011 A JP H0583011A JP 3245802 A JP3245802 A JP 3245802A JP 24580291 A JP24580291 A JP 24580291A JP H0583011 A JPH0583011 A JP H0583011A
Authority
JP
Japan
Prior art keywords
coupling
wavelength
input
package
open
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3245802A
Other languages
Japanese (ja)
Inventor
Takeshi Sekiguchi
剛 関口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Electric Industries Ltd
Original Assignee
Sumitomo Electric Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Electric Industries Ltd filed Critical Sumitomo Electric Industries Ltd
Priority to JP3245802A priority Critical patent/JPH0583011A/en
Publication of JPH0583011A publication Critical patent/JPH0583011A/en
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Control Of Motors That Do Not Use Commutators (AREA)
  • Waveguides (AREA)

Abstract

PURPOSE:To reduce mis-matching of impedance and to obtain an excellent band pass characteristic by providing a capacitive coupling part having a coupling area whose length is nearly 1/4 operating wavelength to the device. CONSTITUTION:An open stub whose length is nearly 1/4 wavelength with respect to a passing center frequency is provided in a direction perpendicular to the lengthwise direction of a both-end open 1/2 wavelength strip line resonator. The result of optimum calculation of a VSWR and an S parameter is obtained by providing the open stub whose length is nearly 1/4 wavelength with respect to the passing center frequency in the embodiment in which two coupling stages are provided. Furthermore, the open stub is laid out straightforward (in the lengthwise direction of both-end open 1/2 wavelength strip line resonator) in the lateral direction. Thus, the capacitive coupling part having a coupling area whose length is nearly 1/4 operating wavelength acts like a BPF being an input output coupling device for the narrow band semiconductor device package independently of the provision of the open stub.

Description

【発明の詳細な説明】Detailed Description of the Invention

【０００１】[0001]

【産業上の利用分野】本発明は、半導体装置用パッケー
ジにおける入出力結合を行うためのデバイスに関するも
のである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a device for input / output coupling in a semiconductor device package.

【０００２】さらに詳述すれば本発明は、狭帯域半導体
装置用パッケージ、特にセラミックを用いたパッケージ
などの入出力結合を行うデバイスに関するものである。More specifically, the present invention relates to a device for input / output coupling such as a narrow band semiconductor device package, particularly a package using ceramics.

【０００３】[0003]

【従来の技術】従来から知られるパッケージ配線におい
て、例えばセラミックを用いたパッケージの内部と外部
を接続する場合には、図６に示すように、多層基板の層
間を通過させた後、側面に配線して裏面に接続する構造
が知られている。あるいは図７に示すようなスルーホー
ル構造が用いられている。これらの構造は、グリーンシ
ートと呼ばれる焼成前のセラミックシートにタングステ
ン・ペーストをパターン印刷した後、層を重ねて同時焼
成し、表に出ている部分のみ金メッキを施すという製造
プロセスによって形成される（日経ＢＰ社刊「マイクロ
エレクトロニクス・パッケージング・ハンドブック」参
照）。2. Description of the Related Art In a conventionally known package wiring, for example, when connecting the inside and the outside of a package using ceramics, as shown in FIG. Then, a structure for connecting to the back surface is known. Alternatively, a through hole structure as shown in FIG. 7 is used. These structures are formed by a manufacturing process of pattern-printing a tungsten paste on an unfired ceramic sheet called a green sheet, stacking the layers and simultaneously firing them, and gold-plating only the exposed portions ( See "Microelectronics Packaging Handbook" published by Nikkei BP).

【０００４】[0004]

【発明が解決しようとする課題】しかしながら、図６に
示した従来の構造にあっては、 （１）セラミック層内の配線金属はタングステンのみで
あり、高抵抗（５．６５×１０-6Ωｃｍ、金は２．１３
×１０-6Ωｃｍ）なため、電力損失が大きい。However, in the conventional structure shown in FIG. 6, (1) the wiring metal in the ceramic layer is tungsten only, and the high resistance (5.65 × 10 −6 Ωcm) is obtained. , Gold is 2.13
× 10 −6 Ωcm), so the power loss is large.

【０００５】（２）側面配線部でインピーダンスのミス
マッチングが生じ、損失となる。(2) Impedance mismatching occurs in the side wiring portion, resulting in a loss.

【０００６】等の問題があった。また、図７に示した構
造の場合には、 （１）スルーホールがタングステンであるため、電力損
失が大きい。There are problems such as the above. Further, in the case of the structure shown in FIG. 7, (1) since the through hole is made of tungsten, the power loss is large.

【０００７】（２）スルーホール部がインピーダンス・
ミスマッチングの原因となる。(2) Impedance at the through hole
It causes a mismatch.

【０００８】等、同様の問題があった。There are similar problems.

【０００９】よって本発明の目的は上述の点に鑑み、イ
ンピーダンスマッチングを適確に行い、かつ、電力損失
の低下を図るよう構成した半導体装置用パッケージの入
出力結合デバイスを提供することにある。Therefore, in view of the above points, it is an object of the present invention to provide an input / output coupling device for a semiconductor device package, which is configured to perform impedance matching properly and reduce power loss.

【００１０】[0010]

【課題を解決するための手段】本発明は、半導体装置用
パッケージにおける入出力結合を行うデバイスであっ
て、使用波長の四分の一程度の長さのカップリング領域
を有する容量性結合部を介して、該パッケージの内部と
外部の結合を行うものである。SUMMARY OF THE INVENTION The present invention is a device for input / output coupling in a semiconductor device package, which has a capacitive coupling portion having a coupling region having a length of about ¼ of the wavelength used. Through this, the inside and outside of the package are coupled.

【００１１】ここで、前記容量性結合部は、使用波長の
四分の一程度の長さの多層多段のカップリング領域を有
する。Here, the capacitive coupling portion has a multi-layered multi-stage coupling region having a length of about ¼ of a used wavelength.

【００１２】また、前記容量性結合部は、オープンスタ
ブを備えた多層多段のカップリング領域を有するよう構
成することも可能である。Further, the capacitive coupling portion may be configured to have a multi-layered multi-stage coupling region having an open stub.

【００１３】さらに、半導体装置用パッケージにおける
入出力結合を行うデバイスであって、両端開放型１／２
波長ストリップライン共振器を複数配列して成る並列結
合型帯域フィルタを介して、該パッケージの内部と外部
の結合を行うことができる。Further, it is a device for input / output coupling in a semiconductor device package, which is open-ended type 1/2
The inside and outside of the package can be coupled through a parallel coupling type bandpass filter formed by arranging a plurality of wavelength stripline resonators.

【００１４】ここで、前記並列結合型帯域通過フィルタ
は、通過中心周波数の約四分の一波長のオープンスタブ
を備えた構成とする。Here, the parallel-coupling type bandpass filter is provided with an open stub having a wavelength of about a quarter wavelength of the pass center frequency.

【００１５】また、前記オープンスタブを両端開放型１
／２波長ストリップライン共振器と直角に、もしくは該
共振器と平行に配設することができる。Further, the open stub is a double-ended type 1
It can be arranged at right angles to the / 2 wavelength stripline resonator or parallel to the resonator.

【００１６】[0016]

【作用】本発明の上記構成により、以下に列挙する作用
が得られる。The above-mentioned structure of the present invention provides the following functions.

【００１７】１．四分の一波長の長さの導電性帯もしく
はストリップラインを用いているため、インピーダンス
・ミスマッチングが小さい。1. Impedance mismatch is small because a conductive band or strip line with a quarter wavelength is used.

【００１８】２．スルーホールが無く、単純な構造のた
め、生産性に優れる。2. Since there is no through hole and it has a simple structure, it has excellent productivity.

【００１９】３．容量性結合なので直流成分は遮断さ
れ、かつ、フィルタリング作用があり狭帯域しか通過し
ない。また、多段のカップリング構造とした場合にはカ
ップリング長を微妙に変化させることにより、１段のみ
の場合に比べてシャープなパスバンド特性（良好な阻止
特性）が得られる。3. Since it is capacitively coupled, the direct current component is blocked, and there is a filtering action so that only a narrow band is passed. Further, in the case of a multi-stage coupling structure, by finely changing the coupling length, a sharp pass band characteristic (good blocking characteristic) can be obtained as compared with the case of only one stage.

【００２０】[0020]

【実施例】以下に説明する本発明の各実施例は、パッケ
ージの内部と外部を結合するためのデバイスとして、使
用波長の四分の一程度の長さのカップリング領域を有す
る容量性結合部を備えている。この容量性結合部は帯域
通過フィルタとしての作用を果たすので、図８〜図１２
を参照して、まずその理由を説明する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Each of the embodiments of the present invention described below is, as a device for coupling the inside and the outside of a package, a capacitive coupling portion having a coupling region having a length of about one quarter of the wavelength used. Is equipped with. Since this capacitive coupling portion functions as a bandpass filter, the capacitive coupling portion shown in FIGS.
First, the reason will be described.

【００２１】図８は、従来から知られているマイクロス
トリップラインを用いた、並列結合共振（Ｐａｒａｌｌ
ｅｌ Ｃｏｕｐｌｅｄ Ｒｅｓｏｎａｔｏｒ）型の帯域
通過フィルタである（Ｇ．Ｍａｔｔｈａｅｉ他著、ＭＩ
ＣＲＯＷＡＶＥ ＦＩＬＴＥＲＳ，ＩＭＰＥＤＡＮＣＥ
ＭＡＴＣＨＩＮＧ ＮＥＴＷＯＲＫＳ，ＡＮＤ ＣＯ
ＵＰＬＩＮＧ ＳＴＲＵＴＵＲＥＳ，ＡＲＴＥＣＨ
社）。これは、図８の（Ａ），（Ｂ）に示すように、両
端開放型１／２波長ストリップライン共振器を並列結合
させたものであって、例えば図に例示した寸法（配線幅
７０μｍ，カップリング距離）のストリップライン共振
器をＧａＡｓ基板（１００μｍ厚）に形成した場合、１
０ＧＨｚ〜１４ＧＨｚを通過帯域とするフィルタが構成
される。FIG. 8 shows a parallel coupled resonance (Paralll) using a conventionally known microstrip line.
El Coupled Resonator) band pass filter (G. Matthaei et al., MI.
CROWAVE FILTERS, IMPEDANCE
MATCHING NETWORKS, AND CO
Upling Strutres, Artech
Company). As shown in FIGS. 8A and 8B, this is one in which open-ended 1/2 wavelength stripline resonators are coupled in parallel, and the dimensions (wiring width 70 μm, When a stripline resonator with a coupling distance is formed on a GaAs substrate (100 μm thick), 1
A filter having a pass band of 0 GHz to 14 GHz is configured.

【００２２】図８の（Ａ）に示した２段のカップリング
では、図９に示したような最適化計算結果が得られる。
すなわち、０〜２０ＧＨｚの周波数を横軸とし、さら
に、図８の（Ａ）に示した入力矢印をポート１，出力矢
印をポート２としたときの、入力電圧定在波比ＶＳＷ
Ｒ，反射を表すＳパラメータＳ１１のｄＢ値，透過を表
すＳパラメータＳ２１のｄＢ値を縦軸として、図９に示
すような特性が得られる。With the two-stage coupling shown in FIG. 8A, the optimization calculation result shown in FIG. 9 is obtained.
That is, the frequency of 0 to 20 GHz is taken as the horizontal axis, and the input voltage standing wave ratio VSW when the input arrow and the output arrow shown in FIG.
The characteristics shown in FIG. 9 are obtained with the vertical axis representing the dB value of the S parameter S11 indicating R and reflection and the dB value of the S parameter S21 indicating transmission.

【００２３】また、図８の（Ｂ）に示した３段のカップ
リングでは、図１０に示したような特性が得られる。Further, in the three-stage coupling shown in FIG. 8B, the characteristics shown in FIG. 10 can be obtained.

【００２４】しかしながら、図８の（Ａ）に示した２段
のカップリングでは、いずれの値（ＶＳＷＲ，Ｓ１１，
Ｓ２１）も１０ＧＨｚ〜１４ＧＨｚ内でピーキーな特性
しか得られず、所望の１０ＧＨｚ〜１４ＧＨｚの範囲全
域で透過特性が良好でなく、またそれ以外の範囲で阻止
特性が良好でない（特にＳ２１の裾がなだらかに広がっ
ている）。However, in the two-stage coupling shown in FIG. 8A, which value (VSWR, S11,
S21) also obtains only peaky characteristics within 10 GHz to 14 GHz, the transmission characteristics are not good in the entire range of the desired 10 GHz to 14 GHz, and the blocking characteristics are not good in other ranges (especially the skirt of S21 is gentle). Has spread).

【００２５】また、図８の（Ｂ）に示したようにカップ
リングを３段に増加すると、図１０に示したように通過
帯域が広がり阻止特性も向上するが、その反面、通過帯
域内でカップリング長に応じたリップルが現れ、また設
計マージン・製造マージンも厳しくなる上に、レイアウ
ト的にも占有面積が大きくなってしまうことになる。When the coupling is increased to three stages as shown in FIG. 8B, the pass band is broadened as shown in FIG. 10 and the stop characteristic is improved, but on the other hand, within the pass band. Ripple corresponding to the coupling length appears, the design margin and the manufacturing margin become strict, and the layout occupies a large area.

【００２６】そこで次に、図１１の（Ａ）および（Ｂ）
に示した新規のマイクロ波帯域通過フィルタ（現在、出
願中）について説明する。なお、図１１に示した２つの
フィルタは全て、基板をＧａＡｓ（１００μｍ厚），配
線幅７０μｍ，カップリング距離１０μｍとしている。
最適化解析の条件は、１０ＧＨｚ〜１４ＧＨｚで損失が
最小かつインピーダンスマッチングが最善となることで
ある。Then, next, (A) and (B) of FIG.
The new microwave band pass filter (currently pending) shown in FIG. All the two filters shown in FIG. 11 have a substrate of GaAs (100 μm thick), a wiring width of 70 μm, and a coupling distance of 10 μm.
The condition of the optimization analysis is that the loss is minimum and the impedance matching is best at 10 GHz to 14 GHz.

【００２７】図１１の（Ａ）に示すフィルタでは、両端
開放型１／２波長ストリップライン共振器の長さ方向に
垂交する方向に、通過中心周波数の約四分の一波長のオ
ープンスタブを備えている。すなわち、図１１の（Ａ）
に示すように、カップリング段数は２段であるが通過中
心周波数の約四分の一波長のオープンスタブを備えるこ
とにより、図１２に示すようなＶＳＷＲ，Ｓパラメータ
Ｓ１１およびＳ２１の最適化計算結果が得られる。In the filter shown in FIG. 11A, an open stub having a quarter wavelength of the pass center frequency is provided in a direction perpendicular to the lengthwise direction of the open-ended 1/2 wavelength stripline resonator. I have it. That is, (A) of FIG.
As shown in FIG. 12, the number of coupling stages is two, but by providing an open stub having about a quarter wavelength of the pass center frequency, the optimization calculation results of VSWR, S parameters S11 and S21 as shown in FIG. Is obtained.

【００２８】先に述べた図９と図１２を比較すると、図
９に比べて通過帯域が広く（ピーキーでない）、ブロー
ドな周波数特性を示している。また、先に述べた図１０
と図１２を比較すると、図１０に比べて阻止特性（１０
ＧＨｚ以下，１４ＧＨｚ以上の周波数帯域の傾き）も良
好になっている。Comparison between FIG. 9 and FIG. 12 described above shows that the pass band is wider (not peaky) and the frequency characteristic is broader than that of FIG. In addition, FIG.
12 is compared with FIG. 12, the blocking characteristic (10
The slope of the frequency band below GHz and above 14 GHz) is also good.

【００２９】また、レイアウトとしては、入出力端子を
一直線上に並べることができ、その直線方向に要する距
離は図８に示した従来型より小さくできる。As for the layout, the input / output terminals can be arranged in a straight line, and the distance required in the straight line direction can be made smaller than that of the conventional type shown in FIG.

【００３０】さらに、図１１の（Ｂ）に示したように、
オープンスタブを横方向にまっすぐ（換言すれば、両端
開放型１／２波長ストリップライン共振器の長さ方向
に）レイアウトすることも可能である。Further, as shown in FIG. 11B,
It is also possible to lay out the open stubs straight in the lateral direction (in other words, in the length direction of the half-wavelength stripline resonator with open both ends).

【００３１】以上述べたことから、使用波長の四分の一
程度の長さのカップリング領域を有する容量性結合部
は、オープンスタブを備えているか否かに拘らず、帯域
通過フィルタとしての作用を果たすことが明らかであ
る。そこで、かかる容量性結合部を狭帯域半導体装置用
パッケージの入出力結合デバイスとして用いた各実施例
について述べる。From the above, the capacitive coupling portion having the coupling region having a length of about ¼ of the used wavelength acts as a bandpass filter regardless of whether or not it has an open stub. It is clear that Therefore, each embodiment will be described in which such a capacitive coupling portion is used as an input / output coupling device of a narrow band semiconductor device package.

【００３２】実施例１ 図１は、本発明の一実施例による半導体装置用パッケー
ジの入出力結合デバイスを示す。本実施例では、アルミ
ナ（比誘電率９．６）を用いて、使用波長の四分の一程
度の長さのカップリング領域を持つ単層の容量性結合部
を形成した。波長８ｍｍ（周波数約１２ＧＨｚ），カッ
プリング幅０．６ｍｍ，アルミナ板厚０．４ｍｍ時の計
算結果を図２に示す。この図２に示されるように、１２
ＧＨｚを中心に狭帯域ではあるが、０．１ｄＢ以下の損
失（Ｓ２１より）であり、ＶＳＷＲも１．１以下である
ことがわかる。 Embodiment 1 FIG. 1 shows an input / output coupling device of a semiconductor device package according to an embodiment of the present invention. In this example, a single-layer capacitive coupling portion having a coupling region having a length of about ¼ of the wavelength used was formed using alumina (relative permittivity 9.6). FIG. 2 shows the calculation result when the wavelength is 8 mm (frequency about 12 GHz), the coupling width is 0.6 mm, and the alumina plate thickness is 0.4 mm. As shown in this FIG.
It can be seen that although it is a narrow band centering on GHz, the loss is 0.1 dB or less (from S21) and VSWR is 1.1 or less.

【００３３】実施例２ 図３は、使用波長の四分の一程度の長さの多層多段のカ
ップリング領域を備えた第２の実施例を示す。 Embodiment 2 FIG. 3 shows a second embodiment having a multi-layered multi-stage coupling region having a length of about ¼ of the wavelength used.

【００３４】アルミナ（比誘電率９．６）使用，波長λ
1 ＝８ｍｍ，λ2 ＝８．４ｍｍ（周波数約１３ＧＨ
ｚ），カップリング幅０．６ｍｍ，アルミナ板厚０．４
ｍｍの計算結果を図４に示す。この図４に示されるよう
に、１３ＧＨｚを中心に狭帯域ではあるが、０．１ｄＢ
以下の損失（Ｓ２１より）であり、ＶＳＷＲも１．２以
下であることがわかる。Use of alumina (relative permittivity 9.6), wavelength λ
1 = 8 mm, λ 2 = 8.4 mm (frequency about 13 GH
z), coupling width 0.6 mm, alumina plate thickness 0.4
The calculation result of mm is shown in FIG. As shown in FIG. 4, although the band is narrow around 13 GHz, it is 0.1 dB.
It can be seen that the loss is as follows (from S21) and VSWR is also 1.2 or less.

【００３５】実施例３ 図５は、本発明の第３の実施例を示す。本実施例は、パ
ッケージの入出力配線において、パッケージの内部と外
部との配線接続を、通過中心周波数の約四分の一波長の
オープンスタブを備えた、段数２段のカップリング領域
を持つ容量性結合で行ったものである。 Embodiment 3 FIG. 5 shows a third embodiment of the present invention. In this embodiment, in the input / output wiring of the package, the wiring connection between the inside and the outside of the package is provided with an open stub having a quarter wavelength of the pass center frequency, and a capacitance having a coupling region of two stages. It was done by sex bond.

【００３６】図５に示したパッケージ入出力配線構造
は、図１１の（Ａ）に示したオープンスタブ付きフィル
タを３次元的に構成したものであり、以下に列挙する利
点が得られる。The package input / output wiring structure shown in FIG. 5 is a three-dimensional structure of the filter with open stubs shown in FIG. 11A, and has the following advantages.

【００３７】（１）ブロードな通過周波数特性が得られ
る。(1) Broad pass frequency characteristics can be obtained.

【００３８】（２）２段型の実施例においても、阻止特
性は従来の３段フィルタ並に良好となる。(2) Even in the two-stage type embodiment, the blocking characteristic is as good as that of the conventional three-stage filter.

【００３９】（３）入出力端子を一直線上に並べること
ができ、その時、その直線方向に要する距離は従来型よ
り小さくできる。(3) The input / output terminals can be arranged in a straight line, and at that time, the distance required in the straight line direction can be made smaller than that of the conventional type.

【００４０】従って、２層のオープンスタブ付き実施例
３を用いることにより、オープンスタブ無し３層構造並
の特性（図３，図４参照）を得ることが可能となる。Therefore, by using the embodiment 3 with two layers of open stubs, it is possible to obtain the same characteristics as those of the three-layer structure without open stubs (see FIGS. 3 and 4).

【００４１】[0041]

【発明の効果】以上説明したとおり本発明では、使用波
長の四分の一程度の長さのカップリング領域を持つ容量
性結合部を備えているので、インピーダンスのミスマッ
チングを低下させると共に、従来のスルーホール等に起
因した電力損失もなくなり、かつ良好な帯域通過特性が
得られる。As described above, according to the present invention, since the capacitive coupling portion having the coupling region having the length of about ¼ of the used wavelength is provided, impedance mismatching is reduced and the conventional method is used. Also, the power loss due to the through hole and the like is eliminated, and good bandpass characteristics can be obtained.

【００４２】また、本発明にかかるデバイスは構造が単
純であるため、生産性の向上を図ることが可能となる。Since the device according to the present invention has a simple structure, it is possible to improve the productivity.

【図面の簡単な説明】[Brief description of drawings]

【図１】本発明の第１の実施例を示す図である。FIG. 1 is a diagram showing a first embodiment of the present invention.

【図２】第１の実施例の特性を示す図である。FIG. 2 is a diagram showing characteristics of the first embodiment.

【図３】本発明の第２実施例を示す図である。FIG. 3 is a diagram showing a second embodiment of the present invention.

【図４】第２の実施例の特性を示す図である。FIG. 4 is a diagram showing characteristics of the second embodiment.

【図５】本発明の第３の実施例を示す図である。FIG. 5 is a diagram showing a third embodiment of the present invention.

【図６】従来技術の説明図である。FIG. 6 is an explanatory diagram of a conventional technique.

【図７】従来技術の説明図である。FIG. 7 is an explanatory diagram of a conventional technique.

【図８】従来から知られている並列結合型帯域通過フィ
ルタの構成例を示す図である。FIG. 8 is a diagram showing a configuration example of a conventionally known parallel coupling type bandpass filter.

【図９】図８の（Ａ）における最適化計算結果を示す図
である。FIG. 9 is a diagram showing an optimization calculation result in FIG.

【図１０】図８の（Ｂ）における最適化計算結果を示す
図である。FIG. 10 is a diagram showing an optimization calculation result in FIG. 8 (B).

【図１１】本発明の出願人が提案した新規なマイクロ波
帯域通過フィルタを示す図である。FIG. 11 is a diagram showing a novel microwave bandpass filter proposed by the applicant of the present invention.

【図１２】図１１の（Ａ）における最適化計算結果を示
す図である。FIG. 12 is a diagram showing an optimization calculation result in FIG.

Claims (6)

【特許請求の範囲】[Claims] 【請求項１】 半導体装置用パッケージにおける入出力
結合を行うデバイスであって、使用波長の四分の一程度
の長さのカップリング領域を有する容量性結合部を介し
て、該パッケージの内部と外部の結合を行うことを特徴
とする入出力結合デバイス。1. A device for input / output coupling in a semiconductor device package, which is connected to the inside of the package through a capacitive coupling portion having a coupling region having a length of about one quarter of a used wavelength. An input / output coupling device characterized by performing external coupling. 【請求項２】 請求項１において、前記容量性結合部
は、使用波長の四分の一程度の長さの多層多段のカップ
リング領域を有することを特徴とする入出力結合デバイ
ス。2. The input / output coupling device according to claim 1, wherein the capacitive coupling portion has a multi-layered multi-stage coupling region having a length of about ¼ of a used wavelength. 【請求項３】 請求項２において、前記容量性結合部
は、オープンスタブを備えた多層多段のカップリング領
域を有することを特徴とする入出力結合デバイス。3. The input / output coupling device according to claim 2, wherein the capacitive coupling portion has a multi-layer multi-stage coupling region having an open stub. 【請求項４】 半導体装置用パッケージにおける入出力
結合を行うデバイスであって、両端開放型１／２波長ス
トリップライン共振器を複数配列して成る並列結合型帯
域フィルタを介して、該パッケージの内部と外部の結合
を行うことを特徴とする入出力結合デバイス。4. A device for input / output coupling in a semiconductor device package, the inside of the package being connected through a parallel coupling type bandpass filter formed by arranging a plurality of open-ended 1/2 wavelength stripline resonators. An input / output coupling device characterized by coupling with the outside. 【請求項５】 請求項１において、前記並列結合型帯域
通過フィルタは、通過中心周波数の約四分の一波長のオ
ープンスタブを備えたことを特徴とする入出力結合デバ
イス。5. The input / output coupling device according to claim 1, wherein the parallel-coupling bandpass filter includes an open stub having a wavelength of about a quarter of a pass center frequency. 【請求項６】 請求項５において、前記オープンスタブ
を両端開放型１／２波長ストリップライン共振器と直角
に、もしくは該共振器と平行に配設したことを特徴とす
る入出力結合デバイス。6. The input / output coupling device according to claim 5, wherein the open stub is arranged at a right angle to the open-ended half-wavelength stripline resonator or in parallel with the resonator.
JP3245802A 1991-09-25 1991-09-25 Input/output coupling device for package for semiconductor device Pending JPH0583011A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3245802A JPH0583011A (en) 1991-09-25 1991-09-25 Input/output coupling device for package for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3245802A JPH0583011A (en) 1991-09-25 1991-09-25 Input/output coupling device for package for semiconductor device

Publications (1)

Publication Number Publication Date
JPH0583011A true JPH0583011A (en) 1993-04-02

Family

ID=17139061

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3245802A Pending JPH0583011A (en) 1991-09-25 1991-09-25 Input/output coupling device for package for semiconductor device

Country Status (1)

Country Link
JP (1) JPH0583011A (en)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0998005A (en) * 1995-09-29 1997-04-08 Nec Corp Printed circuit board
EP0705529A4 (en) * 1993-06-24 1998-06-24 Thomas F Knight Method and apparatus for non-conductively interconnecting integrated circuits
JP2001028413A (en) * 1996-02-29 2001-01-30 Kyocera Corp Package for high-frequency waves
WO2001080316A3 (en) * 2000-04-13 2002-03-21 Molex Inc Contactless interconnection system
JP2005311371A (en) * 2004-04-20 2005-11-04 Samsung Electronics Co Ltd Semiconductor chip package
JP2008185537A (en) * 2007-01-31 2008-08-14 Kaiser Technology:Kk Ac signal detection device, receiving device, and interboard transmission system
US7425760B1 (en) 2004-10-13 2008-09-16 Sun Microsystems, Inc. Multi-chip module structure with power delivery using flexible cables
JP2009153071A (en) * 2007-12-21 2009-07-09 Toyota Central R&D Labs Inc Structure for connecting two microstrip lines and structure for mounting integrated circuit chip on mounting board using case
US8098117B2 (en) 2008-01-31 2012-01-17 Murata Manufacturing Co., Ltd. LC composite component
JP5213087B2 (en) * 2011-02-18 2013-06-19 学校法人慶應義塾 Inter-module communication device

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7869221B2 (en) 1993-06-24 2011-01-11 Oracle America, Inc. Apparatus for non-conductively interconnecting integrated circuits
EP0705529A4 (en) * 1993-06-24 1998-06-24 Thomas F Knight Method and apparatus for non-conductively interconnecting integrated circuits
US6728113B1 (en) 1993-06-24 2004-04-27 Polychip, Inc. Method and apparatus for non-conductively interconnecting integrated circuits
JPH0998005A (en) * 1995-09-29 1997-04-08 Nec Corp Printed circuit board
JP2001028413A (en) * 1996-02-29 2001-01-30 Kyocera Corp Package for high-frequency waves
WO2001080316A3 (en) * 2000-04-13 2002-03-21 Molex Inc Contactless interconnection system
JP2005311371A (en) * 2004-04-20 2005-11-04 Samsung Electronics Co Ltd Semiconductor chip package
US7425760B1 (en) 2004-10-13 2008-09-16 Sun Microsystems, Inc. Multi-chip module structure with power delivery using flexible cables
JP2008185537A (en) * 2007-01-31 2008-08-14 Kaiser Technology:Kk Ac signal detection device, receiving device, and interboard transmission system
JP2009153071A (en) * 2007-12-21 2009-07-09 Toyota Central R&D Labs Inc Structure for connecting two microstrip lines and structure for mounting integrated circuit chip on mounting board using case
US8098117B2 (en) 2008-01-31 2012-01-17 Murata Manufacturing Co., Ltd. LC composite component
TWI395370B (en) * 2008-01-31 2013-05-01 Murata Manufacturing Co LC composite parts
JP5213087B2 (en) * 2011-02-18 2013-06-19 学校法人慶應義塾 Inter-module communication device

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