JPH0580849A - Absolute encoder - Google Patents

Abstract

PURPOSE:To decrease the number of tracks and to provide high resolution and a wide measurement range by combining an electrostatic capacitance type detector and a photoelectric detector with each other. CONSTITUTION:The absolute encoder is provided with the electrostatic capacitance type detector 20 which has electrostatic capacitance type code patterns 11-13 and an electrostatic code pattern 14 formed on a scale 10 and reads the electrostatic capacitance type code to generates an electrostatic capacitance type absolute signal and the photoelectric detector 50 which reads a photoelectric code and generates a photoelectric signal. A photoelectric absolute signal is generated according to the photoelectric signal. A counter 90 counts a carry signal based upon the electrostatic capacitance type absolute signal and photoelectric absolute signal to generate the high-order digit of an output absolute signal, and the output based upon the photoelectric absolute signal is used as a low-order digit signal.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an absolute encoder for outputting a detection position as absolute data, and more particularly, by combining detection values of a capacitance type encoder and a photoelectric type encoder, a wide measuring range can be obtained. The present invention relates to an absolute encoder that can obtain high-resolution absolute data.

[0002]

2. Description of the Related Art There are two methods of recognizing the position of a machine movable part such as a tool or a table of a machine tool, an incremental method and an absolute method.

The incremental method is provided with a pulse generator that generates one pulse each time the motor or the movable part of the machine moves by a predetermined amount or rotates by a predetermined angle, and the pulse generated by the pulse generator depends on the moving direction. This is a method in which the current position counter is counted up or down, and the count value of the current position counter is used as the current position of the mechanical moving part.

On the other hand, the absolute method is a method of displaying the position of the movable portion of the machine by a unique code by using an absolute code pattern.

However, in the former incremental method, the current position of the mechanical movable portion disappears when the power is turned off. For this reason, after the power is turned on, the machine moving part is returned to the origin, the contents of the current position counter are cleared to zero, the current position of the machine moving part and the contents of the current position counter are matched, and the subsequent position control is performed. I was going to do it.

However, the method of returning to the origin each time the power is turned on is not preferable because the operation becomes complicated.

On the other hand, according to the latter absolute method, the current position of the movable part of the machine does not disappear even if the power is cut off, the home-return operation after the power is turned on is unnecessary, and the position control is immediately performed. Has the advantage that

However, in the absolute method, if a code pattern of, for example, 24 bits is used as an encoder, not only the scale on which the code pattern is formed becomes large, but also the number of detectors for reading the code pattern is increased. There was a problem that the number of signal lines and signal lines would be enormous.

In order to solve such a problem, the applicant has already filed Japanese Patent Application No. 2-132434 and Japanese Patent Application No. 2-16.
9454 proposes a capacitance type encoder capable of obtaining absolute data over a wide measurement range with a small number of tracks without using a large number of code patterns such as an optical encoder.

[0010]

However, in this capacitance type encoder, since the data update time is slow,
In some cases, it may not be able to follow high-speed movement, and if absolute data is obtained only by this capacitance type encoder, the measuring range and dynamic range are still limited.

In order to solve such a problem, it is conceivable to provide different detectors on the same shaft like an absolute rotary encoder in which a resolver and a photoelectric detector are combined.

However, in the prior art, since the data of each detector is independently output and the data is synthesized on the communication partner side, the load on the communication partner side becomes large.

On the other hand, as a method for combining absolute data and incremental data, Japanese Patent Laid-Open No. 1-116 has been proposed.
In 409, the photoelectric absolute position data from the photoelectric absolute code pattern is preset,
Similarly, it is described that the photoelectric incremental pulse from the photoelectric incremental code pattern is counted and the count value is output as absolute data.

However, since both the absolute encoder and the incremental encoder are both of the photoelectric type, as in the case of using the photoelectric absolute encoder alone, a large number of tracks of the photoelectric code pattern are formed in the width direction. It had a problem that it was inevitable to be upsized.

The present invention has been made to solve the above-mentioned conventional problems. By combining an electrostatic capacity type detector and a photoelectric type detector, a small number of tracks, a high resolution and a long measuring range can be obtained. The purpose is to provide a wide absolute encoder.

[0016]

According to the present invention, in an absolute encoder for outputting a detection position as absolute data, a low-resolution long-wavelength capacitive absolute code pattern and a high-resolution short-wavelength photoelectric incremental code pattern are provided. Is formed in the position detection direction, a capacitance type detection means for reading the capacitance type absolute code and generating a long wavelength capacitance type absolute signal with a low resolution, and the photoelectric incremental code. By reading, photoelectric detection means for generating a high-resolution short-wavelength photoelectric incremental signal, and interpolating the photoelectric-type incremental signal, an interpolation circuit for generating a high-resolution short-wavelength photoelectric absolute signal , Based on the most significant digit of the photoelectric absolute signal, A carry generator that generates a carry signal to the least significant digit of the capacitance type absolute signal, and a counter that counts the capacitance type absolute signal and the carry signal to create a higher digit of the output absolute signal. And the output circuit that outputs the counter output as a high-order digit signal and the output based on the photoelectric absolute signal as a low-order digit signal, thereby achieving the above object.

Further, in the same absolute encoder, a scale in which a capacitance type absolute code pattern having a low resolution and a long wavelength and a photoelectric type incremental code pattern having a high resolution and a short wavelength are formed in a position detection direction, and the electrostatic scale Capacitive detecting means for reading a capacitive absolute code to generate a low-resolution, long-wavelength capacitive absolute signal, and a capacitive incremental signal for reading the photoelectric incremental code to obtain a high-resolution, short-wavelength photoelectric incremental signal. , A count pulse generating circuit that generates a count pulse based on the photoelectric incremental signal, the capacitance absolute signal and the count pulse, and counts the upper digit of the output absolute signal. Counter to create and the capacitance type A comparison circuit that compares the counter output with the counter output and corrects the counter output; and an output circuit that outputs the counter output as a high-order digit signal and outputs an output based on the photoelectric incremental signal as a low-order digit signal. As a result, the above-mentioned object is also achieved.

Further, in a similar absolute encoder, a capacitance type absolute code pattern having a low resolution and a long wavelength and a photoelectric absolute code pattern having a high resolution and a short wavelength are formed in a position detecting direction, and the electrostatic scale. Capacitive detecting means for reading a capacitive absolute code to generate a long-wavelength capacitive absolute signal with low resolution, and a photoelectric absolute code for reading the photoelectric absolute code to obtain a high-resolution short-wavelength photoelectric absolute signal. A photoelectric detection means for generating, a carry generator for generating a carry signal to the least significant digit of the capacitance type absolute signal based on the most significant digit of the photoelectric absolute signal, and the electrostatic Counts the capacitive absolute signal and carry signal to create the upper digit of the output absolute signal. A counter for, the counter output to an upper digit signals by an output circuit that outputs an output based on the photoelectric absolute signal as the low-order signal is also obtained by achieving the above object.

[0019]

According to a first aspect of the present invention, a capacitance type absolute code pattern having a low resolution and a long wavelength and a photoelectric type incremental code pattern having a high resolution and a short wavelength are formed on a scale, and the capacitance type absolute code pattern is formed. Capacitance type detection means for reading a code to generate a capacitance type absolute signal and photoelectric detection means for reading the photoelectric type incremental code and generating a photoelectric type incremental signal are provided. A photoelectric absolute signal is generated by interpolating the photoelectric incremental signal, and a carry signal to the least significant digit of the electrostatic capacitance absolute signal is generated based on the most significant digit of the photoelectric absolute signal. Further, the counter counts the electrostatic capacitance type absolute signal and the carry signal,
The upper digit of the output absolute signal is created, the counter output is used as the upper digit signal, and the output based on the photoelectric absolute signal is output as the lower digit signal.

Therefore, since the lower digit signal is produced by the output of the photoelectric detector, it can be produced at high speed. On the other hand, since the upper digit may be late, the use of the capacitance type detector can provide a wide measurement range with a small number of tracks. Although the capacitance type absolute signal is low speed, for example, when the power is turned on and after that, it is compared with the photoelectric type absolute signal at appropriate time intervals and corrected to obtain high resolution and absolute data with a wide measuring range. Can be obtained.

In the first aspect of the present invention, the photoelectric incremental signal is not directly combined with the capacitance absolute signal, but the photoelectric incremental signal is interpolated to generate a high resolution short wavelength photoelectric absolute signal. Therefore, it is possible to perform measurement with higher resolution or a wider dynamic range.

Further, in the second invention of the present invention, since the count pulse generator and the comparison circuit are used in place of the interpolation circuit and the carry generator of the first invention, the structure is relatively simple and high. It is possible to measure accuracy.

Further, in the third invention of the present invention, since the photoelectric absolute detection means for directly generating the photoelectric absolute signal is used instead of the photoelectric incremental detection means of the first invention, an interpolation circuit is used. It is possible to perform high resolution measurement with a wide dynamic range as in the first aspect of the invention without using it.

In the case where the photoelectric absolute code is a gray code whose rising edge is shifted for each bit in order to prevent occurrence of a count error due to a detection error, the gray code output is a binary code. It suffices to provide a decoder for converting into a photoelectric absolute signal.

[0025]

Embodiments of the present invention will now be described in detail with reference to the drawings.

FIG. 1 is a block diagram showing the overall configuration of a first embodiment of an absolute econcoder according to the present invention,
FIG. 2 is a perspective view showing a configuration of a scale and a detector used in the absolute encoder.

In this embodiment, low resolution, long wavelength electrostatic capacitance type absolute code patterns 11 to 13, 15, and 1 are used.
6 and a scale 1 having a high resolution and short wavelength photoelectric incremental code pattern 14 formed in the position detection direction.
0, a capacitance-type detector 20 for reading the capacitance-type absolute code at a low speed, and an output of the capacitance-type detector 20 is processed to obtain a capacitance type with a low resolution and a long wavelength. An electrostatic capacitance type detection circuit 30 for generating an absolute signal, and an electrostatic capacitance type absolute signal CAPDATA which collectively outputs the electrostatic capacitance type absolute signals output from the electrostatic capacitance type detection circuit 30 in a time division manner for each track.
A register 40 for creating a (parallel signal), a photoelectric detector 50 for reading the photoelectric incremental code at high speed, and an output of the photoelectric detector 50 are processed to obtain a high resolution and a short wavelength. A photoelectric detection circuit 60 that generates a photoelectric incremental signal, and an interpolation circuit 70 that interpolates the photoelectric incremental signal to generate a high-resolution short-wavelength photoelectric absolute signal (parallel signal) b3 to b0. A carry generator 80 for generating a carry signal to the least significant digit of the capacitance type absolute signal based on the most significant digit of the photoelectric absolute signal output from the interpolation circuit 70; Up / down with preset input (UP / UP) that counts the absolute signal and carry signal and creates the upper digit of the output absolute signal (serial signal) SO DN) counter 90, the electrostatic capacity type absolute signal of the output of the register 40 and the output of the up / down counter 90 are compared, and when the difference is large, an NG signal is generated to correct the output of the counter 90. A comparator circuit 100, a parallel-in-serial-out shift register 110 for outputting the up-down counter 90 output (parallel signal) as a high-order digit signal and outputting the photoelectric absolute signal as a low-order digit signal as a serial signal to the outside, and An RS flip-flop (F / F) 120 for holding the NG signal of the comparison circuit 100;
The photoelectric absolute signal b0 output from the interpolation circuit 70,
An exclusive OR gate 130 for generating the two-phase square wave signals A and B from b1 and outputting them to the outside.

On the scale 10, as shown in detail in FIG. 3, the capacitance type first coarse-precision measuring apparatus is arranged in order of increasing wavelength.
A track 11, a second track 12 for measuring intermediate precision, and a third track 13 for measuring fine precision are formed, and the third track 13 is further subdivided in the position detection direction inside the photoelectric fourth track. (Photoelectric main scale) 14.

As described above, the capacitance-type third track and the photoelectric-type fourth track physically share the same track, so that the width of the entire scale 10 can be reduced. .. It is also possible to make the electrostatic capacitance type third track and the photoelectric type fourth track independent.

In FIG. 3, reference numeral 15 is a transmission electrode for the first track, and 16 is a transmission electrode for the second track.

As shown in FIG. 2, the capacitance type detector 20 faces the main scale 10 and a pickup 22 which is relatively movable in the position detecting direction.
A transmission (drive) electrode 24 formed on the pickup 22 and to which, for example, an 8-phase AC signal is sequentially applied,
The receiving electrode 25 for the track 11 and the second track 1
2 for receiving electrodes 26. When receiving the signal from the third track 13, the receiving electrodes 25 and 26 are used together.

Here, the photoelectric detector 50 is structured so that the electrostatic capacity type detector 20 is sandwiched between the photoelectric type detector 50 and the electrostatic capacity type detector 20. This is to prevent deviation from the detection value of the lowest track 14 by the photoelectric method.

The detection principle of the capacitance type detector 20 will be briefly described below.

FIG. 4 is a schematic drawing of an electrode pattern of a capacitance type absolute encoder having a length measuring range for one track (third track 13 in the figure) for simplification of description. ..

This capacitance type absolute encoder is composed of the scale 10 and the pickup 22 which moves along the scale at a constant interval.

The scale 10 and the pickup 22 are
On an insulator such as a glass plate or glass epoxy plate,
A conductive pattern is formed by etching and used as an electrode.

The voltage applied to the transmission electrode 24 on the pickup 22 is applied to the track electrode 13 on the scale 10.
Is transmitted via capacitive coupling. Furthermore, the track electrode 13 on the scale 10 and the transmission electrode (for example, 15) are connected by wiring, and the transmission electrode 17 and the reception electrode (for example, 25) on the pickup 22 are connected by capacitance. Therefore, a signal corresponding to the capacitance is obtained by the receiving electrode 25.

Since the pitches of the tracks on the scale 10 and the transmission electrodes 17 are different from each other, the inclination of the wiring connecting them is different depending on the position on the scale.

The transmitting electrode 24 is composed of, for example, an electrode group connected to every eight electrodes, and the electrical connection between the electrode elements can be freely selected by the circuit board.

The pitch of the receiving electrodes 25 is set to a length corresponding to one set of the transmitting electrodes 24, and the length of the receiving electrodes 25 in the detection direction is set to a length corresponding to a half wavelength (4 lines) of the transmitting electrodes 24. ing.

Now, assuming that the positional relationship between the pickup 22 and the scale 10 is fixed, the interconnections of the transmission electrodes 24 are sequentially arranged in the first to fourth, second to fifth, third to sixth ... When the capacitance is changed and the capacitance between the transmission electrode 24 and the reception electrode 25 is measured in each case, the capacitances correspond to the points shifted in phase by 45 ° on the sine wave of one cycle. Conversely, select a specific connection and pick up 22
It can be seen that when the relative position of the scale 10 is moved, it moves on the same sine wave according to the movement of the pickup 22. This is the detection principle of the electrostatic capacity encoder, and the movement direction is determined by changing the combination of the transmission electrodes 24 and confirming the direction of phase change.

By changing the connection of the transmitting electrodes in this way, a sine (SIN) wave and a cosine (C) as shown in FIG. 5 are obtained.
Since the capacitance waveform of the (OS) wave is obtained, the value of the position X can be obtained by performing the calculation of tan ⁻¹ (sin X / cos X) in the capacitance type detection circuit 30.

The detailed construction and operation of the capacitance type detector are described in Japanese Patent Application No. Hei 2-132434 previously proposed by the applicant.
Since it is described in Japanese Patent Application No. 2-169654, detailed description will be omitted.

The register 40 is a capacitance type detector 2
It has a function of synthesizing and outputting signals obtained from three tracks of 0.

That is, the data of the upper three tracks obtained by the capacitance type detection circuit 30 has an overlapping portion of, for example, 3 bits each as shown in FIG. this is,
This is an overlap of margin bits for avoiding that the lower track cannot be accurately specified due to the error and the quantization error of each track. Therefore, the register 40 receives the data corresponding to each track in a time division manner, confirms that the overlapping portions are within a predetermined difference from each other, and synthesizes and outputs.

When the data of the overlapping portion is different,
For example, lower data can be adopted as a correct value. At this time, if the data difference in the overlapping portion is larger than the specified value, it can be interpreted that an abnormality has occurred and an error signal can be generated.

Further, the photoelectric detector 50 is, as shown in detail in FIG. 7, the pickup 22 of the capacitance type detector.
Through the slit plate 52 that moves integrally with the pickup 22 and the opening 22A (see FIG. 2) formed in the central portion of the pickup 22.
The slit 54, which is reflected by the surface of the scale 10 or the fourth track 14 and is 90 ° out of phase with each other, for emitting diffused light to the track 13) and having a characteristic close to a point light source. Four phototransistors 56 for respectively receiving the light modulated by the four index scales 53 on the plate 52,
It consists of

In this embodiment, since the sine waves having different phases are obtained by the one light source 4 and the light receiving element, the sine wave having a stable predetermined pitch which is strong against the gap fluctuation between the slit plate 52 and the scale 10 and the temperature fluctuation. Is obtained.

The detailed construction and operation of the photoelectric detector 50 and the photoelectric detector circuit 60 for processing the output thereof to generate a two-phase sine wave signal whose phase is shifted by 90 ° are described in Japanese Patent Application Laid-Open No. Since it is disclosed in 187413 and the like, description thereof will be omitted.

The interpolating circuit 70, as shown in FIG.
The preamplifier 70A to which the phase signals A and B are input,
70B and an inverting amplifier 71 for inverting the A-phase input
And a resistor chain 72 made up of resistors R1 to R8, and two adjacent nodes of the resistor chain 72 having two comparators 74A and 7A.
Analog switch group 73 for sequentially connecting to 4B,
The comparators 74A and 74B and the comparator 7
A flip-flop 75A for generating a counting pulse and a pulse indicating a counting direction according to the outputs of 4A and 74B,
75B and 75C and the flip-flops 75A to 75C
A controller 76 that generates data based on the output of the analog switch group 73 and a signal that feedback-controls the analog switch group 73, and an up / down (UP / DN) counter 77 that counts the output of the controller 76.
And a decoder 78 for decoding the count value of the up / down counter 77, and a latch 7 for controlling the analog switch group 73 by latching the output of the decoder 78.
9 and 9.

The technique of electrically interpolating a sine wave and a cosine wave, which has been generally used in the past, connects the two signals with a resistor array having a predetermined resistance value, and the phase-shifted signals appearing at the nodes are connected. The zero cross point was read by the comparator. The problems with this method are the deterioration of accuracy due to variations in the offset values of many comparators, and the limit of response speed due to phase overlap during high-speed movement of the detector.

Therefore, in the present embodiment, the effect of the offset voltage is reduced by switching the input of one comparator 74A or 74B by the analog switch 73, although the method is basically the same as the method using the conventional resistor array. ing. Further, the up / down counter 7 is connected so that the nodes at the zero cross points are sequentially connected to the comparator.
7, feedback is applied by the decoder 78 and the latch 79 to substantially improve the response speed.

Since the detailed construction and operation of the interpolation circuit 70 are described in Japanese Patent Laid-Open No. 1-212314, detailed description thereof will be omitted.

This interpolating circuit 70 receives a resistance from a two-phase square wave signal with a 90 ° phase difference, which is obtained by shaping the analog output waveform of the photoelectric detection circuit 60 as shown in the upper part of FIG. 9, for example. By the division, finally, signals (b0 to b3) of binary (BIN) code as shown in the lower part of FIG. 9 are obtained. The binary code signals b3 to b0 are used for the carry generator 80.
Entered in.

The carry generator 80 is constructed, for example, as shown in FIG. 10, and the rising edge detection circuit 82 and the falling edge detection circuit 84 detect the most significant digit signal b3 as shown in the time chart of FIG. Observe the edge, RS-F
The direction determination signal UP and the count pulse signal CP are output via / F88 or the like.

The delay element 86 commonly included in the rising edge detecting circuit 82 and the falling edge detecting circuit 84 is made up of a resistor R, a capacitor C and a Schmitt trigger element ST, as shown in FIG. 12, for example. You can also

Further, the rising edge detection circuit 82 has two D-flip-flops (F / F / F / F / F) as shown in FIG.
F) and an AND gate. This A
The ND gate may be replaced with a NOR gate to form the falling edge detection circuit 84.

The counting pulse generated by the carry generator 80 is input to the up / down counter 90, and the digit data exceeding the absolute data generated by the photoelectric detection circuit 60 is generated. As shown in FIG. 6, the data of this digit is also created in the register 40 of the electrostatic capacitance type detection unit, so it is compared with this and corrected.

In other words, the value of the register 40 (input A) and the value of the counter 90 (input B) are compared in the comparison circuit 100 having the structure shown in FIG. 14, for example. Specifically, the inputs A and B to be compared are added by an adder (subtractor) 102.
, And the result is judged by the decoder 104.

FIG. 15 shows an example of the truth table of the decoder 104. In this truth table, the rising edge detection circuit 106 generates an NG signal when the difference is ± 2 or more. .. The counter 90 is preset by this NG signal, and data is loaded again.

It should be noted that the two DFs in the latter stage of the decoder 104 are
The rising edge detection circuit 106 composed of / F and an AND gate detects the generation of the NG signal (LD signal) input to the counter 90 and converts it into a pulse signal having an appropriate width (corresponding to the cycle of the clock CK2). It is used for the purpose of conversion.

FIG. 16 shows a time chart of the comparison circuit 100.

With this comparison circuit 100, the counter 90
If the value of is deviated from the absolute data of the capacitance type for detecting the upper absolute value, it is automatically updated to the correct absolute value.

The function of the comparison circuit 100 can be easily realized by software calculation by a microcomputer.

When it is desired to inform the external communication partner that the NG signal has been generated in the comparison circuit 100, once RS
-Store the NG signal in the F / F 120 and shift register 1
The data may be transferred to 10 and then serially transferred to the communication partner.

The shift register 110 converts a parallel data signal into a serial data signal and then serially transfers it to the communication partner side (external).

In the first embodiment, since the photoelectric absolute data obtained by the incremental photoelectric detector is interpolated to obtain the photoelectric absolute data, the scale of the photoelectric encoder is simple.

Next, the second embodiment of the present invention will be described in detail.

In this second embodiment, as shown in FIG. 17, instead of the interpolation circuit 70 and the carry generator 80 of the first embodiment, a two-phase square wave signal CA output from the photoelectric detection circuit 60,
A count pulse generation circuit 200 for directly generating a count pulse from the CB is provided, and the count pulse generation circuit 20 is provided.
0 output is up / down counter 9 with preset input
The input is made directly to 0.

Further, the two-phase signals A and B for external output are also obtained directly from the output of the counter 90 instead of the output of the carry generator 80.

Photoelectric detection circuit 6 in the second embodiment
FIG. 18 shows a time chart from the outputs CA and CB of 0 to the counter 90.

The rest of the structure and operation are the same as in the first embodiment, so a description thereof will be omitted.

In this embodiment, the two-phase square wave signals A and B for external communication are not directly output from the photoelectric detection circuit 60, but are newly combined by the exclusive OR gate 130 based on the output of the counter 90. It is generated in order to synchronize with the serial output SO of the parallel-in / serial-out shift register 110.

In this embodiment, since there is no interpolation circuit, the resolution is slightly inferior, but the configuration is very simple.

Next, the third embodiment of the present invention will be described in detail.

In the third embodiment, as shown in FIG. 19, the photoelectric sensor 5 of the incremental type of the first embodiment is used.
0 and the photoelectric detection circuit 60, for example, four photoelectric detectors 301 to 304 for reading photoelectric absolute code patterns formed on each of the four photoelectric tracks, and the photoelectric detectors The photoelectric detection circuits 311 to 314 for processing the outputs to generate the parallel outputs g0 to g3 of the gray code and the gray code outputs g0 to g3 are binary (BIN) suitable for the subsequent processing.
And a decoder 320 for converting the code outputs b3 to b0. Each photoelectric detection circuit 311 in this embodiment
The analog output waveforms of ˜314 are as shown in the upper part of FIG. 20, for example.
The gray code outputs g0 to g3 processed in 4 are the same as in FIG.
It will be as shown in the bottom row.

Here, the reason why the rising edges of the gray code output are deviated is to prevent a counting error when the rising edges are coincident with each other. However, since the binary code is preferable in the subsequent processing, the decoder At 320, it is converted into a binary code. When the binary code output is directly obtained from the photoelectric detection circuit, the decoder 32
0 can be omitted.

The rest of the structure and operation are the same as in the first embodiment, so a description thereof will be omitted.

According to the third embodiment, it is possible to measure with high resolution or a wide dynamic range equivalent to that of the first embodiment without using an interpolation circuit.

A changeover switch is provided on the input side of the carry generator 80 so that either the output of the interpolating circuit 70 of the first embodiment or the output of the decoder 320 of the third embodiment can be selectively input. You can also

[0081]

As described above, according to the present invention, the advantages of the electrostatic capacity type encoder having a wide measuring range with a small number of tracks and the photoelectric type encoder having a high speed and a high resolution can be utilized to obtain a high performance. It has an excellent effect that measurement with a wide resolution or a wide dynamic range can be performed over a wide length measuring range with a small number of tracks.

[Brief description of drawings]

FIG. 1 is a block diagram showing an overall configuration of a first embodiment of the present invention.

FIG. 2 is a perspective view showing a configuration of a scale and a detector of the first embodiment.

FIG. 3 is a plan view showing a part of the scale pattern of the first embodiment in an enlarged manner.

FIG. 4 is a perspective view for explaining the operation of the capacitance type detector.

FIG. 5 is a diagram showing an example of an output waveform of a capacitance type detector.

FIG. 6 is a diagram showing a data configuration for explaining the operation of the register and the comparison circuit of the first embodiment.

FIG. 7 is a vertical cross-sectional view showing the structure of the photoelectric detector of the first embodiment.

FIG. 8 is a block diagram showing a configuration example of an interpolation circuit used in the first embodiment.

FIG. 9 is a time chart showing an example of the relationship between the output of the photoelectric detection circuit and the binary code signal of the output of the interpolation circuit in the first embodiment.

FIG. 10 is a circuit diagram showing a configuration example of a carry generator used in the first embodiment.

FIG. 11 is a time chart showing the operation of the carry generator.

FIG. 12 is a circuit diagram showing a modification of the delay element used in the carry generator.

FIG. 13 is a circuit diagram showing a modified example of the rising edge detection circuit also used in the carry generator.

FIG. 14 is a circuit diagram showing a configuration example of a comparison circuit used in the first embodiment.

FIG. 15 is a diagram showing a truth table of a decoder used in the comparison circuit.

FIG. 16 is a time chart showing the operation of the comparison circuit.

FIG. 17 is a block diagram showing an overall configuration of a second embodiment of the present invention.

FIG. 18 is a time chart showing the operation from the photoelectric detector to the counter in the second embodiment.

FIG. 19 is a block diagram showing an overall configuration of a third embodiment of the present invention.

FIG. 20 is a time chart showing an example of the relationship between the photoelectric detection circuit output and the gray code output in the third embodiment.

[Explanation of symbols]

10 ... Scale, 11-13 ... Capacitance type track, 14 ... Photoelectric type track, 20 ... Capacitance type detector, 30 ... Capacitance type detection circuit, 40 ... Register, 50, 301-304 ... Photoelectric type Detector, 60, 311 to 314 ... Photoelectric detection circuit, 70 ... Interpolation circuit, 80 ... Carry generator, 90 ... Up-down counter with preset input, 100 ... Comparison circuit, 110 ... Parallel-in-serial-out shift register , 200 ... Count pulse generation circuit, 320 ... Decoder.

Claims (5)

[Claims] 1. An absolute encoder for outputting a detection position as absolute data, wherein a low-resolution long-wavelength capacitive absolute code pattern and a high-resolution short-wavelength photoelectric incremental code pattern are formed in the position detection direction. A scale, a capacitance type detection unit that reads the capacitance type absolute code and generates a capacitance type absolute signal with a low resolution and a long wavelength, and a high resolution and a short period by reading the photoelectric type incremental code. Photoelectric detection means for generating a photoelectric incremental signal of a wavelength, an interpolation circuit for interpolating the photoelectric incremental signal to generate a short-wave photoelectric absolute signal with high resolution, and a maximum of the photoelectric absolute signal. Based on the upper digits, the capacitance type absolute A carry generator for generating a carry signal to the least significant digit of the output signal, a counter for counting the capacitance type absolute signal and the carry signal, and creating a higher digit of the output absolute signal, and the counter. An absolute encoder, comprising: an output circuit that outputs an upper digit signal and outputs an output based on the photoelectric absolute signal as a lower digit signal. 2. The absolute encoder according to claim 1, further comprising a comparison circuit that compares the electrostatic capacitance type absolute signal with the counter output and corrects the counter output. 3. An absolute encoder for outputting a detected position as absolute data, wherein a low-resolution long-wavelength capacitive absolute code pattern and a high-resolution short-wavelength photoelectric incremental code pattern are formed in the position detection direction. A scale, a capacitance type detection unit that reads the capacitance type absolute code and generates a capacitance type absolute signal with a low resolution and a long wavelength, and a high resolution and a short period by reading the photoelectric type incremental code. Photoelectric detection means for generating a photoelectric incremental signal of a wavelength, a count pulse generating circuit for generating a count pulse based on the photoelectric incremental signal, counting the capacitance absolute signal and a count pulse, and outputting Higher rank of absolute signal And a comparator circuit that compares the electrostatic capacitance absolute signal and the counter output, and corrects the counter output, the counter output as a higher digit signal, and an output based on the photoelectric incremental signal. An absolute encoder comprising: an output circuit that outputs a lower digit signal. 4. An absolute encoder for outputting a detected position as absolute data, wherein a low-resolution long-wavelength capacitive absolute code pattern and a high-resolution short-wavelength photoelectric absolute code pattern are formed in the position detection direction. A scale, a capacitance type detection unit that reads the capacitance type absolute code to generate a capacitance type absolute signal with a low resolution and a long wavelength, and a photoelectric type absolute code that is read to obtain a high resolution and a short length. Photoelectric detection means for generating a photoelectric absolute signal of a wavelength, and carry generation for generating a carry signal to the least significant digit of the capacitance absolute signal based on the most significant digit of the photoelectric absolute signal And the capacitance-type absolute signal and carry signal are counted. An absolute circuit comprising: a counter that creates a higher digit of the output absolute signal; and an output circuit that outputs the counter output as a higher digit signal and an output based on the photoelectric absolute signal as a lower digit signal. Encoder. 5. The absolute encoder according to claim 4, wherein the photoelectric absolute code is a gray code, and a decoder for converting the gray code output into a binary code photoelectric absolute signal is provided.