JPH0754260B2 - Absolute encoder - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an absolute encoder for outputting a detection position as absolute data, and particularly, by combining detection values of a capacitance type encoder and a photoelectric type encoder, a wide measuring range can be obtained. The present invention relates to an absolute encoder capable of obtaining high resolution absolute data.

[0002]

2. Description of the Related Art There are two methods of recognizing the position of a machine movable part such as a tool or a table of a machine tool, an incremental method and an absolute method.

The incremental system is provided with a pulse generator that generates one pulse each time the motor or the movable part of the machine moves by a predetermined amount or rotates by a predetermined angle, and the pulse generated by the pulse generator depends on the moving direction. This is a method in which the current position counter is counted up or down and the count value of the current position counter is used as the current position of the mechanical moving part.

On the other hand, the absolute method is a method of displaying the position of the machine movable portion by a unique code by using an absolute code pattern.

However, in the former incremental method, the current position of the mechanical movable portion disappears when the power is turned off. For this reason, after the power is turned on, the machine moving part is returned to the origin, and the contents of the current position counter are cleared to zero so that the current position of the machine moving part matches the contents of the current position counter. Was going to do.

However, the method of returning to the origin each time the power is turned on is not preferable because the operation becomes complicated.

On the other hand, according to the latter absolute method, the current position of the movable part of the machine does not disappear even if the power is cut off, the home-return operation after the power is turned on is unnecessary, and the position control is performed immediately. Has the advantage that

However, in the absolute method, if a code pattern of, for example, 24 bits is used as an encoder, not only the scale on which the code pattern is formed becomes large, but also the number of detectors for reading the code pattern is increased. There was a problem that the number of signal lines and signal lines would be enormous.

In order to solve such problems, the applicant has already filed Japanese Patent Application No. 2-132434 and Japanese Patent Application No. 2-16.
9454 proposes a capacitance type encoder capable of obtaining absolute data over a wide measuring range with a small number of tracks without using a large number of code patterns such as an optical encoder.

[0010]

However, in this capacitance type encoder, since the data update time is slow,
In some cases, it may not be able to follow high-speed movements, and when absolute data is obtained only with this capacitance type encoder, the measuring range and dynamic range are still limited.

In order to solve such a problem, it is conceivable to provide different detectors on the same shaft, such as an absolute rotary encoder combining a resolver and a photoelectric detector.

However, conventionally, the data of each detector is independently output and the data is synthesized by the communication partner side, so that the load on the communication partner side becomes large.

On the other hand, as a method of combining absolute data and incremental data, Japanese Patent Laid-Open No. 1-116 has been proposed.
The photoelectric absolute position data from the photoelectric absolute code pattern is preset in 409,
Similarly, it is described that photoelectric incremental pulses from the photoelectric incremental code pattern are counted and the count value is output as absolute data.

However, since both the absolute encoder and the incremental encoder are both photoelectric, as in the case where the photoelectric absolute encoder is used alone, a large number of tracks of the photoelectric code pattern are formed in the width direction. There was a problem that it was inevitable to increase the size.

When a capacitance type detector and a photoelectric type detector having different response speeds are combined, especially Japanese Patent Application No. 2-1324.
34 and Japanese Patent Application No. Hei 2-169454, the response speed is slow, and the response speed is slow and the capacitance type detector is difficult to detect the correct position unless the scale is stationary or almost stationary. When combined with a photoelectric detector,
If data are simply combined without considering the difference in response speed between the two, as in Japanese Patent Laid-Open No. 116409/1989, when the scale is moved, it is detected by a difference in data storage time due to a difference in data detection required time. There is a problem in that the position changes and accurate calibration cannot be performed.

In order to solve such a problem, it is conceivable to add an error detecting function to the capacitance type detector itself, which indicates an erroneous measurement value during movement of the scale. When the speed change, that is, the acceleration is large, the scale position changes between the photoelectric detection time and the capacitance detection time, for example, as shown in FIG. 18, but the scale position is stable at each detection time. In such a case, accurate error detection cannot be performed.

The present invention has been made to solve the above-mentioned conventional problems. By combining an electrostatic capacity type detector and a photoelectric type detector, a high resolution and a long measuring range can be achieved with a small number of tracks. It is also an object of the present invention to provide an absolute encoder that is broad and that can improve the reliability of output data regardless of the difference in response speed between the capacitance type detector and the photoelectric type detector.

[0018]

According to the present invention, in an absolute encoder for outputting a detected position as absolute data, a low-resolution long-wavelength capacitive absolute code pattern and a high-resolution short-wavelength photoelectric incremental code pattern are provided. And a scale formed in the position detection direction, a capacitance type detecting means for reading the capacitance type absolute code to generate a capacitance type absolute signal, and a photoelectric type incremental signal for reading the photoelectric type incremental code. A photoelectric detection means for generating, an output means for calibrating the incremental data obtained from the photoelectric incremental signal with absolute data obtained from the electrostatic capacity absolute signal to obtain output absolute data, and the incremental Compared with over data and absolute data, by providing a comparing means for generating an error signal when the difference exceeds the allowable range, it is obtained by achieving the above object.

[0019]

The present invention forms a low-resolution long-wavelength electrostatic capacitance type absolute code pattern and a high-resolution short-wavelength photoelectric incremental code pattern on a scale, and reads the capacitance type absolute code. An electrostatic capacitance type detection unit for generating an electrostatic capacitance type absolute signal and a photoelectric type detection unit for reading the photoelectric type incremental code and generating a photoelectric type incremental signal are provided. The incremental data obtained from the photoelectric incremental signal is calibrated with the absolute data obtained from the electrostatic capacitance absolute signal to obtain output absolute data.

Therefore, since the high resolution incremental data is created by the output of the photoelectric detector, it can be created at high speed. On the other hand, since low-resolution absolute data may be slow, it is possible to provide a wide measuring range with a small number of tracks by using a capacitance type detector. Although the capacitance type absolute signal is low speed, for example, when the power is turned on and after that, it is compared with the photoelectric type absolute signal at appropriate time intervals, and is corrected if necessary to achieve high resolution and a wide measuring range. Output absolute data with can be obtained.

At this time, since the incremental data is compared with the absolute data and an error signal is generated when the difference exceeds the allowable range, for example, the incremental data storage time and the absolute data storage time depend on the difference in response speed. It is possible to know that the detection position has changed due to the shift of the scale and the scale movement during that time, and it is possible to prevent an error in the comparison result and improve the reliability of the output data. Therefore, even if the scale has a large acceleration, the determination result will not be erroneous.

In particular, when the photoelectric incremental data immediately after the capacitance absolute data is read and the absolute data are compared, the incremental data requires a shorter detection time, and therefore the storage time of both data is The deviation can be reduced to reduce the possibility of error detection.

Further, when the average value of the photoelectric incremental data before and after reading the electrostatic capacitance absolute data is compared with the absolute data, the possibility of error detection can be further reduced.

Further, the determination of the error signal generation is performed when the changing speed of the incremental data immediately before reading the absolute data is less than or equal to a predetermined value and / or the changing amount of the incremental data before and after reading the absolute data is predetermined. If it is performed when the value is less than or equal to the value, the accuracy of error determination can be improved.

In the case where the capacitance type absolute code pattern includes a plurality of tracks arranged in parallel with different resolutions and wavelengths from each other and the error signal generation criterion is a different value for each track. Can compare only coarse absolute data when the scale is moving at high speed, and can compare fine absolute data when the scale is moving at low speed, thus shortening the comparison time.

[0026]

Embodiments of the present invention will now be described in detail with reference to the drawings.

FIG. 1 is a block diagram showing the overall construction of a first embodiment of an absolute econcoder according to the present invention,
FIG. 2 is a perspective view showing a configuration of a scale and a detector used in the absolute encoder.

In this embodiment, low resolution, long wavelength electrostatic capacitance type absolute code patterns 11 to 13, 15, 1 are used.
6 and a scale 1 having a high resolution and short wavelength photoelectric incremental code pattern 14 formed in the position detection direction.
0, a capacitance-type detector 20 for reading the capacitance-type absolute code at low speed, and an output of the capacitance-type detector 20 is processed to obtain a capacitance type of low resolution and long wavelength. An electrostatic capacitance type detection circuit 30 for generating an absolute signal, and an electrostatic capacitance type absolute signal CAPDATA which collectively outputs the electrostatic capacitance type absolute signals output from the electrostatic capacitance type detection circuit 30 for each track in a time division manner.
A register 40 for creating a (parallel signal), a photoelectric detector 50 for reading the photoelectric incremental code at high speed, and an output of the photoelectric detector 50 are processed to obtain a high resolution and a short wavelength. A photoelectric detection circuit 60 that generates a photoelectric incremental signal, and an interpolation circuit 70 that interpolates the photoelectric incremental signal to generate a high-resolution short-wavelength photoelectric absolute signal (parallel signal) b3 to b0. A carry generator 80 for generating a carry signal to the least significant digit of the capacitance type absolute signal based on the most significant digit of the photoelectric absolute signal output from the interpolation circuit 70, and the capacitance type. Up / down with a preset input (UP / UP) that counts the absolute signal and carry signal and creates the upper digit of the output absolute signal (serial signal) SO DN) counter 90, the capacitance type absolute signal of the output of the register 40 and the output of the up / down counter 90 are compared, and when the difference is large, the error signal (NG signal) of the present invention is generated, A comparator circuit 100 that corrects the output of the counter 90, and a parallel-in-serial-out that outputs the up-down counter 90 output (parallel signal) as a high-order digit signal and outputs the photoelectric absolute signal as a low-order digit signal as a serial signal to the outside. Shift register 110 and the comparison circuit 1
R-S flip-flop (F / F) 120 for holding the NG signal of 00, and two-phase square wave signals A and B from the photoelectric absolute signals b0 and b1 output from the interpolating circuit 70 to generate an external signal. And an exclusive OR gate 130 for outputting

On the scale 10, as shown in detail in FIG. 3, a capacitance-type coarse accuracy measurement first unit is arranged in order of increasing wavelength.
A track 11, a second track 12 for measuring intermediate accuracy, and a third track 13 for measuring fine accuracy are formed, and the third track 13 is further finely divided in the position detection direction inside the fourth track of photoelectric type. (Photoelectric main scale) 14.

As described above, the capacitance-type third track and the photoelectric-type fourth track physically share the same track, so that the width of the entire scale 10 can be reduced. . It is also possible to make the electrostatic capacitance type third track and the photoelectric type fourth track independent.

In FIG. 3, 15 is a transmission electrode for the first track, and 16 is a transmission electrode for the second track.

As shown in FIG. 2, the capacitance type detector 20 faces the main scale 10 and a pickup 22 which is relatively movable in the position detecting direction.
A transmission (driving) electrode 24 formed on the pickup 22 and to which, for example, an 8-phase AC signal is sequentially applied,
The receiving electrode 25 for the track 11 and the second track 1
The receiving electrode 26 for 2 is provided. When receiving the signal from the third track 13, the receiving electrodes 25 and 26 are used together.

Here, the photoelectric detector 50 is structured such that the electrostatic capacitance detector 20 is sandwiched between the photoelectric detection device 50 and the electrostatic capacitance detection device 20. This is to prevent deviation from the detection value of the lowest track 14 by the photoelectric method.

The detection principle of the capacitance type detector 20 will be briefly described below.

FIG. 4 is a schematic drawing of an electrode pattern of a capacitance type absolute encoder having a length measuring range for one track (third track 13 in the figure) for simplification of description. .

This capacitance type absolute encoder is composed of the scale 10 and the pickup 22 which moves along the scale at a constant interval.

The scale 10 and the pickup 22 are
On an insulator such as glass plate or glass epoxy plate,
A conductive pattern is formed by etching and used as an electrode.

The voltage applied to the transmission electrode 24 on the pickup 22 is applied to the track electrode 13 on the scale 10.
Is transmitted via capacitive coupling. Furthermore, the track electrode 13 on the scale 10 and the transmission electrode (for example, 15) are connected by wiring, and the transmission electrode 17 and the reception electrode (for example, 25) on the pickup 22 are connected by capacitance. Therefore, a signal corresponding to the capacitance is obtained by the receiving electrode 25.

Since the pitches of the tracks on the scale 10 and the transmission electrodes 17 are different from each other, the inclination of the wiring connecting them is different depending on the position on the scale.

The transmitting electrode 24 is composed of, for example, an electrode group connected every eight electrodes, and the electrical connection between the electrode elements can be freely selected by the circuit board.

The pitch of the receiving electrodes 25 is set to a length corresponding to one set of the transmitting electrodes 24, and the length of the receiving electrodes 25 in the detection direction is set to a length corresponding to a half wavelength (4 lines) of the transmitting electrodes 24. ing.

Now, assuming that the positional relationship between the pickup 22 and the scale 10 is fixed, the interconnections of the transmission electrodes 24 are sequentially arranged in the first to fourth, second to fifth, third to sixth ... When the capacitance between the transmission electrode 24 and the reception electrode 25 is measured in each case by changing the capacitance, capacitances corresponding to respective points shifted by 45 ° on the sine wave of one cycle are obtained. On the contrary, select a specific connection and pick up 22
It can be seen that when the relative position of the scale 10 is moved, it moves on the same sine wave according to the movement of the pickup 22. This is the detection principle of the capacitance type encoder, and the movement direction is determined by changing the combination of the transmission electrodes 24 and confirming the direction of phase change.

By changing the connection of the transmitting electrodes in this way, a sine (SIN) wave and a cosine (C) as shown in FIG.
Since the capacitance waveform of the (OS) wave is obtained, the value of the position X can be obtained by calculating tan ⁻¹ (sin X / cos X) in the capacitance type detection circuit 30.

The detailed structure and operation of the capacitance type detector are described in Japanese Patent Application No. Hei 2-132434 previously proposed by the applicant.
Since it is described in Japanese Patent Application No. 2-169654, detailed description will be omitted.

The register 40 is a capacitance type detector 2
It has a function of synthesizing and outputting signals obtained from three tracks of 0.

That is, the data of the upper 3 tracks obtained by the capacitance type detection circuit 30 has an overlapping portion of, for example, 3 bits each as shown in FIG. this is,
This is an overlap of margin bits for avoiding that the lower track cannot be accurately specified due to the error and the quantization error of each track. Therefore, the register 40 receives the data corresponding to each track in a time division manner, confirms that the overlapping portions are within a predetermined difference from each other, and synthesizes and outputs.

When the data of the overlapping portion is different,
For example, lower data can be adopted as a correct value. At this time, if the data difference in the overlapping portion is larger than the specified value, it can be interpreted that an abnormality has occurred and an error signal can be generated.

Further, the photoelectric detector 50 is, as shown in detail in FIG. 7, the pickup 22 of the capacitance type detector.
Through the slit plate 52 that moves integrally with the pickup 22 and the opening 22A (see FIG. 2) formed in the central portion of the pickup 22, the fourth track 14 (the third
The slit 54, which is reflected by the surface of the scale 10 or the fourth track 14 and has a phase difference of 90 ° from each other, for emitting diffused light to the track 13) and having a characteristic close to a point light source. Four phototransistors 56 for respectively receiving the light modulated by the four index scales 53 on the plate 52,
It consists of

In the present embodiment, since the sine waves having different phases are obtained by the one light source 4 and the light receiving element, the sine wave having a stable predetermined pitch which is strong against the gap fluctuation between the slit plate 52 and the scale 10 and the temperature fluctuation. Is obtained.

The detailed construction and operation of the photoelectric detector 50 and the photoelectric detector circuit 60 for processing the output thereof to generate a two-phase sine wave signal with a phase difference of 90 ° are described in Japanese Patent Laid-Open Publication No. HEI-1. Since it is disclosed in -187413 and the like, its explanation is omitted.

The interpolating circuit 70, as shown in FIG.
The preamplifier 70A to which the phase signals A and B are input,
70B and an inverting amplifier 71 for inverting the A-phase input
And a resistor chain 72 made up of resistors R1 to R8, and two adjacent nodes of the resistor chain 72 having two comparators 74A and 7A.
Analog switch group 73 for sequentially connecting to 4B,
The comparators 74A and 74B and the comparator 7
A flip-flop 75A for generating a counting pulse and a pulse indicating a counting direction according to the outputs of 4A and 74B,
75B and 75C and the flip-flops 75A to 75C
Based on the output of the controller 76, the controller 76 generates a signal for feedback-controlling the analog switch group 73 and an up / down (UP / DN) counter 77 for counting the output of the controller 76.
And a decoder 78 for decoding the count value of the up / down counter 77, and a latch 7 for controlling the analog switch group 73 by latching the output of the decoder 78.
It is composed of 9 and 9.

The technique of electrically interpolating a sine wave and a cosine wave, which has been generally used in the past, connects both signals with a resistor array having a predetermined resistance value, and the phase-shifted signals appearing at the nodes are connected. The zero cross point was read by the comparator. The problems with this method are the deterioration of accuracy due to variations in the offset values of many comparators, and the limit of the response speed due to phase overlap during high-speed movement of the detector.

Therefore, in the present embodiment, the effect of the offset voltage is reduced by switching the input of one comparator 74A or 74B by the analog switch 73, although the method is basically the same as the method using the conventional resistor array. ing. Further, the up / down counter 7 is connected so that the nodes at the zero cross points are sequentially connected to the comparator.
7, feedback is applied by the decoder 78 and the latch 79 to substantially improve the response speed.

Since the detailed structure and operation of the interpolation circuit 70 are described in JP-A 1-212314, detailed description thereof will be omitted.

The interpolating circuit 70 receives a resistance from a two-phase square wave signal having a 90 ° phase difference, which is obtained by waveform shaping the analog output waveform of the photoelectric detection circuit 60 as shown in the upper part of FIG. 9, for example. By the division, finally, signals (b0 to b3) of binary (BIN) code as shown in the lower part of FIG. 9 are obtained. The binary code signals b3 to b0 are the carry generator 80.
Entered in.

The carry generator 80 is constructed, for example, as shown in FIG. 10, and the rising edge detection circuit 82 and the falling edge detection circuit 84 detect the most significant digit signal b3 as shown in the time chart of FIG. Observe the edge, RS-F
The direction determination signal UP and the count pulse signal CP are output via / F88 or the like.

The delay element 86 commonly included in the rising edge detecting circuit 82 and the falling edge detecting circuit 84 is made up of a resistor R, a capacitor C and a Schmitt trigger element ST as shown in FIG. 12, for example. You can also

Further, the rising edge detection circuit 82 has two D-flip flops (F / F / F / F) as shown in FIG.
F) and an AND gate. This A
The ND gate may be replaced with a NOR gate to form the falling edge detection circuit 84.

The counting pulse generated by the carry generator 80 is input to the up / down counter 90, and digit data exceeding the absolute data generated by the photoelectric detection circuit 60 is generated. The data of this digit is also created in the register 40 of the capacitance type detection unit as shown in FIG.

That is, in the comparison circuit 100, the value of the register 40 (input A) and the value of the counter 90 (input B).
Are compared.

Specifically, as shown in FIGS. 14 and 15, steps 1010 and 10 are performed at predetermined time intervals.
At 20, the value of counter 90 (hereinafter referred to as photoelectric incremental value) b'is read and stored in registers B1 and B2, respectively.

Next, in step 1030, the absolute value of the difference between the values stored in the registers B1 and B2 | B2-B1 |
, It is determined whether or not exceeds a predetermined value m1. Here, the determination criterion m1 can be, for example, the same as the minimum resolution of the photoelectric detector or a value that is several times or less than that.

When the determination result of step 1030 is positive, that is, when it is determined that the scale is moving at a speed equal to or higher than a predetermined speed, the comparison circuit 100 does not detect an error. This prevents false error detection during scale movement, where the capacitive detector does not respond.

On the other hand, when the result of the determination in step 1030 is negative and it is determined that the data of the capacitance type detector can be stored, the process proceeds to step 1040, and the value of the register 40 (hereinafter Read a) which is called capacitance absolute value and stores it in register A.

After the capacitance type absolute value is stored, the routine proceeds to step 1050, where the photoelectric incremental value b'is read again and stored in the register B3.

Next, in step 1060, the absolute value of the difference between the values stored in the registers B2 and B3 | B3-B2
It is determined whether or not | exceeds a predetermined value m2. Here, the criterion m2 may be equal to or slightly larger than m1.

When the determination result of step 1060 is positive, that is, when it is determined that the scale has moved by a predetermined value or more while storing the capacitance type detector data, the comparing circuit 100 No error detection is performed. This prevents erroneous error detection due to scale movement during capacitive data storage.

On the other hand, when the determination results of steps 1030 and 1060 are negative and it is determined that the reliability of the capacitance type absolute value is sufficiently high, step 1
In step 070, it is determined whether or not the absolute value | A-B3 | of the difference between the values stored in the registers A and B3 exceeds the predetermined value d. Here, the criterion d can be a value of an allowable difference between the photoelectric incremental value and the capacitance absolute value.

Here, since the values stored in the registers A and B3 are directly compared, the processing is simple. In addition, since the capacitance type data takes longer time to detect, it is necessary to compare the value of B with the value (B1 or B2) stored before that.
An accurate comparison can be made by comparing with 3.

The average value (B2 + B3) / of the values (for example, B2 and B3) stored before and after the capacitance type data is stored.
If the comparison with 2 is made, a more accurate comparison becomes possible.

If the result of the determination in step 1070 is positive,
When it is determined that the photoelectric incremental value is incorrect due to a count error or the like, the error flag ERR is set to 1 in step 1080 and an NG signal is generated.

On the other hand, when the result of the determination in step 1070 is negative and it is determined that the difference between the photoelectric incremental value and the electrostatic capacitance absolute value is within the allowable range, the error flag ERR is set to 0 in step 1090. take down.

Thus, the error judgment routine is completed.
The routine is adapted to repeat each track of the capacitive detector at appropriate time intervals.

Since each track has a different scale pitch, it is more effective to change the values of the judgment criteria m1, m2, and d depending on the track. That is, by selecting a judgment criterion according to each track, it is possible to compare only coarse absolute data when the scale is moving at high speed and fine absolute data when the scale is moving at low speed, so that the comparison time can be shortened.

In many cases, photoelectric detectors and electrostatic capacitance detectors each have an error detecting function, and therefore, before or after storing data such as B1 to B3 and A. Then, the error contents of these detectors themselves are confirmed, and for example, when an error of the photoelectric detector occurs, the comparison in step 1070 may not be performed.

It is also possible to further increase the certainty by repeating the routine of steps 1010 to 1070 a plurality of times and setting the ERR flag for the first time when the determination result of step 1070 is always positive.

When the value of the counter 90 is deviated from the capacitance type absolute data for detecting the upper absolute value by the NG signal of the comparison circuit 100, it is automatically updated to the correct absolute value. If the reliability of the capacitance type absolute value is low, such as when moving the scale, NG
No signal is generated and no photoelectric incremental value calibration is performed. Further, when performing calibration or the like on the outside (communication partner side), the NG signal may be transmitted to the outside without performing the calibration by itself.

The function of the comparison circuit 100 can be easily realized by hardware.

If it is desired to inform the external communication partner that the NG signal has been generated in the comparison circuit 100, once RS
-Store the NG signal in the F / F 120 and shift register 1
The data may be transferred to 10 and then serially transferred to the communication partner.

The shift register 110 converts a parallel data signal into a serial data signal and then serially transfers the serial data signal to the communication partner (external).

In the first embodiment, since the incremental data obtained by the incremental photoelectric detector is interpolated to obtain the photoelectric absolute data, the scale of the photoelectric encoder is simple.

Next, the second embodiment of the present invention will be described in detail.

In the second embodiment, as shown in FIG. 16, instead of the interpolating circuit 70 and the carry generator 80 of the first embodiment, a two-phase square wave signal CA output from the photoelectric detection circuit 60,
A count pulse generation circuit 200 for directly generating a count pulse from the CB is provided, and the count pulse generation circuit 20
0 output is up / down counter 9 with preset input
The input is made directly to 0.

Further, the two-phase signals A and B for external output are also obtained directly from the output of the counter 90 instead of the output of the carry generator 80.

Photoelectric detection circuit 6 in the second embodiment
A time chart from the output CA, CB of 0 to the counter 90 is shown in FIG.

The other structure and operation are the same as those of the first embodiment, and the description thereof will be omitted.

In the present embodiment, the two-phase square wave signals A and B for external communication are newly combined by the exclusive OR gate 130 based on the output of the counter 90 without directly outputting from the photoelectric detection circuit 60. It is generated in order to synchronize with the serial output SO of the parallel-in-serial-out shift register 110.

In the present embodiment, since the interpolation circuit does not exist, the resolution is slightly inferior, but the configuration is very simple.

[0089]

As described above, according to the present invention, by utilizing the respective advantages of the electrostatic capacity type encoder having a wide measuring range with a small number of tracks and the photoelectric type encoder having high speed and high resolution, It is possible to perform a measurement with a wide resolution or a wide dynamic range over a wide measurement range with a small number of tracks. Further, it has an excellent effect that the reliability of the output data can be enhanced regardless of the difference in response speed between the capacitance type detector and the photoelectric type detector.

[Brief description of drawings]

FIG. 1 is a block diagram showing an overall configuration of a first embodiment of the present invention.

FIG. 2 is a perspective view showing a configuration of a scale and a detector according to the first embodiment.

FIG. 3 is a plan view showing a part of the scale pattern of the first embodiment in an enlarged manner.

FIG. 4 is a perspective view for explaining the operation of the capacitance type detector.

FIG. 5 is a diagram showing an example of an output waveform of a capacitance type detector.

FIG. 6 is a diagram showing a data configuration for explaining the operation of the register and the comparison circuit of the first embodiment.

FIG. 7 is a vertical cross-sectional view showing the structure of the photoelectric detector of the first embodiment.

FIG. 8 is a block diagram showing a configuration example of an interpolation circuit used in the first embodiment.

FIG. 9 is a time chart showing an example of the relationship between the output of the photoelectric detection circuit and the binary code signal of the output of the interpolation circuit in the first embodiment.

FIG. 10 is a circuit diagram showing a configuration example of a carry generator used in the first embodiment.

FIG. 11 is a time chart showing the operation of the carry generator.

FIG. 12 is a circuit diagram showing a modification of the delay element used in the carry generator.

FIG. 13 is a circuit diagram showing a modified example of the rising edge detection circuit also used in the carry generator.

FIG. 14 is a flowchart showing an error determination procedure of the comparison circuit used in the first embodiment.

FIG. 15 is a diagram for explaining a processing state of an error determination procedure of the comparison circuit.

FIG. 16 is a block diagram showing an overall configuration of a second embodiment of the present invention.

FIG. 17 is a time chart showing the operation from the photoelectric detector to the counter in the second embodiment.

FIG. 18 is a diagram for explaining a processing state of a conventional error determination procedure.

[Explanation of symbols]

10 ... Scale, 11-13 ... Capacitance type track, 14 ... Photoelectric type track, 20 ... Capacitance type detector, 30 ... Capacitance type detection circuit, 40 ... Register, 50, 301-304 ... Photoelectric type Detector, 60, 311 to 314 ... Photoelectric detection circuit, 90 ... Up-down counter with preset input, 100 ... Comparison circuit, 110 ... Parallel-in-serial-out shift register, 200 ... Count pulse generation circuit.

Claims (6)

[Claims] 1. An absolute encoder for outputting a detected position as absolute data, wherein a low-resolution long-wavelength capacitive absolute code pattern and a high-resolution short-wavelength photoelectric incremental code pattern are formed in a position detection direction. A scale, a capacitance type detection unit that reads the capacitance type absolute code to generate a capacitance type absolute signal, and a photoelectric detection unit that reads the photoelectric type incremental code and generates a photoelectric type incremental signal. Output means for calibrating the incremental data obtained from the photoelectric incremental signal with absolute data obtained from the electrostatic capacitance absolute signal to obtain output absolute data, the incremental data and the absolute data, Compare, absolute encoder, characterized by comprising comparison means for generating an error signal, the when the difference exceeds the allowable range. 2. The absolute encoder according to claim 1, wherein the comparing means compares the incremental data immediately after reading the absolute data with the absolute data. 3. The absolute encoder according to claim 1, wherein the comparison means compares the absolute value of the incremental data before and after reading the absolute data with the absolute data. 4. The method according to any one of claims 1 to 3,
The absolute encoder is characterized in that the comparison unit determines whether an error signal is generated when the rate of change of the incremental data immediately before reading the absolute data is equal to or less than a predetermined value. 5. The method according to any one of claims 1 to 4,
An absolute encoder, wherein the comparison means determines whether an error signal is generated when an amount of change in incremental data before and after reading the absolute data is less than or equal to a predetermined value. 6. The method according to any one of claims 1 to 5,
The capacitance type absolute code pattern includes a plurality of tracks juxtaposed at different resolutions and wavelengths, and the error signal generation criterion is a different value for each track. Absolute encoder to do.