JPH0580828B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a method for manufacturing a dielectrically isolated type semiconductor substrate used in a semiconductor integrated circuit device.

[Prior art]

The cheapest and easiest method for insulating and isolating each circuit element in a semiconductor integrated circuit device is the PN junction isolation method, but when high withstand voltage characteristics, low leakage current characteristics, low noise characteristics, high speed characteristics, etc. are required. In this case, it is advisable to adopt a dielectric isolation structure in which each semiconductor island is separated by an insulating film. This structure, for example,
41-16707 (filed on August 19, 1960), the invention is characterized in that a plurality of semiconductor islands on which integrated circuit elements are fabricated are accommodated in a supporting substrate made of polycrystalline silicon (Si). do. Note that since this support substrate is deposited on an insulating film using a so-called vapor phase growth method, it must be polycrystalline. In addition, for the purpose of strengthening such support substrates, for example, Japanese Patent Application Laid-Open No. 52-97686 (February 1978)
(filed on May 12) As specified in the publication, it may have a structure consisting of polycrystalline Si and an insulating film.

FIG. 1 shows a cross-sectional structure of such a semiconductor substrate. In the figure, reference numeral 1 denotes a support substrate made of polycrystalline Si, in which a plurality of semiconductor islands 3 isolated by insulating films 2 are provided, and semiconductor elements are formed in these islands. For example, it is a bipolar transistor 7 consisting of an emitter 4, a base 5, and a collector 6, or a so-called MOS transistor 11 consisting of a source 8, a gate 9, and a drain 10.Of course, a contact window 12, an electrode 13, a surface protective film 14, Embedded layer 15
etc. may also be provided as necessary. Further, as described above, the insulating film 21 is sandwiched in the support substrate 1 for the purpose of preventing deformation. In addition, in the semiconductor island 3, the PN junction is indicated by a solid line, and the HL of the same impurity is
Junctions are indicated by dashed lines. Therefore, for example, if the island 3 is of the N ^- type, the base 5 is of the P type, whereas the collector 6 and the buried layer 15 are of the N ⁺ type. Of course, these conductivity types may be completely opposite. Also, part of the source 8 is indicated by a broken line because part of the P-type region is drawn in order to obtain a channel potential.
It is N ⁺ type, indicating that it can be contacted with the source.

However, such a conventional substrate structure has the following problems.

First, there is the first problem of poor thermal conductivity. Bipolar transistor 7 and MOS transistor 1
When element 1 operates, heat determined by (applied voltage x flowing current) is generated. However, the conventional structure did not pay attention to this point and even provided an insulating film 21 which further deteriorates its thermal conductivity. The heat generated in the dielectrically isolated island 3 is transferred to the surface protection film 14 that covers the surface of the device, and then to the atmosphere (or to the gas enclosed in the case in which the semiconductor device is mounted) or to the device. The heat is transmitted to the insulating film 2 covering the bottom and side surfaces, and then to the support substrate 1. However, it is clear that gas has poor thermal conductivity, and since the support substrate 1 is also made of polycrystalline Si, the heat is quite low. It had poor conductivity and caused an increase in the temperature of the device. In addition, the provision of the insulating film 21, etc., which has a thermal conductivity about two orders of magnitude lower than that of Si, accelerates this temperature rise. Therefore, in order to take advantage of the high breakdown voltage characteristics of the dielectric isolation structure, it was necessary to increase the applied voltage by N times and suppress the flowing current to 1/N to prevent the element from being destroyed due to heat generation.

Another problem is the instability of the AC potential due to the high resistivity of the support substrate 1. In the dielectric isolation structure, since the elements are separated by the insulating film 2, no direct current flows, but the semiconductor forming the island 3, the insulating film, and the polycrystalline Si support substrate 1 (where the insulating film 21 is present) In this case, further polycrystalline Si layer 101
~Insulating film 21~Polycrystalline Si layer 102, etc. are added)The combination of each layer functions as a capacitor, and an alternating current flows. This is true even when the insulating film 21 is a composite film that is a combination of an insulating film and a semi-insulating film as disclosed in the above-mentioned Japanese Patent Application Laid-Open No. 52-97686.
This would only reduce the severity of the problem and would not provide a fundamental solution. This change in alternating current _is caused by _a time constant C ₀ .
has R ₀ . However, since R ₀ is polycrystalline Si (usually no impurities are added for fear of autodoping during device fabrication), R 0 is an extremely high value (~ several
MΩ), and the time constant also increased accordingly. These island potential fluctuations overlap with the operating signal and cause slow fluctuations in the DC current component, so when handling minute and high-speed signals, they not only act as a type of noise and impair the original function, but also cause This caused a slight deviation in the set operating point.

[Object and structure of the invention]

The present invention has been made in view of the above circumstances, and its purpose is to provide a method for manufacturing a semiconductor substrate for mounting semiconductor elements, which has a high breakdown voltage and is capable of processing large currents or extremely high-speed signals. It's about doing.

In order to achieve such an object, the method for manufacturing a semiconductor substrate of the present invention uses a material of a support substrate supporting and mounting a semiconductor island as a mixture or compound of polycrystalline silicon and metal, or a combination thereof. This solves the problems of conductivity and resistivity. Hereinafter, the present invention will be explained in detail using Examples.

〔Example〕

FIG. 2 shows a semiconductor substrate formed by the method for manufacturing a semiconductor substrate according to the present invention, in which a plurality of semiconductor islands 3 isolated by an insulating film 2 are provided in a support substrate 16 having a configuration to be described later. . The insulating film 2 may be a semi-insulating film or a combination of an insulating film and a semi-insulating film. In the island 3, semiconductor elements such as a bipolar transistor 7 and a MOS transistor 11 are formed as in the conventional case, and a contact window 12, an electrode 13, a surface protective film 14,
A buried layer 15 and the like are also formed.

Here, the feature of the substrate structure according to the present invention is that the supporting substrate 16 is made of a mixture or compound of polycrystalline Si and metal (usually referred to as silicide), or a combination thereof. As is well known, metals are good conductors of heat and have low resistivity, which can completely solve the problems of conventional structures as described above. In this case, according to experiments conducted by the inventors, the fact that the Si constituting the support substrate 16 is polycrystalline Si has extremely important significance as will be described later.

Next, a method for manufacturing a semiconductor device including a semiconductor substrate including a bipolar transistor 7 and a MOS transistor 11 as shown in the figure will be described.

First, anisotropic etching is performed on the first main surface side of a Si (100) substrate according to the shape of the island 3 to be formed, and then a buried layer 15 is formed, and an insulating layer is further formed on the buried layer 15. After forming the film 2, polycrystalline Si, which will become the supporting substrate 16, is deposited thereon. It was advisable to grow this polycrystalline Si using a vapor phase growth method using SiH ₂ Cl ₂ gas as a raw material at a temperature in the range of 1050°C to 1150°C. Polycrystalline Si grown at this temperature has a columnar structure with crystal grain sizes ranging from several μm to several tens of μm, and has a structure that includes sufficient grain boundaries necessary for subsequent metal addition processing. At this time, it is also extremely effective to add impurities to the Si as will be described later. However, it is not necessarily advisable to add metal, which is an important component of the present invention, at this stage. The reason for this is that metals are liberated during the subsequent high-temperature treatment to form semiconductor elements in the islands 3, causing contamination. Therefore, when such an addition is made, it is desirable to replace the subsequent high-temperature heat treatment with local heat treatment using a laser annealing method, etc., as this will require the addition of a special process. Usually, metal is added after the element is formed. In addition, when the insulating film 21 is provided in the support substrate as described in the conventional example, holes may be made locally in the insulating film 21, or the layer including the insulating film 21 may be polished, etc. after the element is formed. Needs to be removed. The reason for this will be explained later.

Now, after the polycrystalline Si is deposited, the unnecessary single crystal Si substrate is removed from the second main surface side opposite to the first main surface by polishing or etching until the insulating film 21 is exposed. An insulated island 3 is formed. Impurities are added into these islands, and semiconductor devices such as bipolar transistor 7 and MOS transistor 11 are completed through contact window opening, electrode processing, etc. As described above, if metal is not added to polycrystalline Si at a stage before device formation, all of these treatments can be performed by normal semiconductor device manufacturing processes.

Next, a metal such as Au, Ag, Cu, or Pt is reacted with the polycrystalline Si of the support substrate to form the metal-containing support substrate 16, which is an important feature of the present invention. The selection of metals at this time is based on criteria such as those with high thermal conductivity, low resistivity, and those that easily react with Si at low temperatures. However, as mentioned above, since Si is polycrystalline, the metal can be added to the support substrate 16 at a lower temperature than the reaction temperature generally determined in metallurgy. It has the advantage of For example, since the Si of the island 3 and the Al alloy of the electrode undergo a eutectic reaction at about 580° C., this is the upper limit of the heat treatment temperature allowed when adding metal. Metallurgically known metals
Examples where the reaction temperature of Si is below 580℃ are Au,
Cu, In, Sn, etc., but according to the inventors' experiments, most of them, including high melting point metals such as Pt and Mo, could be added at temperatures below this temperature. Although the details of this reason are not necessarily clear, measurements using an X-ray microanalyzer etc. show that the added metal exists at the grain boundaries of Si, so it is thought that the interfacial energy of polycrystalline Si promotes this low-temperature reaction. There is. Furthermore, since the intruding metal was prevented from entering the island 3 by the insulating film 2, it did not affect the device characteristics.

According to experiments, among the metals that can reduce resistivity and improve thermal conductivity by addition, Ag, Au, Cu, Pt, and combinations thereof are easily processed. These metals have little effect unless they are added to the entire supporting substrate, so if the insulating film 21 is present in the substrate as described above, it is necessary to prevent the deformation of the metal after the high temperature treatment during element formation is completed. It is a good idea to remove it after it has served its purpose, or to drill a hole for metal entry. In addition, the reaction between metal and polycrystalline Si generally involves a first stage in which the metal first penetrates along the gaps between the columnar crystals of Si, and then a part of the penetrated metal combines with Si and forms the silicon side, such as Pt. The second step consists of forming _X Si _1-X . However, in the case of metals that do not form silicides, such as Al and Au, they exist in the form of a solid solution mixed with Si in any proportion.

Compared to the first stage, treatment at a much higher temperature was required to carry out the second stage reaction. However, when impurities were added to Si in advance as described above, a low resistance state was achieved with only the first treatment, and the decrease in resistivity with subsequent treatments was not significant. This is because a certain proportion of the above impurities are incorporated into the polycrystalline Si and the rest segregates at the grain boundaries, but the metal that has entered the grain boundaries and the polycrystalline Si
The Schottky junction that is formed when the two contact with each other tends to leak due to this impurity, so even if the Si in the polycrystalline part and the metal do not combine, the entire substrate becomes a current path. It is estimated to be.

Now, the supporting substrate 16, which has the characteristics of low resistivity and high thermal conductivity due to the addition of metal,
As shown in the figure, it is connected to a terminal 17 that is a so-called heat sink, a terminal that provides bias for the substrate, or a member that has both of these functions. With such a configuration, the heat generated in the island 3 is transmitted to the support substrate 16 via the insulating film 2 and is quickly discharged, so that a larger amount of power can be consumed in the island 3. That is, even if the same current is processed, a higher voltage can be applied due to the improved thermal conductivity. Also, although it depends on the amount of addition, the resistance of the substrate is significantly lowered from several MΩ to several KΩ or less by adding metal, and by applying a stable potential to terminal 17, it is possible to reduce the resistance caused by gradual fluctuations in the DC level. We were able to eliminate the instability and noise of the device.

Next, FIG. 3 is a sectional view showing another embodiment of the present invention. In the case of this embodiment, the anisotropic etching in the embodiment shown in FIG. 2 is omitted, and after depositing polycrystalline Si, the Si on the original substrate is polished to a thin layer of several μm or less. This is an example in which this Si thin layer is separated into a plurality of islands 3 using an insulating isolation region 18 formed up to the insulating film 2 by a selective oxidation method or the like. Of course, although not shown in the figure, desired elements are formed in these islands 3 as in the previous example, and then polycrystalline Si is formed.
A supporting substrate 16 is formed by adding metal to the substrate. In this case as well, the buried layer 15 may be provided as necessary, and other processes such as the process when using the insulating film 21 are the same as in the previous example. If the above-mentioned precautions are taken, it is also possible to form the element after adding the metal.

〔Effect of the invention〕

As explained above, according to the present invention, by adding metal to the polycrystalline silicon of the support substrate, it is possible to obtain a substrate with high thermal conductivity and low resistance. A semiconductor device capable of processing signals or extremely high-speed signals can be realized.

[Brief explanation of the drawing]

FIG. 1 is a sectional view showing an example of the structure of a conventional semiconductor substrate, FIG. 2 is a sectional view showing one embodiment of the present invention, and FIG. 3 is a sectional view showing another embodiment of the present invention. 2...Insulating film, 3...Semiconductor island, 16...Supporting substrate made of polycrystalline silicon added with metal, 1
8...Insulating isolation area.

Claims (1)

[Claims] 1. A step of selectively anisotropically etching a first principal surface of a substrate made of a semiconductor;
forming an isolation film made of an insulating film, a semi-insulating film, or a combination thereof on the main surface side of the substrate; depositing polycrystalline silicon on the isolation film; and depositing polycrystalline silicon on the second main surface side of the substrate. A method for manufacturing a semiconductor substrate, comprising at least the steps of removing the substrate until the separation film is exposed, and adding metal to the polycrystalline silicon. 2. A step of forming an isolation film made of an insulating film, a semi-insulating film, or a combination thereof on the first main surface of a substrate made of a semiconductor, a step of depositing polycrystalline silicon on this isolation film, and a step of depositing polycrystalline silicon on the above-mentioned isolation film. a step of removing a part of the substrate from the second main surface side to make the substrate thin; a step of selectively forming an insulating isolation region reaching the separation film on the thinned substrate; A method for manufacturing a semiconductor substrate, the method comprising at least the step of adding metal to silicon.