JPH0579940U - Plasma CVD equipment - Google Patents

Plasma CVD equipment

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Publication number
JPH0579940U
JPH0579940U JP1860592U JP1860592U JPH0579940U JP H0579940 U JPH0579940 U JP H0579940U JP 1860592 U JP1860592 U JP 1860592U JP 1860592 U JP1860592 U JP 1860592U JP H0579940 U JPH0579940 U JP H0579940U
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JP
Japan
Prior art keywords
substrate
cylindrical body
semiconductor layer
electrode plate
plasma cvd
Prior art date
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Pending
Application number
JP1860592U
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Japanese (ja)
Inventor
克己 土田
雄二 吉田
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Kyocera Corp
Original Assignee
Kyocera Corp
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Priority to JP1860592U priority Critical patent/JPH0579940U/en
Publication of JPH0579940U publication Critical patent/JPH0579940U/en
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Abstract

(57)【要約】 【目的】均一な膜厚で成膜でき、更に均一な膜質とな
る。 【構成】反応室内に正多角形の筒状体と電極板とを対向
させ、該筒状体の各周面に複数個の平板状基板を配設
し、反応室内にアモルファスシリコン系半導体層生成用
ガスを導入し、上記筒状体を回転させるとともに該筒状
体と電極板の間にもしくは上記平板状基板と電極板の間
に電圧を印加してプラズマを発生させ、上記複数個の平
板状基板に同時にアモルファスシリコン系半導体層を成
膜したことを特徴とするプラズマCVD装置。
(57) [Summary] [Purpose] A film having a uniform film thickness can be formed, and the film quality becomes more uniform. [Structure] A regular polygonal cylindrical body and an electrode plate are opposed to each other in the reaction chamber, and a plurality of flat plate-shaped substrates are arranged on each peripheral surface of the cylindrical body, and an amorphous silicon semiconductor layer is formed in the reaction chamber. A gas for use is introduced to rotate the cylindrical body, and a voltage is applied between the cylindrical body and the electrode plate or between the flat plate-shaped substrate and the electrode plate to generate plasma, which is simultaneously applied to the plurality of flat plate-shaped substrates. A plasma CVD apparatus characterized in that an amorphous silicon semiconductor layer is formed.

Description

【考案の詳細な説明】[Detailed description of the device]

【0001】[0001]

【産業上の利用分野】[Industrial applications]

本考案は複数個の平板状基板にそれぞれ同時にアモルファスシリコン系半導体 層を形成できるプラズマCVD装置に関するものである。 The present invention relates to a plasma CVD apparatus capable of simultaneously forming amorphous silicon semiconductor layers on a plurality of flat substrates.

【0002】[0002]

【従来の技術】[Prior Art]

近年、アモルファスシリコン系半導体層は感光ドラム、薄膜トランジスター、 イメージセンサー等の各分野に使われており、その利用範囲はますます広くなっ てきている。また、その被成膜用基板についても、円筒体、平板状等の各種形状 があり、そのサイズも各種各様である。 In recent years, amorphous silicon-based semiconductor layers have been used in various fields such as photosensitive drums, thin film transistors, and image sensors, and their application range is becoming wider and wider. Also, the substrate for film formation has various shapes such as a cylindrical body and a flat plate, and its size is also various.

【0003】 かかる状況のなかで、現在、製造コストを低減させるために量産技術の進展が 望まれている。例えば密着用イメージセンサーにおいては、平板状基板が使用さ れるが、そのために図2に示すようなプラズマCVD装置が提案されている。Under such circumstances, mass production technology is currently desired to be improved in order to reduce the manufacturing cost. For example, in a contact image sensor, a flat substrate is used, and for that purpose, a plasma CVD apparatus as shown in FIG. 2 has been proposed.

【0004】 同図のプラズマCVD装置1において、2は真空容器、3は基板ホルダー、4 はその基板ホルダーに固定された被成膜用の基板、5は基板4と対向して配置さ れた電極であり、この電極5の基板4との対向面にはアモルファスシリコン系半 導体層生成用ガスを吹き出すための複数個の噴出口6が形成されている。In the plasma CVD apparatus 1 of the same drawing, 2 is a vacuum container, 3 is a substrate holder, 4 is a substrate for film formation fixed to the substrate holder, and 5 is arranged to face the substrate 4. This is an electrode, and a plurality of ejection ports 6 for ejecting a gas for forming an amorphous silicon semiconductor layer are formed on the surface of the electrode 5 facing the substrate 4.

【0005】 この構成のプラズマCVD装置1においては、アモルファスシリコン系半導体 層生成用ガスが噴出口6から吹き出るとともに、基板ホルダー3と電極5との間 に電圧を印加してプラズマを発生させると、基板4にアモルファスシリコン系半 導体層が形成される(以下、アモルファスシリコンをa−Siと略記する)。In the plasma CVD apparatus 1 having this structure, when the amorphous silicon-based semiconductor layer forming gas is blown out from the ejection port 6 and a voltage is applied between the substrate holder 3 and the electrode 5, plasma is generated. An amorphous silicon semiconductor layer is formed on the substrate 4 (hereinafter, amorphous silicon is abbreviated as a-Si).

【0006】[0006]

【考案が解決しようとする問題点】[Problems to be solved by the device]

しかしながら、上記提案のプラズマCVD装置1によれば、固定された基板4 の板面にa−Si系半導体層生成用ガスが吹き出されるので、その板面に均等に 吹き出されず、そのために、その基板4の板面に均一な膜厚で成膜できないとい う問題点がある。このような不均一成膜という問題点は特に密着用イメージセン サーなどの広い面積に基板において顕著である。 However, according to the above-mentioned proposed plasma CVD apparatus 1, since the a-Si semiconductor layer forming gas is blown to the plate surface of the fixed substrate 4, the gas is not evenly blown to the plate surface. There is a problem that it is not possible to form a film with a uniform film thickness on the plate surface of the substrate 4. Such a problem of non-uniform film formation is particularly noticeable in a substrate having a large area such as an image sensor for adhesion.

【0007】[0007]

【問題点を解決するための手段】[Means for solving problems]

本考案のプラズマCVD装置は、反応炉内に正多角形の筒状体と電極板とを対 向させるとともに、該筒状体の各周面に複数個の平板状基板を配設し、反応炉内 にa−Si系半導体層生成用ガスを導入しながら、上記筒状体を回転させるとと もに筒状体と電極板の間、もしくは上記平板状基板と電極板の間に電圧を印加し てプラズマを発生させ、上記複数個の平板状基板に同時にa−Si系半導体層を 成膜することを特徴とする。 In the plasma CVD apparatus of the present invention, a regular polygonal tubular body and an electrode plate are opposed to each other in a reaction furnace, and a plurality of flat plate-shaped substrates are arranged on each peripheral surface of the tubular body to carry out reaction. While introducing the gas for forming an a-Si semiconductor layer into the furnace, the tubular body is rotated and a voltage is applied between the tubular body and the electrode plate or between the flat substrate and the electrode plate to generate plasma. Is generated, and the a-Si based semiconductor layer is simultaneously formed on the plurality of flat substrates.

【0008】[0008]

【作用】[Action]

この構成のプラズマCVD装置によれば、各周面に複数個の平板状基板が配設 された正多角形の筒状体が回転するので、各基板の板面にa−Si系半導体層生 成用ガスが均等に吹き出され、そのためにその基板4の板面に均一な膜厚で成膜 できる。 According to the plasma CVD apparatus having this configuration, since the regular polygonal cylindrical body having the plurality of flat plate-shaped substrates arranged on each peripheral surface rotates, the a-Si semiconductor layer growth on the plate surface of each substrate. The production gas is blown out evenly, so that a film having a uniform film thickness can be formed on the plate surface of the substrate 4.

【0009】[0009]

【実施例】【Example】

以下、本考案の実施例を説明する。 Embodiments of the present invention will be described below.

【0010】 図1は本考案のプラズマCVD装置7の概略構成図であり、8は導電体からな る円筒状の反応炉、この反応炉8の周壁は二重構造を成し、その周壁の内側は円 筒状のグロー放電用電極板9である。このグロー放電用電極板9の内部には導電 体からなる正六角形の筒状体10が配置され、高周波電源(図示せず)の出力端 子の一方は反応炉8の外周壁を介してグロー放電用電極板9に、他方の端子は筒 状体10に接続され、グロー放電用電極板9と筒状体10の間で電圧が印加され る。また、反応炉8の外周壁8aにはa−Si系半導体層生成用ガスの導入孔1 1が形成され、グロー放電用電極板9にはその全体にわたって小さな径のガス噴 出孔12が形成されており、導入孔11から入ったa−Si系半導体層生成用ガ スは反応炉の外周壁8aとグロー放電用電極板9との空間領域で拡散し、更に多 数個のガス噴出孔12から筒状体10に向かって吹き出される。しかも、この筒 状体10は成膜中モーター(図示せず)により回転されるようになっている。FIG. 1 is a schematic configuration diagram of a plasma CVD apparatus 7 of the present invention, in which 8 is a cylindrical reaction furnace made of a conductor, and the peripheral wall of this reaction furnace 8 has a double structure, The inside is a cylindrical electrode plate 9 for glow discharge. A regular hexagonal cylindrical body 10 made of a conductor is disposed inside the glow discharge electrode plate 9, and one of the output terminals of a high frequency power source (not shown) is connected to the glow plug via the outer peripheral wall of the reaction furnace 8. The discharge electrode plate 9 and the other terminal are connected to the tubular body 10, and a voltage is applied between the glow discharge electrode plate 9 and the tubular body 10. Further, an introduction hole 11 for the gas for forming an a-Si semiconductor layer is formed on the outer peripheral wall 8a of the reaction furnace 8, and a gas ejection hole 12 having a small diameter is formed on the entire electrode plate 9 for glow discharge. The gas for generating an a-Si semiconductor layer that has entered through the introduction hole 11 diffuses in the space region between the outer peripheral wall 8a of the reaction furnace and the electrode plate 9 for glow discharge, and more gas ejection holes are formed. It is blown from 12 toward the tubular body 10. Moreover, the cylindrical body 10 is rotated by a motor (not shown) during film formation.

【0011】 かくして上記構成においては、正六角形の筒状体10の各周壁にその周壁の面 よりも小さなサイズの長尺状の基板13を配置して筒状体10を回転させ、ガス 噴出孔12からa−Si系半導体層生成用ガスを吹き出させ、更にグロー放電用 電極板9と筒状体10の間で電圧を印加すると、これにより、筒状体10の回転 に伴って各基板13がプラズマ領域に均一な条件で晒されるので、各基板13が 均一な膜厚と膜質になるように成膜する。Thus, in the above-described configuration, the long hexagonal substrate 13 having a size smaller than the surface of the peripheral wall is arranged on each peripheral wall of the regular hexagonal cylindrical body 10, and the cylindrical body 10 is rotated to cause gas ejection holes. When a gas for generating an a-Si semiconductor layer is blown from 12 and a voltage is further applied between the glow discharge electrode plate 9 and the tubular body 10, this causes each substrate 13 to rotate as the tubular body 10 rotates. Is exposed to the plasma region under uniform conditions, so that each substrate 13 is formed to have a uniform film thickness and quality.

【0012】 また、本考案においては、上記プラズマCVD装置7を複数個配列して、それ らを同時に作動して成膜すれば、一度の多数個の成膜基板が得られる。Further, in the present invention, a plurality of film-forming substrates can be obtained at a time by arranging a plurality of the plasma CVD devices 7 and operating them simultaneously to form a film.

【0013】 更にまた本考案においては、次のように本考案を改良してもよい。Furthermore, in the present invention, the present invention may be improved as follows.

【0014】 例えば密着型イメージセンサーにおいては、その光電変換層に用いられるa− Si系半導体層は、その長尺状の基板13の一主面の全面に形成する必要はなく 、その基板13には電極パターンやIC等を搭載するので、所定の形状にa−S i系半導体層を成膜形成すればよい。また、被成膜の基板13に予めクロム等で 電極パターンを形成し、その電極パターンの上に所定の形状のa−Si系半導体 層を成膜形成する場合が多い。For example, in the contact type image sensor, the a-Si based semiconductor layer used for the photoelectric conversion layer does not need to be formed on the entire main surface of the elongated substrate 13, Since an electrode pattern, an IC, and the like are mounted on, the a-Si system semiconductor layer may be formed into a predetermined shape by film formation. In many cases, an electrode pattern is previously formed of chromium or the like on the substrate 13 on which the film is to be formed, and an a-Si semiconductor layer having a predetermined shape is formed on the electrode pattern.

【0015】 ところが、従来ではクロム等で電極パターンが形成された基板13の一主面の 全面に形成し、その後にレジストを被覆し、エッチングによりa−Si系半導体 層の不必要な領域を除くという方法を採用している。However, conventionally, it is formed on the entire main surface of the substrate 13 on which an electrode pattern is formed of chromium or the like, and then a resist is coated, and an unnecessary region of the a-Si based semiconductor layer is removed by etching. Is adopted.

【0016】 しかしながら、この方法によれば、レジストの有機物によりa−Si系半導体 層の表面が汚染され、その半導体特性が低下するという問題点が指摘されている 。However, according to this method, a problem is pointed out that the surface of the a-Si based semiconductor layer is contaminated by the organic substance of the resist and the semiconductor characteristics are deteriorated.

【0017】 本考案によれば、図3〜図7に示すようにして上記問題点を解消することがで きる。According to the present invention, the above problems can be solved as shown in FIGS.

【0018】 図3と図4は、筒状体10の各周壁に基板13を固定する方法を示しており、 図4は図3のX−X線断面図である。これらの図において、その基板13の両端 に押さえ板14を配置し、その押さえ板14をボルト15により筒状体10に固 定する。そして、この押さえ板14が基板13を覆う領域はa−Si系半導体層 の非成膜領域となる。3 and 4 show a method of fixing the substrate 13 to each peripheral wall of the tubular body 10, and FIG. 4 is a sectional view taken along line XX of FIG. In these figures, pressing plates 14 are arranged at both ends of the substrate 13, and the pressing plates 14 are fixed to the tubular body 10 with bolts 15. The region where the pressing plate 14 covers the substrate 13 is the non-film formation region of the a-Si based semiconductor layer.

【0019】 かくして上記の構成によれば、その押さえ板14はメタルマスクを兼ねること ができ、これにより、上記のように所定の形状のa−Si系半導体層を成膜形成 するのに、エッチングを行う必要がなく、その結果、a−Si系半導体層の半導 体特性が低下せず、その特性が維持できる。Thus, according to the above configuration, the pressing plate 14 can also serve as a metal mask, and as a result, the etching plate is used to form the a-Si semiconductor layer having a predetermined shape as described above. As a result, the semiconductor characteristics of the a-Si based semiconductor layer do not deteriorate and the characteristics can be maintained.

【0020】 このようなメタルマスクを兼ねた押さえ板14は図5や図6に示すような形状 であってもよい。同図で16、17はその押さえ板である。The pressing plate 14 also serving as the metal mask may have a shape as shown in FIGS. 5 and 6. In the figure, 16 and 17 are the pressing plates.

【0021】 また、既にクロム等で電極パターンを形成された基板13に成膜形成する場合 であれば、図7に示すように押さえ板14を配置すればよい。同図では、ガラス 基板18の上にクロム電極19を形成され、そのクロム電極19の一部を覆うよ うに押さえ板14を配置し、その押さえ板14が覆われていないクロム電極19 の領域を被覆するようにa−Si系半導体層を成膜形成すればよい。Further, when the film is formed on the substrate 13 on which the electrode pattern is already formed of chromium or the like, the pressing plate 14 may be arranged as shown in FIG. In the figure, a chrome electrode 19 is formed on a glass substrate 18, a pressing plate 14 is arranged so as to cover a part of the chrome electrode 19, and the region of the chrome electrode 19 not covered by the pressing plate 14 is The a-Si based semiconductor layer may be formed as a film so as to cover it.

【0022】 (実験例) 本考案者等は図1に示すプラズマCVD装置7を用いて、成膜テストを行った 。この基板13には232×56mmのガラス基板を用いて、その基板上の成膜 領域は220×56mmである。成膜条件は、グロー放電用電極板9と筒状体1 0の間隔:40mm、ガス圧力:0.4〜1.0Torr、高周波電力:200 〜570W、グロー放電用電極板9の寸法:Φ195mm×495mm、筒状体 10の回転速度:6rpmであり、それの用いられるガス成分は、SiH4 、H 2 、N2 、B2 6 、PH3 、NH3 等である。(Experimental Example) The inventors of the present invention conducted a film formation test using the plasma CVD apparatus 7 shown in FIG. A 232 × 56 mm glass substrate is used as the substrate 13, and the film formation area on the substrate is 220 × 56 mm. The film forming conditions are as follows: Glow discharge electrode plate 9 and tubular body 10: 40 mm, gas pressure: 0.4 to 1.0 Torr, high frequency power: 200 to 570 W, glow discharge electrode plate 9 size: Φ195 mm × 495 mm, the rotation speed of the cylindrical body 10: 6 rpm, and the gas component used for the same is SiH.Four, H 2 , N2, B2H6, PH3, NH3Etc.

【0023】 このような成膜条件で136分成膜し、その成膜テストを10回繰り返したと ころ、その膜厚分布の平均値は7.2%であった。この膜厚分布の平均値は、各 成膜テストで、その最大値と最小値の平均を算出し、その平均と最小値(又は最 大値)の差を平均で除算することで平均に対する差の比率を求め、このような各 テストの差に比率から全テストの平均値を出した。When a film was formed for 136 minutes under such film forming conditions and the film forming test was repeated 10 times, the average value of the film thickness distribution was 7.2%. The average value of this film thickness distribution is the difference from the average by calculating the average of the maximum value and the minimum value and dividing the difference between the average value and the minimum value (or maximum value) by the average in each film formation test. The ratio was calculated, and the average value of all tests was calculated from the ratio of each test difference.

【0024】 これに対して、図2に示すような従来の装置を用いて同様なテストを行ったと ころ、膜厚分布の平均値は11.3%であり、本考案では均一な膜厚で成膜でき た。On the other hand, when a similar test was carried out using a conventional apparatus as shown in FIG. 2, the average value of the film thickness distribution was 11.3%, and in the present invention, a uniform film thickness was obtained. I was able to form a film.

【0025】 尚、本考案は上記実施例に限定されるものではなく、本考案を逸脱しない範囲 内で種々の改善や変更は何ら差し支えない。例えば、被成膜用に基板は導電体で あれば、その基板を一方の電極とし、その基板と他方のグロー放電用電極板との 間でプラズマを発生させてもよい。The present invention is not limited to the above embodiment, and various improvements and changes can be made without departing from the present invention. For example, if the substrate for film formation is a conductor, that substrate may be used as one electrode and plasma may be generated between the substrate and the other electrode plate for glow discharge.

【0026】[0026]

【考案の効果】[Effect of the device]

以上の通り、本考案のプラズマCVD装置によれば、正多角形の筒状体の各周 面に複数個の平板状基板を配設し、筒状体を回転させるとともにプラズマを発生 させることにより、各基板の板面にa−Si系半導体層生成用ガスが均等に吹き 出され、その基板の板面に均一な膜厚で成膜でき、更に均一な膜質となり、その 結果、一度の多数個の基板に高品質且つ高信頼性の成膜形成ができた。 As described above, according to the plasma CVD apparatus of the present invention, a plurality of flat plate-shaped substrates are arranged on each peripheral surface of a regular polygonal tubular body, and the tubular body is rotated and plasma is generated. The a-Si semiconductor layer forming gas is evenly blown to the plate surface of each substrate, and a film having a uniform film thickness can be formed on the plate surface of the substrate, resulting in a more uniform film quality. High quality and high reliability film formation was possible on each substrate.

【0027】 加えて、本考案のプラズマCVD装置によれば、各基板を上記筒状体に固定す る押さえ板はメタルマスクを兼ねることができ、これにより、所定の形状のa− Si系半導体層を成膜形成するのに、エッチングを行う必要がなく、その結果、 a−Si系半導体層の半導体特性が低下せず、その特性が維持できるという利点 もある。In addition, according to the plasma CVD apparatus of the present invention, the pressing plate for fixing each substrate to the cylindrical body can also serve as a metal mask, whereby an a-Si based semiconductor having a predetermined shape can be obtained. There is also an advantage that it is not necessary to carry out etching for forming the layer to form a film, and as a result, the semiconductor characteristics of the a-Si based semiconductor layer are not deteriorated and the characteristics can be maintained.

【図面の簡単な説明】[Brief description of drawings]

【図1】本考案のプラズマCVD装置の説明図である。FIG. 1 is an explanatory view of a plasma CVD apparatus of the present invention.

【図2】従来のプラズマCVD装置の説明図である。FIG. 2 is an explanatory diagram of a conventional plasma CVD apparatus.

【図3】本考案に係る筒状体の斜視図である。FIG. 3 is a perspective view of a tubular body according to the present invention.

【図4】図3のX−X線断面図である。4 is a sectional view taken along line XX of FIG.

【図5】基板の固定方法の説明図である。FIG. 5 is an explanatory diagram of a method of fixing a substrate.

【図6】基板の固定方法の説明図である。FIG. 6 is an explanatory diagram of a method of fixing a substrate.

【図7】基板の固定方法の説明図である。FIG. 7 is an explanatory diagram of a method of fixing a substrate.

【符号の説明】[Explanation of symbols]

8・・・・反応炉 9・・・・グロー放電用電極板 10・・・筒状体 13・・・基板 8 ... Reactor 9 ... Glow discharge electrode plate 10 ... Cylindrical body 13 ... Substrate

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 【請求項1】反応炉内に正多角形の筒状体と電極板とを
対向させるとともに、該筒状体の各周面に複数個の平板
状基板を配設し、反応炉内にアモルファスシリコン系半
導体層生成用ガスを導入しながら、上記筒状体を回転さ
せるとともに筒状体と電極板の間、もしくは上記平板状
基板と電極板の間に電圧を印加してプラズマを発生さ
せ、上記複数個の平板状基板に同時にアモルファスシリ
コン系半導体層を成膜するプラズマCVD装置。
1. A regular polygonal cylindrical body and an electrode plate are opposed to each other in a reaction furnace, and a plurality of flat plate-shaped substrates are arranged on each peripheral surface of the cylindrical body to form an amorphous material in the reaction furnace. While introducing the silicon-based semiconductor layer forming gas, the cylindrical body is rotated and a voltage is applied between the cylindrical body and the electrode plate or between the flat plate-shaped substrate and the electrode plate to generate plasma. A plasma CVD apparatus that simultaneously deposits an amorphous silicon semiconductor layer on a flat substrate.
JP1860592U 1992-03-31 1992-03-31 Plasma CVD equipment Pending JPH0579940U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1860592U JPH0579940U (en) 1992-03-31 1992-03-31 Plasma CVD equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1860592U JPH0579940U (en) 1992-03-31 1992-03-31 Plasma CVD equipment

Publications (1)

Publication Number Publication Date
JPH0579940U true JPH0579940U (en) 1993-10-29

Family

ID=11976279

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1860592U Pending JPH0579940U (en) 1992-03-31 1992-03-31 Plasma CVD equipment

Country Status (1)

Country Link
JP (1) JPH0579940U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010267782A (en) * 2009-05-14 2010-11-25 Nuflare Technology Inc Film deposition device
KR20110113605A (en) * 2009-02-10 2011-10-17 도쿄코스모스덴키가부시키가이샤 Electronic parts click mechanism and rheostat

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20110113605A (en) * 2009-02-10 2011-10-17 도쿄코스모스덴키가부시키가이샤 Electronic parts click mechanism and rheostat
JP2010267782A (en) * 2009-05-14 2010-11-25 Nuflare Technology Inc Film deposition device

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