JPH0578273B2 - - Google Patents

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Publication number
JPH0578273B2
JPH0578273B2 JP8260287A JP8260287A JPH0578273B2 JP H0578273 B2 JPH0578273 B2 JP H0578273B2 JP 8260287 A JP8260287 A JP 8260287A JP 8260287 A JP8260287 A JP 8260287A JP H0578273 B2 JPH0578273 B2 JP H0578273B2
Authority
JP
Japan
Prior art keywords
current
resonant
capacitor
voltage
switch element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP8260287A
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Japanese (ja)
Other versions
JPS6426363A (en
Inventor
Kyomi Watanabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Origin Electric Co Ltd
Original Assignee
Origin Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Origin Electric Co Ltd filed Critical Origin Electric Co Ltd
Priority to JP8260287A priority Critical patent/JPS6426363A/en
Publication of JPS6426363A publication Critical patent/JPS6426363A/en
Publication of JPH0578273B2 publication Critical patent/JPH0578273B2/ja
Granted legal-status Critical Current

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Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はトランジスタ、FET、GTO、及び
IGBT等の自己消弧形スイツチ素子を用いた共振
形コンバータに関する。
[Detailed Description of the Invention] [Industrial Application Field] The present invention applies to transistors, FETs, GTOs, and
This invention relates to a resonant converter using a self-extinguishing switch element such as an IGBT.

〔従来の技術および発明が解決すべき問題点〕[Problems to be solved by conventional technology and invention]

従来、トランジスタ、FET、GTO及びIGBT
等の自己消弧形スイツチ素子を用いた共振形コン
バータはサイリスタのように転流失敗がないこ
と、スイツチ素子を流れる電流が正弦半波でスイ
ツチ損失がなく、かつ低ノイズである等の利点で
様々な分野に利用されている。
Traditionally, transistors, FETs, GTOs and IGBTs
Resonant converters using self-extinguishing switch elements, such as the It is used in various fields.

しかしながらこのような共振形コンバータで
は、電源変動、負荷変動があつても、動作モード
を常に共振モードに保つため、回路の電流、電圧
及びその位相等を検出し、動作周波数を制御する
のが常である。従つて、制御回路が複雑になり、
出力電圧を下限まで制御する場合には、動作周波
数が可聴領域に及ぶこともある。
However, in such a resonant converter, in order to always maintain the operating mode in resonant mode even when there are power supply fluctuations or load fluctuations, the operating frequency must be controlled by detecting the circuit current, voltage, and its phase. It is. Therefore, the control circuit becomes complicated,
When controlling the output voltage to the lower limit, the operating frequency may extend into the audible range.

〔問題点を解決するための手段〕[Means for solving problems]

本発明では、以上のべた問題点を解決するため
逆並列ダイオードを有した自己消弧形スイツチ素
子によりブリツジ回路を構成し、そのブリツジ回
路の交流端子間に共振用コンデンサと共振用イン
ダクタンスの直列回路を接続するとともにその共
振用コンデンサの両端から整流手段を介して直流
出力を取り出すようにした共振形コンバータにお
いて、上記共振用コンデンサと共振用インダクタ
ンスは、このコンバータの定格運転時において、
前記スイツチ素子が閉じる時、電流がほぼ0から
立ち上がり、前記スイツチ素子が開く時電流がほ
ぼ0になるよう、かつ前記共振用コンデンサの端
子電圧がコンバータ電源電圧の約1.5〜2.1倍の範
囲となるよう選定したことを特徴とする共振形コ
ンバータを提案するものである。
In order to solve the above-mentioned problems, the present invention configures a bridge circuit using self-extinguishing switch elements having anti-parallel diodes, and connects a series circuit of a resonance capacitor and a resonance inductance between the AC terminals of the bridge circuit. In a resonant converter in which a DC output is taken out from both ends of the resonant capacitor via a rectifying means, the resonant capacitor and resonant inductance are as follows during rated operation of the converter:
When the switch element is closed, the current rises from approximately 0, and when the switch element is opened, the current is approximately 0, and the terminal voltage of the resonant capacitor is in the range of approximately 1.5 to 2.1 times the converter power supply voltage. This paper proposes a resonant converter characterized by the following selection.

〔作用〕[Effect]

本発明は以上述べたような特徴を有するので、
従来の共振形コンバータの制御概念に固執せず、
動作周波数はほぼ一定にして、完全な共振モード
は定格運転時のみとし、電源変動、負荷変動に対
応する出力制御はスイツチ素子のオン時間制御、
または2つのブリツジアームのベクトル制御すな
わち移相制御等によつて行うようにしたもので、
頻度の高い定格運転状態では、スイツチ素子が閉
じる時、電流がほぼ0から立ち上がり、スイツチ
素子が開く時電流がほぼ0になり、共振形コンバ
ータの利点を発揮する。
Since the present invention has the features described above,
Without adhering to the control concept of conventional resonant converters,
The operating frequency is kept almost constant, and complete resonance mode is only used during rated operation.Output control in response to power supply fluctuations and load fluctuations is achieved by controlling the on-time of the switch element.
Or, it is performed by vector control, ie phase shift control, etc. of two bridge arms.
Under frequently rated operating conditions, when the switch element closes, the current rises from almost 0, and when the switch element opens, the current drops to almost 0, demonstrating the advantages of a resonant converter.

〔実施例〕〔Example〕

第1図は本発明の共振形コンバータの原理図で
ある。図においてEは直流電源、S1〜S4は電
源Eにまたがつてブリツジ接続されたスイツチ素
子、C1は共振用コンデンサ、L1は共振用イン
ダクタンス、LSは図示されていないが出力トラ
ンスの励磁インダクタンスであり、共振用コンデ
ンサC1に並列接続される。Bはブリツジ整流回
路、C2はフイルタコンデンサ、RLは負荷であ
る。
FIG. 1 is a diagram showing the principle of a resonant converter according to the present invention. In the figure, E is a DC power supply, S1 to S4 are switch elements bridge-connected across the power supply E, C1 is a resonant capacitor, L1 is a resonant inductance, and LS is the excitation inductance of the output transformer (not shown). , are connected in parallel to the resonance capacitor C1. B is a bridge rectifier circuit, C2 is a filter capacitor, and RL is a load.

このような回路においてスイツチ素子S1〜S
4を第2図1〜2に示すように周期をほぼ一定値
Tとしてパルス幅T/2で180度ずれて交互にオ
ンさせ、ブリツジの交流出力点X,Y間に第2図
3のような方形交流電圧Vxyを加える。このよう
な状態で、共振用C1とL1の値、および負荷状
態を変化させるとインバータの動作モードが大き
く変化し、S1〜S4に流れる順電流および逆電
流が変化する。本発明では後述する如く、L1,
C1の値を選定することによつて、S1〜S4に
流れる電流を定格運転状態において第2図4〜5
に示すように電圧Vxyと同相でピーク値Ipのほぼ
山形(スイツチ素子S1〜S4が閉じる時、電流
がほぼ0から立ち上がりスイツチ素子S1〜S4
が開く時電流がほぼ0になる特性)の順電流と
し、かつC1の電圧Vc1、すなわち等価的な出
力電圧V0を第2図6に示すようにEより高い
値、約1.5〜2.1Eに上昇させる。尚、フイルタC
2が充分に大きい場合、C1の両端から見たブリ
ツジBとC2,RLは電圧Voで両極性の電池とみ
なすことができ、C1の電圧はVoでクランプさ
れる。このようにL1,C1を選定することによ
り、重負荷状態ではIs1,Is3を例示すれば、第
2図7のようにVxyに対し遅れ電流となり、出力
短絡では8のようにVxyと90度遅れた正負の三角
波となる。第2図7,8において、負方向の電流
は各スイツチ素子の逆電流、すなわち電源に帰還
する電流を示し、負荷が重いほど帰還電流が増加
し、短絡状態では、順電流と帰還電流のピーク
Ispがほぼ等しくなつて、電源からL1,C1の
共振回路に供給された電力が全て電源に帰還され
る。
In such a circuit, switch elements S1 to S
4 is turned on alternately with a pulse width of T/2 with a 180 degree shift with the period being approximately constant T as shown in Fig. 2 1 and 2, and the AC output points X and Y of the bridge are connected as shown in Fig. 2 3. Add a rectangular AC voltage Vxy. In such a state, if the values of resonance C1 and L1 and the load condition are changed, the operation mode of the inverter changes significantly, and the forward current and reverse current flowing through S1 to S4 change. In the present invention, as described later, L1,
By selecting the value of C1, the current flowing through S1 to S4 can be adjusted to the value shown in Figs. 2, 4 to 5 in the rated operating state.
As shown in the figure, the current rises from almost 0 and has a peak value Ip in phase with the voltage Vxy (when the switch elements S1 to S4 are closed, the current rises from almost 0 to the current of the switch elements S1 to S4).
The forward current is set to a characteristic in which the current is almost 0 when the cap is open), and the voltage Vc1 of C1, that is, the equivalent output voltage V0, is increased to a value higher than E, about 1.5 to 2.1E, as shown in Fig. 2. let In addition, filter C
If 2 is large enough, the bridge B and C2, RL seen from both ends of C1 can be considered as a bipolar battery with a voltage Vo, and the voltage of C1 is clamped at Vo. By selecting L1 and C1 in this way, in a heavy load state, Is1 and Is3, for example, will lag behind Vxy as shown in Figure 2 7, and in the case of an output short circuit, the current will lag 90 degrees with Vxy as shown in 8. It becomes a positive and negative triangular wave. In Figure 2 7 and 8, the negative current indicates the reverse current of each switch element, that is, the current that returns to the power supply.The heavier the load, the more the feedback current increases, and in a short circuit state, the forward current and feedback current peak.
Isp becomes almost equal, and all the power supplied from the power supply to the resonant circuits of L1 and C1 is fed back to the power supply.

一方、軽負荷ではスイツチ素子S1〜S4に流
れる電流は第2図9に示すようにVxyに対して進
み電流となり、第2図10に示すように無負荷状
態では90度進んで、正弦波共振電流となり、順電
流と逆電流のピーク値がほぼ等しくなつて、電源
から供給される電力がそのまま電源に帰還され
る。
On the other hand, when the load is light, the current flowing through the switch elements S1 to S4 becomes a leading current with respect to Vxy as shown in FIG. The peak values of the forward current and reverse current become approximately equal, and the power supplied from the power source is returned to the power source as is.

しかしながら、一般には共振形コンバータの固
有の特性により、この共振形コンバータも無負荷
電圧あるいは軽負荷電圧が上昇するので、後述す
るようにパルス幅制御、または位相制御により無
負荷電圧軽負荷電圧の上昇を抑える必要がある。
However, in general, due to the inherent characteristics of a resonant converter, the no-load voltage or light-load voltage increases with this resonant converter. need to be suppressed.

次式は、この共振形コンバータにおいて、スイ
ツチ素子の電流を山形特性(スイツチ素子が閉じ
る時、電流がほぼ0から立ち上がり、スイツチ素
子が開く時電流がほぼ0になる特性)に維持した
状態で、出力電圧の上昇率をk(k=Vo/E)と
し、かつ出力トランスの励磁インダクタンスLs
を無限大としたばあいの回路解析方程式である。
In this resonant converter, the following formula is expressed as follows, with the current in the switch element maintained at a chevron characteristic (when the switch element closes, the current rises from almost 0, and when the switch element opens, the current becomes almost 0): Let the rate of increase of the output voltage be k (k=Vo/E), and the excitation inductance of the output transformer Ls
This is the circuit analysis equation when is set to infinity.

PoT−kIpE(T/2−t1)=0 (1) Ip+E/L(1−k)(T/2−t1)=0 (2) (1−k)(1+k)cosωt1=0 (3) Ip−ωCE(1+k)sinωt1=0 (4) 但し、 ω=1/√、Po=出力電力、 t1:スイツチ素子の通流期間の前半期間 これらの式はLs=無限大の場合で比較的簡単
であるが励磁インダクタンスLsを考慮すると非
常に複雑となる。そのためここでは数式をしめさ
ないが、その励磁インダクタンスLs有りの場合
の計算式で、実例としてPo=1000W、E=
240V、T=50μsにおけるコンピユータの計算結
果をkを変数、Lsをパラメータとして第3図に
例示する。尚、この計算結果は実験とかなり一致
し、この解析計算の妥当性がうらづけられる。
PoT−kIpE(T/2−t1)=0 (1) Ip+E/L(1−k)(T/2−t1)=0 (2) (1−k)(1+k)cosωt1=0 (3) Ip −ωCE(1+k)sinωt1=0 (4) However, ω=1/√, Po=output power, t1: first half of the conduction period of the switch element These equations are relatively simple when Ls=infinity. However, it becomes very complicated when considering the excitation inductance Ls. Therefore, the formula is not shown here, but it is a calculation formula with excitation inductance Ls, and as an example, Po = 1000W, E =
The computer calculation results at 240V and T=50μs are illustrated in FIG. 3 with k as a variable and Ls as a parameter. Note that this calculation result is in good agreement with the experiment, which proves the validity of this analytical calculation.

第3図からは、kの増加に従つて共振用インダ
クタンスL1は励磁インダクタンスLsに余り関
係なく直線的に上昇し、共振用コンデンサC1は
k=2で急激に増加、それ以降はなだらかに減少
する。この共振用コンデンサC1は励磁インダク
タンスLsによつて大きく変化する。
From Figure 3, as k increases, the resonant inductance L1 increases linearly without much relation to the excitation inductance Ls, and the resonant capacitor C1 increases rapidly at k=2, and then gradually decreases. . This resonance capacitor C1 varies greatly depending on the excitation inductance Ls.

またIpはkの増加によつてなだらかに減少し、
あまりLsの影響を受けない。ところで、負荷短
絡時にスイツチ素子に流れる電流のピークIspは
第2図8に示すようにIsp=E/L・T/4で示
されるのでこれをグラフ化する。
Also, Ip decreases gently as k increases,
It is not affected by Ls very much. By the way, since the peak Isp of the current flowing through the switch element when the load is short-circuited is expressed as Isp=E/L·T/4 as shown in FIG. 2, this will be graphed.

すなわち、kが小さいとIspは急激に増加する。
そして実際のインバータではIsp=Ipであること
が最もスイツチ素子の電流利用率が高いのでkは k=1.5〜2.1の範囲、特にk=1.8がIsp=Ipと
なつて合理的である。
That is, when k is small, Isp increases rapidly.
In an actual inverter, the current utilization rate of the switch element is highest when Isp = Ip, so it is reasonable for k to be in the range of k = 1.5 to 2.1, especially k = 1.8, as Isp = Ip.

さらにインダクタンスL1の使用鉄芯の体積は
材質が同じならLI2pまたはLI2spの大きい方に比
例する。これは空芯インダクタンスとした場合に
はインダクタンスの占有体積に比例する。第3図
に示すLI2はLI2pまたはLI2spの大きい方をグラフ
化したもので、k=1.8付近で最小となる。この
LI2spまたはLI2pはLsにあまり関係しない。また
k=1.5〜2.1で短絡電流/定格電流比Isp/Ipも
1.4〜1.7にとれ、短絡電流が大きい方が好ましい
用途、例えばコンデンサ充電器等に敵する。また
L1はLsにあまり関係がないので、上記の式(1)
〜(4)の解をそのままあてはめてもよい。特にk=
1.8におけるL1は次のように概算できる。
Furthermore, the volume of the iron core used for the inductance L1 is proportional to the larger of LI 2 p or LI 2 sp if the materials are the same. In the case of air-core inductance, this is proportional to the volume occupied by the inductance. LI 2 shown in FIG. 3 is a graph of the larger of LI 2 p or LI 2 sp, and is minimum around k=1.8. this
LI 2 sp or LI 2 p are not significantly related to Ls. Also, when k = 1.5 to 2.1, the short circuit current/rated current ratio Isp/Ip
1.4 to 1.7, which is suitable for applications where a large short-circuit current is preferred, such as capacitor chargers. Also, since L1 has little relation to Ls, the above equation (1)
You may apply the solution of ~(4) as is. Especially k=
L1 in 1.8 can be roughly estimated as follows.

L1の簡単な決定方法(k=1.8とする。) 平均出力電流Ioは、 Io=Po/kE=Po/1.8E 短絡時の平均出力電流Isoは、グラフから Iso=IoX1.5 Iso=1/2・Ispであるから Isp=2×1.5×Io =2×1.5×Po/1.8E =1.7Po/E Isp=E/L・T/4より ET/4L=1.7Po/E L1≒0.15E2T/Po C1はこのL1に対応して調整によつて定め
る。
A simple method for determining L1 (K = 1.8) The average output current Io is Io = Po / kE = Po / 1.8E The average output current Iso during short circuit is from the graph Iso = IoX1.5 Iso = 1 / 2. Since Isp, Isp=2×1.5×Io =2×1.5×Po/1.8E =1.7Po/E Isp=E/L・T/4, so ET/4L=1.7Po/E L1≒0.15E 2 T/Po C1 is determined by adjustment corresponding to this L1.

第4図は本発明の共振用コンバータをコンデン
サの高電圧充電器に適用した実施例を示す。Eは
直流電源、Q1〜Q4は直流電源Eにまたがつて
ブリツジ接続されたFET、D1〜D4は各FET、
Q1〜Q4に逆並列接続されたダイオード、C1
は共振用コンデンサ、L1は共振用インダクタン
ス、T1は昇圧トランス、CWはこのT2の2次
側に接続されたコツククロフト・ウオルトン回路
等の高電圧整流回路、Coは充電すべきコンデン
サである。
FIG. 4 shows an embodiment in which the resonant converter of the present invention is applied to a high voltage charger for a capacitor. E is a DC power supply, Q1 to Q4 are FETs bridge-connected across the DC power supply E, D1 to D4 are each FET,
Diode C1 connected in antiparallel to Q1 to Q4
is a resonant capacitor, L1 is a resonant inductance, T1 is a step-up transformer, CW is a high voltage rectifier circuit such as a Kotscroft-Walton circuit connected to the secondary side of T2, and Co is a capacitor to be charged.

コンデンサCoの充電電圧を検出抵抗R1によ
り検出し、誤差増幅器A1によつて、基準電圧
Vrefと比較して誤差信号を発生して、この誤差
信号に対応して、ゲート信号発生回路A2におい
て、各FETのゲート信号G1〜G4を発生する。
The charging voltage of the capacitor Co is detected by the detection resistor R1, and the reference voltage is detected by the error amplifier A1.
An error signal is generated by comparing it with Vref, and in response to this error signal, gate signals G1 to G4 for each FET are generated in the gate signal generation circuit A2.

ここでこのFETQ1〜Q4の電流が山形となる
よう、かつ電源電圧Eの時に、トランスT1の1
次入力電圧が1.8EになるようL1,C1を調整し
てある。
Here, so that the current of FETQ1 to Q4 becomes a mountain shape, and when the power supply voltage is E, 1 of transformer T1
L1 and C1 are adjusted so that the next input voltage is 1.8E.

このような構成において、充電開始命令がくる
と、充電電圧Vrefに達するまでは、誤差増幅器
はFET、Q1〜Q4が最大パルス幅、約T/2
をオンするようゲート信号G1〜G4を加える。
するとコンデンサCoは最初は負荷短絡と等価な
のでこのコンバータは前述の如く、約1.7Ioの出
力電流を供給する。この電流は第5図の如くコン
デンサCoの充電に従つて減少し、充電電圧がVo
になると定格電流Ioの定格運転状態になる。充電
電圧がVoに達すると誤差増幅器はゲート信号を
停止し、充電を止める。この充電時間tcは通常の
定電流Ioにより充電時間tc′より短くできる。実
際にはコンデンサCoの電圧は回路の寄生的な電
流により低下するので、この分を若干補充電しな
ければならない。
In such a configuration, when a charging start command is received, until the charging voltage Vref is reached, the error amplifier uses FETs, Q1 to Q4 have the maximum pulse width, approximately T/2.
Gate signals G1 to G4 are applied to turn on.
The capacitor Co is then equivalent to a load short circuit initially, so the converter supplies an output current of about 1.7 Io, as described above. As shown in Figure 5, this current decreases as the capacitor Co is charged, and the charging voltage increases to
When this happens, it becomes the rated operating state with the rated current Io. When the charging voltage reaches Vo, the error amplifier stops the gate signal and stops charging. This charging time tc can be made shorter than the charging time tc' by using a normal constant current Io. In reality, the voltage of the capacitor Co decreases due to parasitic current in the circuit, so it must be supplemented to compensate for this amount.

この場合、T/2パルス幅信号の断続では供給
エネルギ量が大きいので、ゲート信号G1〜G4
のパルス幅制御、または第6図のようにゲート信
号G1〜G4をT/2、180度で送り、これに対
してゲート信号G2,G3を同様にT/2、180
度でおくり、2組の位相Φをずらすベクトル制御
が適する。
In this case, since the amount of supplied energy is large when the T/2 pulse width signal is intermittent, the gate signals G1 to G4 are
pulse width control, or as shown in Figure 6, gate signals G1 to G4 are sent at T/2, 180 degrees, and gate signals G2 and G3 are similarly sent at T/2, 180 degrees.
Vector control that shifts the two sets of phases Φ is suitable.

このような制御方法は、本発明の共振形コンバ
ータをコンデンサ充電器以外に使用する時、有効
である。特にベクトル制御は、位相Φに対する出
力の変化が比較的に直線的で制御特性がよい利点
がある。
Such a control method is effective when the resonant converter of the present invention is used in other than a capacitor charger. In particular, vector control has the advantage that the change in output with respect to phase Φ is relatively linear and control characteristics are good.

以上、実施例ではブリツジ回路について説明し
てきたが、例えば第1図におけるスイツチ素子S
1とS4をコンデンサに置き換えることによりハ
ーフブリツジ形に実施できる。
Above, the bridge circuit has been explained in the embodiments, but for example, the switch element S in FIG.
By replacing 1 and S4 with capacitors, it can be implemented in a half-bridge type.

〔発明の効果〕〔Effect of the invention〕

本発明は以上述べたように構成されているので
以下に記するような効果、利点を有する。
Since the present invention is configured as described above, it has the following effects and advantages.

(1) トランス入力電圧Vc1を電源電圧の1.58.1倍
にできるので、トランス入力電流が減少し、効
率が高い。特に高電圧電源の場合、トランスの
巻数を下げることができ、結合率を改善でき
る。
(1) Since the transformer input voltage Vc1 can be made 1.58.1 times the power supply voltage, the transformer input current is reduced and efficiency is high. Especially in the case of high-voltage power supplies, the number of transformer turns can be reduced and the coupling ratio can be improved.

(2) 共振用インダクタンスL1の鉄芯を含めた大
きさを必要最小限にできる。
(2) The size of the resonance inductance L1 including the iron core can be minimized.

(3) コンバータの駆動周波数がほぼ一定であるの
で、駆動制御回路が簡素化される。そして駆動
周波数がほぼ一定のため他の回路への干渉影響
が少ない。出力電圧を下限まで制御する場合に
も動作周波数は可聴範囲に及ぶことはない。
(3) Since the drive frequency of the converter is almost constant, the drive control circuit is simplified. Since the driving frequency is almost constant, there is little interference with other circuits. Even when the output voltage is controlled to the lower limit, the operating frequency does not reach the audible range.

(4) 定格時の電流Ipと短絡時の電流Ispがほぼ等
しく、スイツチ素子の電流利用率がよい。特に
特別な過電流保護回路を必要としない。
(4) The rated current Ip and the short-circuit current Isp are almost equal, and the current utilization rate of the switch element is good. No special overcurrent protection circuit is required.

(5) 負荷短絡時の出力電流が必要値まで伸び、か
つ無負荷電圧が高いので例えばコンデンサ充電
器等に適する。
(5) The output current increases to the required value when the load is short-circuited, and the no-load voltage is high, making it suitable for, for example, capacitor chargers.

(6) トランスの2次巻線の分布容量を共振コンデ
ンサの一部または全部として取り入れることが
でき、従来の高電圧出力のコンバータで不都合
であつたトランスの2次巻線の分布容量を積極
的に有効に利用することができる。
(6) The distributed capacitance of the transformer's secondary winding can be incorporated as part or all of the resonant capacitor, and the distributed capacitance of the transformer's secondary winding, which was a disadvantage in conventional high-voltage output converters, can be actively used. It can be used effectively.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明に係る共振形コンバータ回路の
原理図を示し、第2図は第1図に示す回路の動作
を説明するための各部の波形図を示し、第3図は
各定数をコンピユータによつて算出したグラフを
示し、第4図は本発明の共振形コンバータをコン
デンサの高電圧充電器に適用した実施例を示し、
第5図は第4図に示す回路のコンデンサCoに流
れる電流波形を示し、第6図は第4図に示す回路
の各スイツチング素子Q1〜Q4のゲート信号G
1〜G4のベクトル制御相互波形図を示す。 E……直流電源、B……ブリツジ整流回路、S
1〜S4……スイツチ素子、C1……共振用コン
デンサ、L1……共振用インダクタンス、RL…
…負荷、C2……フイルタコンデンサ、Q1〜Q
4……FET、D1〜D4……ダイオード、T1
……昇圧トランス、CW……高電圧整流回路、Co
……コンデンサ、R1……検出抵抗、Vref……
基準電圧、A1……誤差増幅器、A2……ゲート
信号発生回路、G1〜G4……ゲート信号。
FIG. 1 shows a principle diagram of the resonant converter circuit according to the present invention, FIG. 2 shows a waveform diagram of each part to explain the operation of the circuit shown in FIG. 1, and FIG. Figure 4 shows an example in which the resonant converter of the present invention is applied to a high voltage charger for a capacitor.
5 shows the current waveform flowing through the capacitor Co of the circuit shown in FIG. 4, and FIG. 6 shows the gate signal G of each switching element Q1 to Q4 of the circuit shown in FIG.
1 to G4 vector control mutual waveform diagrams are shown. E...DC power supply, B...Bridge rectifier circuit, S
1 to S4...Switch element, C1...Resonance capacitor, L1...Resonance inductance, RL...
...Load, C2...Filter capacitor, Q1~Q
4...FET, D1-D4...Diode, T1
...Step-up transformer, CW...High voltage rectifier circuit, Co
... Capacitor, R1 ... Detection resistor, Vref ...
Reference voltage, A1...Error amplifier, A2...Gate signal generation circuit, G1-G4...Gate signal.

Claims (1)

【特許請求の範囲】 1 逆並列ダイオードを有した自己消弧形スイツ
チ素子によりブリツジ回路を構成し、そのブリツ
ジ回路の交流端子間に共振用コンデンサと共振用
インダクタンスの直列回路を接続するとともにそ
の共振用コンデンサの両端から整流手段を介して
直流出力を取り出すようにした共振形コンバータ
において、 上記共振用コンデンサの値と共振用インダクタ
ンスの値とを、このコンバータの定格運転時にお
いて、前記スイツチ素子が閉じる時、電流がほぼ
0から立ち上がり、前記スイツチ素子が開く時電
流がほぼ0になるよう、かつ前記共振用コンデン
サの端子電圧がコンバータ電源電圧の約1.5〜2.1
倍の範囲となるよう選定したことを特徴とする共
振形コンバータ。
[Scope of Claims] 1. A bridge circuit is constituted by a self-extinguishing switch element having an anti-parallel diode, and a series circuit of a resonance capacitor and a resonance inductance is connected between the AC terminals of the bridge circuit, and the resonance In a resonant type converter in which DC output is taken out from both ends of a resonant capacitor via a rectifying means, the value of the resonant capacitor and the value of the resonant inductance are set such that the switch element closes when the converter is in rated operation. When the current rises from approximately 0, when the switch element opens, the current becomes approximately 0, and the terminal voltage of the resonant capacitor is approximately 1.5 to 2.1 of the converter power supply voltage.
A resonant converter characterized by being selected to have a double range.
JP8260287A 1987-04-03 1987-04-03 Resonance type converter Granted JPS6426363A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8260287A JPS6426363A (en) 1987-04-03 1987-04-03 Resonance type converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8260287A JPS6426363A (en) 1987-04-03 1987-04-03 Resonance type converter

Publications (2)

Publication Number Publication Date
JPS6426363A JPS6426363A (en) 1989-01-27
JPH0578273B2 true JPH0578273B2 (en) 1993-10-28

Family

ID=13779030

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8260287A Granted JPS6426363A (en) 1987-04-03 1987-04-03 Resonance type converter

Country Status (1)

Country Link
JP (1) JPS6426363A (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2561201B2 (en) * 1992-05-19 1996-12-04 株式会社電設 Resonant DC-DC converter
JP5553527B2 (en) * 2009-05-07 2014-07-16 田淵電機株式会社 Isolated DC-DC converter
JP5424307B2 (en) * 2009-05-07 2014-02-26 田淵電機株式会社 Isolated DC-DC converter

Also Published As

Publication number Publication date
JPS6426363A (en) 1989-01-27

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