JPH0576644B2 - - Google Patents
Info
- Publication number
- JPH0576644B2 JPH0576644B2 JP6189785A JP6189785A JPH0576644B2 JP H0576644 B2 JPH0576644 B2 JP H0576644B2 JP 6189785 A JP6189785 A JP 6189785A JP 6189785 A JP6189785 A JP 6189785A JP H0576644 B2 JPH0576644 B2 JP H0576644B2
- Authority
- JP
- Japan
- Prior art keywords
- current
- proportional
- signal
- output
- integral
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000010586 diagram Methods 0.000 description 11
- 239000003990 capacitor Substances 0.000 description 9
- 238000007599 discharging Methods 0.000 description 5
- 238000010304 firing Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 230000003321 amplification Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 230000002123 temporal effect Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/575—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices characterised by the feedback circuit
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Control Of Voltage And Current In General (AREA)
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は負荷電流制御装置、特にその電流設
定変更時における負荷電流のオーバシユートまた
はアンダーシユートを極力抑えて制御しうるよう
にするための負荷電流制御装置に関する。なお、
かゝる制御装置は、例えば超電導磁石コイルの如
く、インダクタンスが極めて大きく抵抗分が殆ん
ど存在しないような負荷を制御する場合に用いて
好都合である。[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a load current control device, and particularly to a load current control device that can control a load current while minimizing overshoot or undershoot when changing its current setting. This invention relates to a current control device. In addition,
Such a control device is conveniently used when controlling a load such as a superconducting magnet coil, which has an extremely large inductance and almost no resistance.
第３図は一般的な負荷給電システム例を示す概
略図、第４図は第３図の動作を説明するための電
流設定値，実際値および電流調節器出力相互の関
係を示す特性図である。第３図において、６は電
力変換器、７は負荷、８は電流検出器、９は電流
調節器（ACR）９１および点弧角調整器９２等
からなる電力変換器制御装置である。
Fig. 3 is a schematic diagram showing an example of a general load power supply system, and Fig. 4 is a characteristic diagram showing the relationship among the current setting value, actual value, and current regulator output to explain the operation of Fig. 3. . In FIG. 3, 6 is a power converter, 7 is a load, 8 is a current detector, and 9 is a power converter control device that includes a current regulator (ACR) 91, a firing angle regulator 92, and the like.
すなわち、電流調節器（ACR）９１は少なく
とも比例要素（Ｐ要素）および積分要素（Ｉ要
素）からなり、電流検出器８を介して得られる電
流実際値ｉをその設定値i*に等しくなるようPI調
節演算をして所定の操作出力を出し、点弧角調整
器９２はこの操作出力にもとづいて電力変換器６
の点弧制御を行ない、これにより、負荷７に対し
て設定値どおりの電流を供給し得るようにする。
こゝで、負荷電流設定値i*を変更する場合、積分
要素は生かさず、設定値i*と実際値ｉとの偏差
（Δi）が或る値以内になつたとき積分要素を生か
すようにするのが一般的である。なお、このよう
にするのはオフセツトエラーを無くすためであ
る。 That is, the current regulator (ACR) 91 consists of at least a proportional element (P element) and an integral element (I element), and adjusts the actual current value i obtained via the current detector 8 to be equal to its set value i * . The PI adjustment calculation is performed to output a predetermined operation output, and the firing angle regulator 92 adjusts the power converter 6 based on this operation output.
The ignition control is performed so that the current can be supplied to the load 7 according to the set value.
Here, when changing the load current setting value i * , the integral element is not used, but the integral element is used when the deviation (Δi) between the set value i * and the actual value i is within a certain value. It is common to do so. Note that this is done in order to eliminate offset errors.
したがつて、いま例えば電流設定値の時間的変
化が第４図イの如く表わされるものとすると、電
流調節器の出力は同図ロの如く変化し、その結
果、負荷に流れる電流（実際値）は同図ハの如く
なる。 Therefore, if, for example, the temporal change in the current setting value is expressed as shown in Figure 4A, the output of the current regulator will change as shown in Figure 4B, and as a result, the current flowing through the load (actual value) will change as shown in Figure 4B. ) is shown in Figure C.
つまり、設定変更時には設定値と実際値との偏
差が出来るだけ小さいときに、積分特性を生かす
ようにすることが望ましい。しかしながら、その
偏差を作る演算回路およびこの偏差を検出するコ
ンパレータ回路のドリフト等によつて、最適なタ
イミングをもつて積分特性を生かすことが難かし
い。このため、積分要素のコンデンサに対して余
分な充放電を行なわせることとなり、この充放電
をリセツトするために、負荷電流には第４図ハに
示されるようなオーバーシユートSOまたはアンダ
ーシユートSUが生じる結果になる。これによる
影響は、例えば負荷として超電導磁石コイルの如
く大きなインダクタンスをもつものを制御する場
合等に著しく、その大きな時定数やヒステリシス
特性のために所望の電流制御ができなくなり、性
能が低下するという問題が発生する。
In other words, when changing settings, it is desirable to take advantage of the integral characteristic when the deviation between the set value and the actual value is as small as possible. However, it is difficult to take advantage of the integral characteristic with optimal timing due to drift in the arithmetic circuit that creates the deviation and the comparator circuit that detects this deviation. For this reason, the capacitor of the integral element is forced to perform extra charging and discharging, and in order to reset this charging and discharging, the load current has an overshoot SO or an undershoot as shown in Figure 4C. This results in the formation of Ute S U. The effect of this is noticeable, for example, when controlling a load with a large inductance such as a superconducting magnet coil, and its large time constant and hysteresis characteristics make it impossible to control the desired current, resulting in a drop in performance. occurs.
電流設定値と実際値との偏差に比例した大きさ
を持ち該偏差とは逆極性の比例信号を出力する信
号印加回路と、該信号印加回路の出力を有効また
は無効にする第１制御手段と、電流設定値と実際
値との偏差と前記比例信号との和が入力される積
分要素の積分動作を有効または無効にする第２制
御手段とを設ける
〔作用〕
電流設定値の変更時には、第１，第２制御手段
により積分動作を有効にするとともに、電流印加
回路出力も有効にして前記積分要素のコンデンサ
へ前記比例電流を流し、該コンデンサへの充放電
を行わせることにより、余分な充放電を無くして
オーバシユートまたはアンダーシユートを出来る
だけ抑えるようにする。
a signal application circuit that outputs a proportional signal having a magnitude proportional to the deviation between the current setting value and the actual value and having a polarity opposite to the deviation; and a first control means for enabling or disabling the output of the signal application circuit. and a second control means for validating or disabling the integral operation of the integral element into which the sum of the deviation between the current set value and the actual value and the proportional signal is input. [Function] When changing the current set value, 1. The second control means enables the integral operation and also enables the output of the current application circuit to flow the proportional current to the capacitor of the integral element to charge and discharge the capacitor, thereby eliminating excess charge. Eliminate discharge and suppress overshoot or undershoot as much as possible.
第１図はこの発明の実施例を示す回路図、第２
図は第１図の動作を説明するための電流設定値，
実際値および電流調節器出力の関係を示す特性図
である。なお、第１図において、１１，１２，１
３，１４は演算増幅器（オペアンプ）であり、オ
ペアンプ１１によつて比例要素、オペアンプ１２
によつて積分要素、またオペアンプ１３によつて
加算要素、さらにオペアンプ１４によつて偏差検
出要素がそれぞれ形成される。また、２は電界効
果トランジスタ（FET）、３は制御回路、Ｒ，R1
〜R4は抵抗、Ｃは積分コンデンサである。
Fig. 1 is a circuit diagram showing an embodiment of this invention, Fig. 2 is a circuit diagram showing an embodiment of the present invention;
The figure shows the current setting value to explain the operation in Figure 1.
FIG. 3 is a characteristic diagram showing the relationship between an actual value and a current regulator output. In addition, in FIG. 1, 11, 12, 1
3 and 14 are operational amplifiers, and the operational amplifier 11 controls the proportional element and the operational amplifier 12.
The operational amplifier 13 forms an integral element, the operational amplifier 13 forms an addition element, and the operational amplifier 14 forms a deviation detection element. In addition, 2 is a field effect transistor (FET), 3 is a control circuit, R, R 1
~ R4 is a resistor and C is an integrating capacitor.
FET２および制御回路３は、設定値の変更時
にのみ与えられる制御信号によつて動作する。電
流設定値iSと実際値iDとの偏差はオペアンプ１４
に入力され、オペアンプ１４からは反転増幅によ
り偏差に比例した大きさを持ち偏差とは逆極性の
出力が得られる。この出力に基づいてFET２の
作により抵抗R4等にて決まる電流icが得られ、積
分コンデンサＣへ与えられる。同時に電流設定値
iSと実際値iDとの偏差も積分コンデンサＣへ与え
られる。前記電流iCの大きさと方向および前記電
流設定値iSと実際値iDとの偏差の大きさによつて
コンデンサＣの充放電が行われ、余分な充放電が
回避される。このとき、制御回路３は上記の如き
制御信号によつて、オペアンプ１２による積分動
作が有効にされるが、上記の如き充放電によつて
積分動作は緩やかに行なわれることになる。その
結果、電流調節器（ACR）の出力波形は第２図
ロの如く時刻t1以降は緩やかとなり、従つて、電
流実際値は同図ハの如く、オーバシユートの生じ
ない良好な波形となる。なお、時刻t1は上記制御
信号の与えられた時刻であり、また、第２図イは
電流設定値の時間変化を示す特性図である。以上
では、主としてオーバシユートについて説明した
が、アンダーシユートについても同様であること
は云う迄もない。 The FET 2 and the control circuit 3 are operated by a control signal that is applied only when a set value is changed. The deviation between the current setting value i S and the actual value i D is the operational amplifier 14.
The operational amplifier 14 outputs an output having a magnitude proportional to the deviation and a polarity opposite to that of the deviation by inverting amplification. Based on this output, a current i c determined by resistor R 4 etc. is obtained by the action of FET 2 and is applied to integrating capacitor C. At the same time, the current setting value
The deviation between i S and the actual value i D is also applied to the integrating capacitor C. The capacitor C is charged and discharged depending on the magnitude and direction of the current i C and the magnitude of the deviation between the current set value i S and the actual value i D , and excessive charging and discharging is avoided. At this time, the control circuit 3 enables the integration operation by the operational amplifier 12 by the above-mentioned control signal, but the integration operation is performed slowly due to the above-mentioned charging and discharging. As a result, the output waveform of the current regulator (ACR) becomes gradual after time t1 as shown in FIG. Incidentally, time t 1 is the time when the above control signal is applied, and FIG. 2A is a characteristic diagram showing the time change of the current setting value. Although the above description has mainly focused on overshoot, it goes without saying that the same applies to undershoot.
この発明によれば、積分要素のコンデンサを入
力量（設定値と実際値の偏差の関数）に応じて充
放電させるようにしたので、余分な充放電が回避
される結果、負荷電流のオーバシユートまたはア
ンダーシユートを極力抑えることができる。した
がつて、超電導磁石コイルの如き大きなインダク
ンス負荷の制御を高精溺に行ない得る利点がもた
らされる。
According to this invention, since the capacitor of the integral element is charged and discharged according to the input amount (a function of the deviation between the set value and the actual value), excessive charging and discharging is avoided, and as a result, load current overshoot or Undershoot can be suppressed as much as possible. Therefore, there is an advantage that a large inductance load such as a superconducting magnet coil can be controlled with high precision.
第１図はこの発明の実施例を示す回路図、第２
図は第１図の動作を説明するための電流設定値，
実際値および電流調節器出力相互の関係を示す特
性図、第３図は一般的な負荷制御システム例を示
す構成図、第４図は第３図の動作を説明するため
の電流設定値，実際値および電流調節器出力相互
の関係を示す特性図である。
符号説明、１１，１２，１３，１４……演算増
幅器（オペアンプ）、２……電界効果トランジス
タ（FET）、３……制御回路、６……電力変換
器、７……負荷、８……電流検出器、９……電力
変換器用制御装置、９１……電流調節器
（ACR）、９２……点弧角調整器、Ｒ，R1〜R4…
…抵抗、Ｃ……コンデンサ。
Fig. 1 is a circuit diagram showing an embodiment of this invention, Fig. 2 is a circuit diagram showing an embodiment of the present invention;
The figure shows the current setting value to explain the operation in Figure 1.
A characteristic diagram showing the relationship between the actual value and the current regulator output. Figure 3 is a configuration diagram showing an example of a general load control system. Figure 4 shows the current setting value and actual value to explain the operation of Figure 3. FIG. 3 is a characteristic diagram showing the relationship between the value and the current regulator output. Explanation of symbols, 11, 12, 13, 14... operational amplifier (op amp), 2... field effect transistor (FET), 3... control circuit, 6... power converter, 7... load, 8... current Detector, 9... Control device for power converter, 91... Current regulator (ACR), 92... Firing angle regulator, R, R 1 to R 4 ...
...Resistance, C...Capacitor.
Claims (1)
き電流を比例，積分要素を用いてフイードバツク
制御する負荷電流制御装置において、電流設定値
と実際値との偏差に比例した大きさを持ち該偏差
とは逆極性の比例信号を出力する信号印加回路
と、該信号印加回路の出力を有効または無効にす
る第１制御手段と、電流設定値と実際値との偏差
と前記比例信号との和が入力される積分要素の積
分動作を有効または無効にする第２制御手段とを
設け、負荷電流設定値を変更するときは、前記第
１，第２制御手段により積分動作を有効にすると
ともに、前記信号印加回路出力も有効にして前記
積分要素へ前記比例信号を出力し、該比例信号に
よつて前記積分要素への入力信号の大きさを制御
することを特徴とする負荷電流制御装置。1. In a load current control device that performs feedback control of the current to be supplied to a load via a power converter using proportional and integral elements, the current value is proportional to the deviation between the current setting value and the actual value. a signal application circuit that outputs a proportional signal with a polarity opposite to that of the signal application circuit; a first control means that enables or disables the output of the signal application circuit; a second control means for enabling or disabling the integral operation of the input integral element; when changing the load current setting value, the first and second control means enable the integral operation; A load current control device characterized in that a signal application circuit output is also enabled to output the proportional signal to the integral element, and the magnitude of the input signal to the integral element is controlled by the proportional signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6189785A JPS61221919A (en) | 1985-03-28 | 1985-03-28 | Load current controller |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6189785A JPS61221919A (en) | 1985-03-28 | 1985-03-28 | Load current controller |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61221919A JPS61221919A (en) | 1986-10-02 |
| JPH0576644B2 true JPH0576644B2 (en) | 1993-10-25 |
Family
ID=13184390
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6189785A Granted JPS61221919A (en) | 1985-03-28 | 1985-03-28 | Load current controller |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61221919A (en) |
-
1985
- 1985-03-28 JP JP6189785A patent/JPS61221919A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS61221919A (en) | 1986-10-02 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |