JPH0575355A - Bias circuit for avalanche photodiode - Google Patents

Bias circuit for avalanche photodiode

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Publication number
JPH0575355A
JPH0575355A JP23003891A JP23003891A JPH0575355A JP H0575355 A JPH0575355 A JP H0575355A JP 23003891 A JP23003891 A JP 23003891A JP 23003891 A JP23003891 A JP 23003891A JP H0575355 A JPH0575355 A JP H0575355A
Authority
JP
Japan
Prior art keywords
voltage
circuit
apd
avalanche photodiode
bias
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP23003891A
Other languages
Japanese (ja)
Inventor
Sachihiro Mogi
祥宏 茂木
Kenta Noda
健太 野田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP23003891A priority Critical patent/JPH0575355A/en
Publication of JPH0575355A publication Critical patent/JPH0575355A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To expand the maximum light receiving range of an optical reception circuit employing an avalanche photodiode. CONSTITUTION:An avalanche photodiode 1 and a bias voltage circuit VH are connected by using a parallel circuit comprising a resistor 2 and a constant voltage element 3 and a voltage of the constant voltage element is selected in a range that the avalanche photodiode 1 is operated even at a voltage resulting from subtracting a voltage generated across the constant voltage element from the voltage generated at the bias voltage circuit. Thus, the required frequency band of the avalanche photodiode is kept and the maximum light receiving range is expanded.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は光通信を中心とするオプ
トエレクトロニクスの分野において、アバランシェホト
ダイオ−ドを用いた光受信回路の最大受光範囲の拡大を
図ったバイアス回路に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bias circuit in the field of optoelectronics centering on optical communication, in which the maximum light receiving range of an optical receiving circuit using an avalanche photodiode is expanded.

【0002】[0002]

【従来の技術】従来、アバランシェホトダイオ−ド(以
下APDと略す)を用いた光受信回路は、図2に示すよ
うに、APD1の一端が抵抗器2を介して高電圧バイア
ス回路VHに接続され、他端は前置増幅器3に接続する
ことにより構成されている。この時、抵抗器2はAPD
1の保護抵抗として入れると共に光入力レベルが大きい
場合、抵抗器2を流れる負荷電流による電圧降下によ
り、APD増倍率を下げ、光入力ダイナミックレンジを
広げるように動作する。本回路の一般性及び類似回路と
して特開平2−211707号公報がある。
2. Description of the Related Art Conventionally, in an optical receiving circuit using an avalanche photodiode (hereinafter abbreviated as APD), one end of an APD1 is connected to a high voltage bias circuit VH via a resistor 2 as shown in FIG. And the other end is connected to the preamplifier 3. At this time, the resistor 2 is the APD
When the light input level is high as well as when it is inserted as a protection resistance of 1, the APD multiplication factor is lowered by the voltage drop due to the load current flowing through the resistor 2 and the light input dynamic range is expanded. The generality of this circuit and a similar circuit are disclosed in Japanese Patent Laid-Open No. 2-212707.

【0003】[0003]

【発明が解決しようとする課題】一般に、APDに印加
されるバイアス電圧にたいして、その周波数帯域と増倍
率は図3のように変化する。APDの増倍率はAPDバ
イアス電圧により制御可能であるが、その際に周波数帯
域も変化する。APDの増倍率の高いところで周波数帯
域が低下するのは、APDの利得帯域積が一定であるこ
とによるものであり、増倍率の低いところで周波数帯域
が低下するのは、APDの光吸収領域及びアバランシェ
領域での電界強度が低下し、キャリアの走行時間が長く
なること、接合容量の増大による時定数で制限されるこ
と等による。従って、高速信号を取り扱う光受信回路で
は、必要な周波数帯域を確保するようにAPDバイアス
電圧の最低値を維持させる必要がある。
Generally, the frequency band and multiplication factor of the bias voltage applied to the APD change as shown in FIG. The multiplication factor of APD can be controlled by the APD bias voltage, but the frequency band also changes at that time. The reason that the frequency band decreases at a high APD multiplication factor is that the gain band product of the APD is constant, and that the frequency band decreases at a low APD multiplication factor is that the light absorption region and avalanche of the APD. This is because the electric field strength in the region decreases, the transit time of carriers becomes long, and the time constant is limited due to the increase of the junction capacitance. Therefore, in the optical receiver circuit that handles high-speed signals, it is necessary to maintain the minimum value of the APD bias voltage so as to secure the necessary frequency band.

【0004】しかし、図2に示す回路では、光入力の増
大にともなってAPD両端にかかるバイアス電圧が低下
するので、光入力レベルが大きい場合、APD自身の周
波数特性が低下し、光受信回路に必要な帯域が確保され
ず、受信不能になる場合が生じる。また、抵抗器の値を
小さくして電圧低下量を少くすると、APDの増倍率が
大きいために前置増幅器が飽和して電気出力波形が歪み
受信不能になる場合が生じる。従って、APDの周波数
特性と前置増幅器の最大入力レベルの両者を考慮して抵
抗器2の値を設定する必要があり、調整範囲が狭く、結
果的に最大受光レベルを犠牲にしてしまう欠点があっ
た。
However, in the circuit shown in FIG. 2, the bias voltage applied to both ends of the APD decreases as the optical input increases. Therefore, when the optical input level is large, the frequency characteristic of the APD itself deteriorates, and the optical receiving circuit is affected. The required band may not be secured and reception may be impossible. Further, when the value of the resistor is reduced to reduce the amount of voltage drop, the preamplifier is saturated and the electric output waveform is distorted and unreceivable due to the large multiplication factor of the APD. Therefore, it is necessary to set the value of the resistor 2 in consideration of both the frequency characteristic of the APD and the maximum input level of the preamplifier, and the adjustment range is narrow, resulting in the sacrifice of the maximum light receiving level. there were.

【0005】本発明の目的は、APDに必要とされる周
波数帯域を確保することにより、最大受光レベルを拡大
した光受信回路を提供することにある。
An object of the present invention is to provide an optical receiving circuit in which the maximum light receiving level is expanded by ensuring the frequency band required for APD.

【0006】[0006]

【課題を解決するための手段】前記目的を達成するため
に、本発明による光受信回路は、受光素子とバイアス電
圧回路とが抵抗器と定電圧素子の並列回路により接続さ
れており、前記バイアス回路電圧から前記定電圧素子の
両端に生じる電圧を差し引いたバイアスでも、前記AP
Dが動作する範囲に前記定電圧素子の電圧が選定されて
いる構成になっている。
In order to achieve the above object, in the optical receiving circuit according to the present invention, a light receiving element and a bias voltage circuit are connected by a parallel circuit of a resistor and a constant voltage element. Even with a bias obtained by subtracting the voltage generated across the constant voltage element from the circuit voltage, the AP
The voltage of the constant voltage element is selected within the range in which D operates.

【0007】[0007]

【作用】本発明の作用を図1により説明する。抵抗器2
に並列に接続された定電圧素子3は、APD1により光
電変換された電流により抵抗器2に発生する電圧が定電
圧素子3の電圧に等しくなったときに導通し、それ以上
の電流値にたいしては、常に、一定電圧に固定され電圧
降下量が阻止される。この時、APDにかかるバイアス
電圧は高電圧発生回路の電圧VHから定電圧素子電圧V
Zの差で与えられる。従って、受信回路に必要なAPD
の周波数帯域の下限fLを与えるAPD電圧VL以上に
なるように定電圧素子を選定しておけば、光入力が増大
しても、APDの周波数帯域が不足して受信不能になる
ことはなく、受信回路の光入力レベルは接続された前置
増幅器の飽和点まで拡大することができる。
The operation of the present invention will be described with reference to FIG. Resistor 2
The constant-voltage element 3 connected in parallel with is conductive when the voltage generated in the resistor 2 by the current photoelectrically converted by the APD1 becomes equal to the voltage of the constant-voltage element 3, and for a current value higher than that, , Is always fixed to a constant voltage and the amount of voltage drop is blocked. At this time, the bias voltage applied to the APD is from the voltage VH of the high voltage generation circuit to the constant voltage element voltage V
Given by the difference in Z. Therefore, the APD required for the receiving circuit
If the constant voltage element is selected so as to be equal to or higher than the APD voltage VL that gives the lower limit fL of the frequency band of, even if the optical input increases, the frequency band of the APD does not become insufficient and reception becomes impossible. The optical input level of the receiving circuit can be extended to the saturation point of the connected preamplifier.

【0008】[0008]

【実施例】本発明の実施例を図1に示す。APD1とバ
イアス電圧回路VHが抵抗器2とツェナ−ダイオ−ド3
との並列回路により接続されており、APD1の出力は
前置増幅回路4に接続されている。APDはInGaA
s−APDを用いた。バイアス電圧VHは、最小受信感
度が最良となるレベルに固定することができる。図4に
実施例におけるAPDのバイアス電圧と光入力レベルの
関係を示す。ここで受信回路に必要なAPDの周波数帯
域fL(=1GHz)を与える電圧はVL(=60V)
であり、この時の増倍率はML(=2)である。最小受
光レベルがPL(=−40dBm)の時APD1の増倍
率はMH(=15)、バイアス電圧VH(=85V)と
なるように設定されている。また、前置増幅回路4の飽
和入力電流は400μAである。APD1に入力する光
レベルPに対してAPD1のバイアス電圧VAPDは、
APD1の受光感度をS(=1 A/W)、増倍率を
M、抵抗器2の定数をR(=300kΩ)として、
FIG. 1 shows an embodiment of the present invention. The APD 1 and the bias voltage circuit VH are connected to the resistor 2 and the Zener diode 3.
Are connected in parallel with each other, and the output of the APD 1 is connected to the preamplifier circuit 4. APD is InGaA
s-APD was used. The bias voltage VH can be fixed at a level at which the minimum receiving sensitivity becomes the best. FIG. 4 shows the relationship between the bias voltage of the APD and the optical input level in the example. Here, the voltage that gives the frequency band fL (= 1 GHz) of the APD necessary for the receiving circuit is VL (= 60 V).
And the multiplication factor at this time is ML (= 2). When the minimum light receiving level is PL (= -40 dBm), the multiplication factor of APD1 is set to MH (= 15) and the bias voltage VH (= 85 V). The saturation input current of the preamplifier circuit 4 is 400 μA. The bias voltage VAPD of the APD1 with respect to the optical level P input to the APD1 is
Let S (= 1 A / W) be the light receiving sensitivity of APD1, M be the multiplication factor, and R be the constant of resistor 2 (= 300 kΩ).

【0009】[0009]

【数1】 VAPD=VH−R×M×S×P
…(1) となる。ここでツェナ−電圧VZは VZ=VH−VL
## EQU00001 ## VAPD = VH-R.times.M.times.S.times.P
… (1). Here, the Zener voltage VZ is VZ = VH-VL

【0010】[0010]

【数2】 =25V
…(2) となるように設定した。これにより、光入力を増大して
もAPD電圧はVLに維持され、図中の実線のようにバ
イアスされる。ツェナ−ダイオ−ドを付加しない場合
は、図中の破線のようにバイアスされ
[Expression 2] = 25V
... (2) is set. As a result, even if the light input is increased, the APD voltage is maintained at VL and biased as shown by the solid line in the figure. When Zener diode is not added, it is biased as shown by the broken line in the figure.

【0011】[0011]

【数3】 VAPD=VL
…(3) となる光入力PH1(=−13.8dBm)以上でfL
を下回り、受信不能となるが、本実施例により前置増幅
機の飽和レベルまで拡大することができPH2(=−7
dBm)まで向上した。
## EQU00003 ## VAPD = VL
(3) The optical input PH1 (= -13.8 dBm) or more and fL
However, according to the present embodiment, the saturation level of the preamplifier can be increased to PH2 (= -7).
dBm).

【0012】[0012]

【発明の効果】本発明では光入力が大きい場合にも、抵
抗器に並列接続された定電圧素子により、APDの電圧
降下量が制限され、APDに必要な周波数帯域が確保さ
れるので、光受信器の最大受光レベルを拡大することが
できる。
According to the present invention, even when the optical input is large, the voltage drop amount of the APD is limited by the constant voltage element connected in parallel with the resistor, and the frequency band required for the APD is secured. The maximum light receiving level of the receiver can be increased.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明による実施例の回路図、FIG. 1 is a circuit diagram of an embodiment according to the present invention,

【図2】従来例の回路図、FIG. 2 is a circuit diagram of a conventional example,

【図3】APDの一般的特性図、FIG. 3 is a general characteristic diagram of APD,

【図4】本発明による実施例の動作を説明する特性図。FIG. 4 is a characteristic diagram illustrating the operation of an embodiment according to the present invention.

【符号の説明】[Explanation of symbols]

1…アバランシェホトダイオ−ド、2…抵抗器、3…定
電圧素子、4…前置増幅器。
1 ... Avalanche photo diode, 2 ... Resistor, 3 ... Constant voltage element, 4 ... Preamplifier.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】光信号を自己増倍して電気信号に変換する
アバランシェホトダイオ−ドと、前記アバランシェホト
ダイオ−ドの動作に必要な電圧を供給するバイアス回路
と、前記電気信号を増幅する前置増幅回路を含む光受信
回路において、前記アバランシェホトダイオ−ドとバイ
アス電圧回路とが、抵抗器と定電圧素子の並列回路によ
り接続されており、前記バイアス回路の電圧から前記定
電圧素子の両端に生じる電圧を差し引いたバイアス電圧
でも前記アバランシェホトダイオ−ドが動作する範囲に
前記定電圧素子の電圧が選定されていることを特徴とす
るアバランシェホトダイオ−ドのバイアス回路。
1. An avalanche photo diode for self-multiplying an optical signal and converting it into an electric signal, a bias circuit for supplying a voltage necessary for the operation of the avalanche photo diode, and an amplifier for amplifying the electric signal. In an optical receiver circuit including a preamplifier circuit, the avalanche photodiode and a bias voltage circuit are connected by a parallel circuit of a resistor and a constant voltage element, and the voltage of the bias circuit changes the constant voltage element from A bias circuit for an avalanche photodiode, characterized in that the voltage of the constant voltage element is selected within a range in which the avalanche photodiode operates even with a bias voltage obtained by subtracting a voltage generated at both ends.
JP23003891A 1991-09-10 1991-09-10 Bias circuit for avalanche photodiode Pending JPH0575355A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23003891A JPH0575355A (en) 1991-09-10 1991-09-10 Bias circuit for avalanche photodiode

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23003891A JPH0575355A (en) 1991-09-10 1991-09-10 Bias circuit for avalanche photodiode

Publications (1)

Publication Number Publication Date
JPH0575355A true JPH0575355A (en) 1993-03-26

Family

ID=16901594

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23003891A Pending JPH0575355A (en) 1991-09-10 1991-09-10 Bias circuit for avalanche photodiode

Country Status (1)

Country Link
JP (1) JPH0575355A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20170017780A (en) * 2015-08-05 2017-02-15 미쓰비시덴키 가부시키가이샤 Optical module

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20170017780A (en) * 2015-08-05 2017-02-15 미쓰비시덴키 가부시키가이샤 Optical module

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