JPH0570388B2 - - Google Patents

Info

Publication number
JPH0570388B2
JPH0570388B2 JP58057141A JP5714183A JPH0570388B2 JP H0570388 B2 JPH0570388 B2 JP H0570388B2 JP 58057141 A JP58057141 A JP 58057141A JP 5714183 A JP5714183 A JP 5714183A JP H0570388 B2 JPH0570388 B2 JP H0570388B2
Authority
JP
Japan
Prior art keywords
pulse
inverter
input
circuit
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58057141A
Other languages
Japanese (ja)
Other versions
JPS59185166A (en
Inventor
Hiroki Shimizu
Hiroshi Aoyama
Tooru Kodera
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Co Ltd
Original Assignee
Shinko Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Co Ltd filed Critical Shinko Electric Co Ltd
Priority to JP58057141A priority Critical patent/JPS59185166A/en
Publication of JPS59185166A publication Critical patent/JPS59185166A/en
Publication of JPH0570388B2 publication Critical patent/JPH0570388B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)
  • Supply And Distribution Of Alternating Current (AREA)

Description

【発明の詳細な説明】 この発明は商用電源と多重電流形インバータと
の同期切替を担う回路に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a circuit responsible for synchronous switching between a commercial power source and a multiple current source inverter.

例えば、フアン・ブロワーなどの風量制御を行
う場合、高出力時は商用電源にて動作させ、動作
休止時には次の動作に備えてインバータ(出力周
波数は商用周波数に比してかなり低く設定してあ
る)にて低速駆動するか停止するようにしてい
る。このような駆動方法ではインバータより商用
電源に、またはその逆に電源を切替える必要があ
る。
For example, when controlling the air volume of a fan or blower, it is operated on commercial power when the output is high, and when the operation is stopped, an inverter (the output frequency is set considerably lower than the commercial frequency) is used in preparation for the next operation. ) to drive at low speed or stop. In such a driving method, it is necessary to switch the power source from an inverter to a commercial power source, or vice versa.

ところで、例えばフアン・ブロワーなどの駆動
モータのインバータ運転から商用運転に切替える
には両者の周波数、電圧及び位相を一致させるこ
とが必要で、これなくしては突入電流が流れ、負
荷用モータは異常トルクを発生する。特に突入電
流は位相差によつて影響を強く受け、位相の一致
は電源切替の重要な要件となる。
By the way, for example, in order to switch from inverter operation to commercial operation of a drive motor such as a fan blower, it is necessary to match the frequency, voltage, and phase of the two, and without this, inrush current will flow and the load motor will generate abnormal torque. occurs. In particular, inrush current is strongly affected by phase difference, and phase matching is an important requirement for power supply switching.

一方、大容量電流形インバータでモータ負荷を
駆動するとき、インバータ出力が矩形波であるこ
とに伴つて、高調波分が多く、トルク脈動が大で
ある。これを補償すべくいくつかの電流形インバ
ータの出力を1つの波形を中心に左右に対称的に
位置をずらした電流形インバータの多重化手段を
採用し、負荷電流の波形をできるだけ正弦波に近
づけている。
On the other hand, when driving a motor load with a large capacity current source inverter, since the inverter output is a rectangular wave, there are many harmonic components and large torque pulsations. In order to compensate for this, we adopted a multiplexing method of current source inverters in which the outputs of several current source inverters are shifted symmetrically to the left and right around a single waveform, thereby making the waveform of the load current as close to a sine wave as possible. ing.

さて、この電流形インバータの多重化におい
て、各ユニツトインバータは多重数に応じて一定
の位相差をもたせる必要がある。このことに伴
い、商用電源との同期切替に際しても各ユニツト
インバータの位相が変化しないようにしなければ
ならない。
Now, in multiplexing current source inverters, each unit inverter must have a certain phase difference depending on the number of multiplexed units. Accordingly, it is necessary to ensure that the phase of each unit inverter does not change even when switching in synchronization with the commercial power supply.

この発明の目的は、インバータ電源と商用電源
との切替に際して位相一致を検出し、インバータ
の各ユニツトの位相を一定間隔に順次セツトして
同期化をはかることにより、位相ミスを的確に防
止して同期切替を可能とし、切替時のインバータ
の各ユニツトの容量分担を均等に維持させること
にある。
The purpose of this invention is to accurately prevent phase errors by detecting phase matching when switching between the inverter power source and the commercial power source, and sequentially setting the phases of each unit of the inverter at regular intervals for synchronization. The purpose is to enable synchronous switching and maintain equal capacity sharing among each unit of the inverter at the time of switching.

以下、図示する実施例について具体的に説明す
る。第1図は、3多重18相インバータについての
回路図で、1は商用電源である。2,3及び4は
電流形ユニツトインバータで、それぞれ順変換部
及び逆変換部を備え、各順変換部入力側に対して
は商用電源1の電圧が変圧器5を介して印加され
る。そして各ユニツトインバータ2,3及び4の
各逆変換部出力はそれぞれ各別の変圧器6,7及
び8を介して総合加算出力を得たうえコンタクタ
ーK1を通じて負荷用モータ9に供給される。ま
た、商用電源はコンタクターK2を通じて負荷用
モータ9に連らなつている。10は周波数指令設
定器で、その出力信号はランプ関数発生器11を
介してV−F変換器12に導びかれる。13,1
4及び15はそれぞれユニツトインバータ2,3
及び4についての入力パルス選択回路で、それぞ
れ上記V−F変換器12により+20°,0°,−20°の
位相をなすパルス信号を受けるとともに後述する
同期パルス発生回路よりそれぞれ+20°,0°,−20°
の位相をなすパルスを受け、後述する位相、周波
数一致信号を基に順次使用パルスの切替を促すよ
うになつている。この入力パルス選択回路13,
14,15の具体的回路は第2図に示すように、
タイミング回路13a,14a,15a及びスイ
ツチング回路13b,14b,15bを図示の接
続にて構成している。16,17及び18はそれ
ぞれユニツトインバータ2,3,4の各逆変換部
の制御用パルス分配器で、それぞれ入力パルス選
択回路13,14,15の選択パルスを基にパル
ス分配作用をなし、それぞれ増幅器19,20,
21を介して各ユニツトインバータ2,3,4の
逆変換素子を制御させる。このパルス分配器1
6,17,18のR,S,Tいずれかの相の一致
をはかるべく、順に同期化信号を供給する。22
は力率角検出回路で、ユニツトインバータ3の出
力電流及び出力電圧をそれぞれ変圧器23、変流
器24より得て力率を検出する。25は周波数一
致検出回路で、上記V−F変換器12への入力電
圧で規制されるパルス周波数と商用周波数との対
比のもとに両周波数の一致により出力信号を得
る。26は位相一致検出回路で、ユニツトインバ
ータ3の出力を上記変圧器23を介して得るとと
もに、商用電源電圧を変圧器30を介して得て、
周知の手段にて両電圧の位相が一致したとき出力
が得られる。27はアンドゲートで、上記周波数
一致検出回路25、位相一致検出回路26の各出
力信号のアンドをとつて入力パルス選択回路13
のパルス切替指令として供給する。28は同期パ
ルス発生回路で、上記変圧器5からの出力を変圧
器29を介して入力すると同時に力率検出回路2
2から入力を得て各入力を基に商用電源電圧を同
期したパルスを各入力パルス選択回路13,1
4,15の入力信号としてそれぞれ位相差を+
20°,0°,−20°を保つて供給する。そして、この同
期パルス発生回路の具体的構成は第3図に示すよ
うに入力線間電圧RS,ST,TRを受ける各フイ
ルタ回路F1,F2,F3、当該フイルタ回路F
1,F2,F3よりの出力を受けるゼロクロス回
路Z1,Z2,Z3、当該ゼロクロス回路Z1,
Z2,Z3の各出力信号を微分する微分回路H
1,H2,H3、当該微分回路H1,H2,H3
からの入力の波形整形を担う波形整形回路W、当
該波形整形回路W及び上記力率検出回路22から
の力率信号を受けてそれぞれ+20°,0°,−20°の位
相をなすパルスを得るパルス発生回路P1,P
2,P3から構成される。
The illustrated embodiment will be specifically described below. FIG. 1 is a circuit diagram of a 3-multiplex 18-phase inverter, where 1 is a commercial power supply. 2, 3, and 4 are current source unit inverters each having a forward conversion section and an inverse conversion section, and the voltage of the commercial power source 1 is applied via a transformer 5 to the input side of each forward conversion section. The inverse converter outputs of the unit inverters 2, 3, and 4 are passed through separate transformers 6, 7, and 8 to obtain a total sum output, which is then supplied to the load motor 9 via the contactor K1. Further, the commercial power source is connected to the load motor 9 through the contactor K2. 10 is a frequency command setter, the output signal of which is guided to a V-F converter 12 via a ramp function generator 11. 13,1
4 and 15 are unit inverters 2 and 3, respectively.
The input pulse selection circuits for and 4 receive pulse signals with phases of +20°, 0°, and -20° from the V-F converter 12, respectively, and receive pulse signals of +20° and 0°, respectively, from the synchronizing pulse generation circuit described later. ,−20°
The system receives pulses having a phase of , and prompts to sequentially switch the pulse to be used based on a phase and frequency matching signal, which will be described later. This input pulse selection circuit 13,
The specific circuits of 14 and 15 are as shown in Figure 2.
Timing circuits 13a, 14a, 15a and switching circuits 13b, 14b, 15b are configured by the connections shown. Reference numerals 16, 17 and 18 are pulse distributors for controlling the inverse converters of the unit inverters 2, 3 and 4, respectively, which perform a pulse distribution function based on the selection pulses of the input pulse selection circuits 13, 14 and 15, respectively. amplifiers 19, 20,
21 to control the inverse conversion elements of each unit inverter 2, 3, 4. This pulse distributor 1
A synchronization signal is supplied in order to match the R, S, and T phases of 6, 17, and 18. 22
is a power factor angle detection circuit which obtains the output current and output voltage of the unit inverter 3 from the transformer 23 and current transformer 24, respectively, and detects the power factor. Reference numeral 25 denotes a frequency coincidence detection circuit, which compares the pulse frequency regulated by the input voltage to the V-F converter 12 with the commercial frequency and obtains an output signal by matching the two frequencies. 26 is a phase coincidence detection circuit which obtains the output of the unit inverter 3 via the transformer 23 and obtains the commercial power supply voltage via the transformer 30;
An output is obtained by well-known means when the phases of both voltages match. 27 is an AND gate which performs an AND operation on each output signal of the frequency coincidence detection circuit 25 and phase coincidence detection circuit 26 and outputs the signal to the input pulse selection circuit 13.
Supplied as a pulse switching command. 28 is a synchronous pulse generation circuit which inputs the output from the transformer 5 via the transformer 29 and simultaneously inputs the output from the power factor detection circuit 2.
2, each input pulse selection circuit 13, 1 receives a pulse synchronized with the commercial power supply voltage based on each input.
As input signals of 4 and 15, the phase difference is +
Supply while maintaining the angles of 20°, 0°, and -20°. The specific configuration of this synchronous pulse generation circuit is shown in FIG.
Zero cross circuits Z1, Z2, Z3 receiving outputs from 1, F2, F3, the zero cross circuit Z1,
Differentiation circuit H that differentiates each output signal of Z2 and Z3
1, H2, H3, the relevant differentiation circuit H1, H2, H3
A waveform shaping circuit W responsible for shaping the waveform of the input from the waveform shaping circuit W receives power factor signals from the waveform shaping circuit W and the power factor detection circuit 22 to obtain pulses having phases of +20°, 0°, and −20°, respectively. Pulse generation circuit P1, P
It consists of 2 and P3.

上記構成において、通常のインバータ運転時に
ついては始動に際して、まずコンタクタK1を閉
じ、負荷用モータ9を各ユニツトインバータ2,
3,4側に接続し、周波数設定器10の出力に応
じた周波数に至るまでランプ関数発生器の作用を
伴つてV−F変換器12からのパルス周期は徐々
に短くなつてゆく。このとき各入力パルス選択回
路13,14,15はそれぞれV−F変換器12
からの+20°パルス、0°パルス、−20°パルスを選択
するように設定しておくことにより、各ユニツト
インバータ2,3,4はそれぞれパルス分配器1
6,17,18及び増幅器19,20,21によ
つて動作され、ユニツトインバータ3の波形を中
心に20°の進み波形(ユニツトインバータ2の波
形)と20°の遅れ波形(ユニツトインバータ4の
波形)とが重なり総合して正弦波に近づけるよう
に動作する。この動作において、各パルス分配器
16,17,18は順に相の一致をはかるべく信
号が伝達される。このようにして負荷用モータ9
には各ユニツトインバータ2,3,4より変圧器
6,7,8及びコンタクターK1を順次介してイ
ンバータ電力が供給されることになる。
In the above configuration, during normal inverter operation, upon starting, contactor K1 is first closed, and load motor 9 is connected to each unit inverter 2,
3 and 4, and the pulse period from the V-F converter 12 gradually becomes shorter with the action of the ramp function generator until the frequency corresponds to the output of the frequency setter 10. At this time, each input pulse selection circuit 13, 14, 15 is connected to a V-F converter 12.
By setting to select +20° pulse, 0° pulse, and -20° pulse from
6, 17, 18 and amplifiers 19, 20, and 21, the unit inverter 3 generates a 20° leading waveform (unit inverter 2 waveform) and a 20° delayed waveform (unit inverter 4 waveform). ) overlaps and operates in a manner that brings it closer to a sine wave. In this operation, signals are sequentially transmitted to each pulse distributor 16, 17, and 18 in order to match the phases. In this way, the load motor 9
Inverter power is supplied from each unit inverter 2, 3, 4 via the transformer 6, 7, 8 and contactor K1 in sequence.

さて、このようなユニツトインバータ2,3,
4からの負荷用モータ9への電力供給は商用電源
による電力供給に比して効率が悪く、特に、約90
%以下の低速運転時を除き、省エネルギーの観点
から通常の動作は商用電源にて担うよう切替える
必要があるが、このインバータ運転より商用電源
による運転への移行を順を追つて説明することと
する。
Now, such unit inverters 2, 3,
The power supply from 4 to the load motor 9 is less efficient than the power supply from a commercial power source, and in particular, the power supply from about 90
% or less, it is necessary to switch to using commercial power for normal operation from the perspective of energy conservation, but we will explain the transition from inverter operation to operation using commercial power in a step-by-step manner. .

まず、コンタクターK1を閉じユニツトインバ
ータ2,3,4順に負荷用モータ9を接続したま
まの状態で、周波数設定器10の出力レベル即
ち、V−F変換器への入力レベルを当該V−F変
換器の出力パルスの周期が商用電源周波に対応す
るように定める。このときユニツトインバータ
2,3,4の周波数と商用周波数とが一致する
と、周波数一致検出回路25より周波数一致信号
が供給される。そして、ユニツトインバータ3の
出力電圧位相と商用電源1の位相とが一致したと
き位相一致検出回路26より出力(切替指令)が
出され、アンドゲート27を通じて各入力パルス
選択回路13のタイミング回路13aに加えられ
る。
First, with the contactor K1 closed and the load motor 9 connected to the unit inverters 2, 3, and 4 in that order, the output level of the frequency setter 10, that is, the input level to the V-F converter, is converted to the V-F converter. The period of the output pulse of the device is determined so that it corresponds to the commercial power supply frequency. At this time, when the frequencies of unit inverters 2, 3, and 4 match the commercial frequency, a frequency match detection circuit 25 supplies a frequency match signal. Then, when the output voltage phase of the unit inverter 3 and the phase of the commercial power source 1 match, an output (switching command) is issued from the phase coincidence detection circuit 26, and is sent to the timing circuit 13a of each input pulse selection circuit 13 through the AND gate 27. Added.

ところで、アンドゲート27より切替指令が出
される時点に先だつて、同期パルス発生回路28
にて、第3図の各構成要素及び力率検出回路22
の作用にて商用周波数に対し、+20°位相パルス、
0°位相パルス、−20°位相パルスが作られ、それぞ
れ入力パルス選択回路の1入力として加えられて
いる。
By the way, before the switching command is issued from the AND gate 27, the synchronous pulse generation circuit 28
, each component and power factor detection circuit 22 in FIG.
+20° phase pulse with respect to the commercial frequency due to the action of
A 0° phase pulse and a −20° phase pulse are created, and each is added as one input to the input pulse selection circuit.

従つて、切替指令が入力パルス選択回路13に
入力されると、タイミング回路によつて例えば、
V−F変換器12からの+20°位相パルスの立下
り時点にて同期パルス発生回路28から出力され
る+20°同期パルスに切替えられる。次いで、ス
イツチング回路13bよりの指令により入力パル
ス選択回路14中のタイミング回路14aに指令
を与えV−F変換器12からの0°位相パルスの立
下り時点で0°位相の商用同期パルスに切替がなさ
れると同時にタイミング回路15aに切替指令が
出される。これによつて、上記同様のパルス立下
りのタイミングでスイツチング回路15bから−
20°位相の商用同期パルス分配器18に与えると
ともに同期切替許容信号を供給する。この同期切
替許容信号によつて上記コンタクターK2を閉じ
ることにより商用電源1及び各ユニツトインバー
タ2,3,4からのインバータ電源とがそれぞれ
コンタクターK2,K1を通じてラツプして負荷
用モータ9に電力供給を行うに至る。このラツプ
運転を若干時間行つてコンタクターK1を開路
(この動作は自動、手動を問わない)し、負荷用
モータ9はもつぱら商用電源1により電力供給を
受ける。
Therefore, when a switching command is input to the input pulse selection circuit 13, the timing circuit selects, for example,
At the falling edge of the +20° phase pulse from the V-F converter 12, the pulse is switched to the +20° synchronizing pulse output from the synchronizing pulse generating circuit 28. Next, a command is sent from the switching circuit 13b to the timing circuit 14a in the input pulse selection circuit 14 to switch to the 0° phase commercial synchronizing pulse at the falling edge of the 0° phase pulse from the V-F converter 12. At the same time, a switching command is issued to the timing circuit 15a. As a result, the switching circuit 15b -
It is applied to the 20° phase commercial synchronous pulse distributor 18 and also provides a synchronous switching permission signal. By closing the contactor K2 in response to this synchronization switching permission signal, the commercial power supply 1 and the inverter power supplies from each unit inverter 2, 3, and 4 are wrapped through the contactors K2 and K1, respectively, and power is supplied to the load motor 9. It comes down to doing it. After performing this lap operation for some time, the contactor K1 is opened (this operation can be performed automatically or manually), and the load motor 9 is supplied with power exclusively from the commercial power source 1.

なお、上記説明においては3多重18相インバー
タの例を示したものであるが、一般にn多重(n
は1を除く自然数)に適用できる。また、各ユニ
ツトインバータの位相差は20°とは限らず任意に
設定できる。
Although the above explanation shows an example of a 3-multiplex 18-phase inverter, generally n-multiplex (n
can be applied to all natural numbers except 1). Furthermore, the phase difference between each unit inverter is not limited to 20° and can be set arbitrarily.

以上述べたように、この発明に係る多重電流形
インバータと商用電源との同期切替装置は、複数
個のユニツトインバータを所望の位相差をもつて
作動し、多重化して負荷に電力を供給する多重電
流形インバータにおいて、各ユニツトインバータ
に対して、2個の入力パルスのうちいずれかを制
御指令によつて選択する入力パルス選択回路を備
え、当該各入力パルス選択回路には周波数設定器
よりの入力レベルに応じた周波数であつて所望の
位相差をもつて生ずるパルスと、商用電源と同期
し、上記と同一の位相差を有するパルスとを入力
信号として受け、上記各ユニツトインバータ出力
にて得られる電流形インバータの総合出力(ユニ
ツトインバータ数が奇数のときは0°位相の中心と
なるユニツトインバータの出力でも可)と商用電
源の出力とが同一周波数位相となつたとき1つの
入力パルス選択回路の選択パルスの切替をし、順
次残りの入力パルス選択回路の選択パルスの切替
を行い全ての入力パルス選択回路の切替が終了し
た後ラツプ運転を経て電源切替を行うようにした
ものである。かかる構成に基づいて、○イ多重電流
形インバータにおいてもインバータ電源と商用電
源の同期切替時に各ユニツトインバータごとにイ
ンバータ制御用V−F変換器よりのパルスと商用
同期パルスとの切替は各ユニツト毎に順次行なわ
れるので位相ミスを生ずることなく同期化でき
る。○ロこの装置によりユニツトインバータは20°
程度の短時間に各ユニツトインバータの使用パル
スの切替を行うので各ユニツトインバータの容量
分担がくずれる余地がないなどの効果を有する。
As described above, the synchronous switching device between a multiplex current source inverter and a commercial power source according to the present invention operates a plurality of unit inverters with a desired phase difference, multiplexes them, and supplies power to a load. In a current source inverter, each unit inverter is equipped with an input pulse selection circuit that selects one of two input pulses based on a control command, and each input pulse selection circuit receives an input from a frequency setting device. A pulse that has a frequency corresponding to the level and a desired phase difference, and a pulse that is synchronized with the commercial power supply and has the same phase difference as above are received as input signals, and are obtained at the output of each of the above unit inverters. When the overall output of the current source inverter (if the number of unit inverters is odd, the output of the unit inverter with the 0° phase center is also acceptable) and the output of the commercial power supply have the same frequency phase, one input pulse selection circuit The selection pulse is switched, and the selection pulses of the remaining input pulse selection circuits are sequentially switched, and after the switching of all input pulse selection circuits is completed, the power supply is switched through a lap operation. Based on this configuration, even in the case of a multiple current source inverter, switching between the pulse from the V-F converter for inverter control and the commercial synchronous pulse is performed for each unit inverter at the time of synchronized switching between the inverter power supply and the commercial power supply. Since this is performed sequentially, synchronization can be achieved without causing phase errors. ○ With this device, the unit inverter can be adjusted to 20°.
Since the pulses used by each unit inverter are switched in a relatively short period of time, there is no room for the capacity allocation of each unit inverter to be disrupted.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明の実施例を示す回路図、第2
図、第3図は第1図の一部を詳細に示した回路図
である。 1……商用電源、2,3,4……ユニツトイン
バータ、9……負荷用モータ、10……周波数設
定器、12……V−F変換器、13,14,15
……入力パルス選択回路、25……周波数一致検
出回路、26……位相一致検出回路、28……同
期パルス発生回路。
Fig. 1 is a circuit diagram showing an embodiment of this invention, Fig. 2 is a circuit diagram showing an embodiment of the present invention;
3 are circuit diagrams showing a part of FIG. 1 in detail. 1... Commercial power supply, 2, 3, 4... Unit inverter, 9... Load motor, 10... Frequency setting device, 12... V-F converter, 13, 14, 15
... Input pulse selection circuit, 25 ... Frequency coincidence detection circuit, 26 ... Phase coincidence detection circuit, 28 ... Synchronization pulse generation circuit.

Claims (1)

【特許請求の範囲】[Claims] 1 複数個のユニツトインバータを所望の位相差
をもつて作動し、これらの各ユニツトインバータ
出力を多重化して負荷に電力を供給する多重電流
形インバータにおいて、各ユニツトインバータに
対して2個の入力パルスのうちいずれかを選択
し、当該各ユニツトインバータを制御する入力パ
ルス選択回路を有し、、当該各入力パルス選択回
路には周波数設定器よりの入力レベルに応じた周
波数であつて所望の位相差をもつて生ずるパルス
信号と、商用電源電圧と同一周波数で上記位相差
と同一の位相差を有するパルスとを入力信号とし
て与える回路手段と、上記各ユニツトインバータ
出力にて得られる電流形インバータの総合出力と
商用電源の出力とが同一周波数同一位相となつた
とき1つの入力パルス選択回路の選択パルスの切
替を行い、順次残りの入力パルス選択回路の選択
パルスの切替をなし、全ての入力パルス選択回路
の切替が完了した際に電源切替許容指令を供給す
る回路手段を備えたことを特徴とする多重電流形
インバータと商用電源との同期切替装置。
1. In a multiple current source inverter that operates multiple unit inverters with a desired phase difference and multiplexes the output of each of these unit inverters to supply power to a load, two input pulses are applied to each unit inverter. It has an input pulse selection circuit that selects one of these and controls each unit inverter, and each input pulse selection circuit has a frequency corresponding to the input level from the frequency setting device and a desired phase difference. a circuit means for supplying as input signals a pulse signal generated by the above-mentioned pulse signal and a pulse having the same frequency as the commercial power supply voltage and the same phase difference as the above-mentioned phase difference, and a current-source inverter obtained from the output of each of the above-mentioned unit inverters. When the output and the output of the commercial power supply have the same frequency and the same phase, the selection pulse of one input pulse selection circuit is switched, and the selection pulses of the remaining input pulse selection circuits are sequentially switched, and all input pulses are selected. A synchronous switching device for a multiple current source inverter and a commercial power source, characterized by comprising circuit means for supplying a power source switching permission command when circuit switching is completed.
JP58057141A 1983-03-31 1983-03-31 Synchronization switching device of multiple current type inverter and commercial power source Granted JPS59185166A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58057141A JPS59185166A (en) 1983-03-31 1983-03-31 Synchronization switching device of multiple current type inverter and commercial power source

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58057141A JPS59185166A (en) 1983-03-31 1983-03-31 Synchronization switching device of multiple current type inverter and commercial power source

Publications (2)

Publication Number Publication Date
JPS59185166A JPS59185166A (en) 1984-10-20
JPH0570388B2 true JPH0570388B2 (en) 1993-10-05

Family

ID=13047291

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58057141A Granted JPS59185166A (en) 1983-03-31 1983-03-31 Synchronization switching device of multiple current type inverter and commercial power source

Country Status (1)

Country Link
JP (1) JPS59185166A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09224872A (en) * 1996-02-23 1997-09-02 Takahiro Sunami Foldable tissue paper, laminated body for foldable tissue paper and method for laminating tissue paper

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63294222A (en) * 1987-05-25 1988-11-30 Sharp Corp Composite type optical power generating system

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5473236A (en) * 1977-11-25 1979-06-12 Shindengen Electric Mfg Inverter control signal system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5473236A (en) * 1977-11-25 1979-06-12 Shindengen Electric Mfg Inverter control signal system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09224872A (en) * 1996-02-23 1997-09-02 Takahiro Sunami Foldable tissue paper, laminated body for foldable tissue paper and method for laminating tissue paper

Also Published As

Publication number Publication date
JPS59185166A (en) 1984-10-20

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