JPH0569302B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to a wafer chip detection device for determining the quality of the external shape and electrical characteristics of a wafer chip and for detecting the position of a non-defective chip.

(Background technology) In the manufacturing process of semiconductor integrated circuits and chip transistors, circuit patterns corresponding to multiple wafer chips are formed on a thin disc-shaped silicon wafer, and the electrical characteristics of each wafer chip are tested. Wafer chips with defective electrical characteristics are marked with a mark called a butt mark in the center. After that, as shown in Figure 6,
Each wafer chip 3 is cut into pieces, the external shape and electrical characteristics are judged to be good or bad, and only good wafer chips are subjected to die bonding and wire bonding. Defective wafer chips include those with cracks as shown in Figure 7b, those with defects in external shape such as chips as shown in Figure 7c, and those with defective external shapes such as chips as shown in Figure 7d. Some of them have a butt mark 4 indicating poor electrical characteristics. These defective wafer chips 3 are removed by a detection device, and only good wafer chips 3 as shown in FIG. 7a are selected.
The position and orientation of the device are measured and then mounted using a die bonder.

In order to remove such chips with defective external shapes or butt marks, Japanese Patent Laid-Open No. 56
As disclosed in Japanese Patent Publication No. 26449 and Japanese Patent Application Laid-Open No. 56-98835, a sorting device is equipped with a butt mark detection section and measures the chip area or external shape of chips to determine whether they are normal or not. is proposed. However, with these conventional techniques, when detecting defects in the external shape or detecting butt marks, it is necessary to accurately align the detection area and the chip in advance, and a highly accurate positioning mechanism is required. There was a problem in that processing for alignment took time.

(Object of the Invention) The present invention has been made in view of the above-mentioned points, and its purpose is to determine the external shape of a wafer chip by searching the edge portion of the wafer chip and determining the position of the edge portion. It is an object of the present invention to provide a wafer chip detection device that not only makes it easy to perform judgment and search for bad marks, but also enables the position detection of non-defective chips by effectively utilizing the position information of the edge portion. .

(Disclosure of the Invention) In the wafer chip detection device according to the present invention, as shown in the attached drawings, a wafer chip 3
A detection device for a wafer chip 3 has an imaging section 1 that obtains an image of the wafer chip 3, and a non-defective chip detection section 2 that detects a non-defective wafer chip 3 from the image of the wafer chip 3 obtained by the imaging section 1. The good chip detection unit 2 detects a wafer chip 3 to be detected.
The edge portion of each wafer chip 3 is searched according to the measurement point determined based on the window 5 set in advance for each product type, and the external shape of each wafer chip 3 is determined based on the position of the searched edge portion. External shape determination section 2 that measures and determines pass/fail
1, and for the wafer chip 3 whose external shape is determined to be good, a search range is generated based on the position of the searched edge portion or the measured external shape, and the center of the wafer chip 3 is searched. The wafer chip 3 includes a butt mark determination unit 22 that determines the presence or absence of a butt mark 4 indicating defective electrical properties, and a wafer chip 3 whose external shape and electrical properties are good.
and a position detecting section 23 that detects the position of the edge portion with reference to the position of the edge portion.

FIG. 2 is a diagram showing a schematic configuration of the imaging section 1. As shown in FIG.
The imaging unit 1 employs an automatic magnification adjustment mechanism based on a two-camera switching system in order to freely switch the field of view for various types of wafer chips 3 of different sizes. This automatic magnification adjustment mechanism consists of an objective lens 11 having a magnification adjustment section by one zoom adjustment mechanism 10, and two cameras 14, 15 connected to the eyepiece side via relay lenses 12, 13, each having a different magnification. The zoom adjustment mechanism 10 is driven by a separately provided magnification adjustment motor 16, and the control of this motor 16 and the switching control of the cameras 14 and 15 are performed by the same controller. This allows the switching of cameras 14 and 15 with the same detection system to cover the wafer chip 3, which has an area ratio of up to 400 times, which could not be covered by adjusting the magnification of a single camera.
Alternatively, detection was made possible by adjusting the magnification of the zoom adjustment mechanism 10. Figure 3 shows the field of view covered by the high-magnification camera and the low-magnification camera, and by switching the cameras, you can
This shows that the effective visual field range of the imaging unit 1 is expanded. When using this imaging section 1, the detection field of view, the magnification of the detection system, etc. are set in advance using a simple interactive program so that a plurality of wafer chips 3 are included in the detection field of view.

Next, the wafer chips 3 obtained in the imaging section 1 are
A pass/fail judgment is made from the image. wafer chip 3
In this process, a circuit pattern of a semiconductor component is formed on a circular silicon wafer pasted on a transparent film, and the electrical characteristics of each wafer chip 3 are tested. will be attached. Thereafter, each wafer chip 3 is cut and stretched as shown in FIG. Defective wafer chips 3 include defects in external shape such as cracks (Fig. 7b) and chips (Fig. 7c), as well as those with the aforementioned butt marks 4 (Fig. 7d). be. When making a pass/fail judgment, it is necessary to remove these defective wafer chips 3 and select only wafer chips 3 that are free from defects in both external shape and electrical characteristics as shown in FIG. 7a.

First, in order to detect defects in the external shape, the external shape determining section 21 is instructed in advance for each product type according to the size and shape of the wafer chip 3 to be detected, as shown in FIG. - Window 5 based on the set window 5
Measurement points for searching the edge portions of a plurality of wafer chips 3 within the wafer chips 3 are determined, and the edge portions of each wafer chip 3 are searched. As a result, the external shape of each wafer chip 3 is measured, and the presence or absence of defects in the external shape such as cracks and chips is determined. In FIG. 4, the white circle indicates the measurement starting point, and the arrow indicates the search direction. The number of measurement starting points may be greater than the number shown in the figure, and the larger the number of measurement starting points, the more accurately the shape of the edge part can be known, but shape defects such as those shown in Figure 7 b and c can be detected. For this purpose, the example shown in FIG. 4 is sufficient.

Next, the butt mark determination unit 22 determines whether the wafer chip 3 has a good external shape or not, based on the external shape (in other words, based on the position of the edge portion).
We searched the center again, and as shown in Figure 5,
The presence or absence of the butt mark 4 is determined. Since the butt mark 4 is provided at the center of the wafer chip 3, it is only necessary to search within the shaded area in FIG. 5, and if the butt mark 4 is within this range, the electrical characteristics are poor. If there is no bud mark 4 within this range, it is determined that the electrical characteristics are not defective.

This measurement range can be arbitrarily set according to the size, position, etc. of the butt mark.

Furthermore, the position detecting section 23 detects the position of the wafer chip 3 whose external shape and electrical characteristics are determined to be good. A die bonder or the like uses this position detection information to mount the wafer chip 3. The position of the wafer chip 3 is detected using the edge portion as a reference. Since this device obtains the external shape and position information of the wafer chip 3 using the edge portion of the wafer chip 3 as a reference, it is less susceptible to the influence of the internal circuit pattern of the wafer chip 3. , and a plurality of wafer chips 3 can be recognized at once in a short time. In addition, in order to handle many types of wafer chips 3, it is only necessary to perform simple teaching and settings such as setting the detection field of view for each wafer chip 3, and even when changing types, data for multiple types can be used. By registering in advance, switching can be performed instantaneously, and it is easy to judge the quality of wafer chips 3 and detect position information, which are required when mounting various types of wafer chips 3 at the same time using a die bonder, etc. It is something that can be done.

(Effects of the Invention) As described above, the present invention is equipped with an imaging unit that obtains images of wafer chips, and the images of wafer chips obtained by the imaging unit are classified for each type of wafer chip to be detected. Since the edge part of the wafer chip is searched using a preset window as a reference, the external shape can be calculated based on the position information of the searched edge part without having to align the wafer chip with high accuracy in advance. It is possible to easily judge the quality of the product. Furthermore, the presence or absence of a butt mark can be easily detected by generating a search range for the butt mark based on the position of the edge portion of the wafer chip or the external shape of the wafer chip. Furthermore, the position information of the edge portion obtained here can be effectively used to easily detect the position of a non-defective product.

[Brief explanation of the drawing]

FIG. 1 is a block diagram corresponding to claims showing the basic configuration of the present invention, FIG. 2 is a schematic configuration diagram showing an imaging unit used in an embodiment of the present invention, and FIG. 3 is an explanatory diagram showing the effective field of view range of the same. Fig. 4 is an explanatory diagram showing an edge portion search method used in the above embodiment, Fig. 5 is an explanatory diagram showing an example of detecting a butt mark used in the above embodiment, and Fig. 6 is an explanatory diagram showing the detection target in the above embodiment. FIG. 7a is a plan view showing a good wafer chip, and FIGS. 7b to 7d are plan views showing defective wafer chips. 1 is an imaging section, 2 is a good chip detection section, 3 is a wafer chip, 4 is a butt mark, 5 is a window, 21 is an external shape determination section, 22 is a butt mark determination section, and 23 is a position detection section.

Claims (1)

[Scope of Claims] 1. A wafer chip detection device comprising: an imaging unit that obtains an image of a wafer chip; and a non-defective chip detection unit that detects a non-defective wafer chip from the image of the wafer chip obtained by the imaging unit. The non-defective chip detection unit searches the edge portion of each wafer chip according to measurement points determined based on a preset window for each type of wafer chip to be detected, and detects the detected edge. An external shape determination section that measures the external shape of each wafer chip based on the position of the portion and determines whether the chip is good or bad; a butt mark determination unit that generates a search range based on the measured external shape and searches for the center of the wafer chip, and determines the presence or absence of a butt mark indicating defective electrical characteristics; 1. A wafer chip detection device comprising: a position detection unit that detects the position of the wafer chip with reference to the position of the edge portion. 2. Claims characterized in that the imaging unit includes a magnification adjustment mechanism and is configured to capture a plurality of wafer chips into one imaging area at the same time to obtain an image of each wafer chip. The wafer chip detection device according to item 1.