JPH0568661B2 - - Google Patents
Info
- Publication number
- JPH0568661B2 JPH0568661B2 JP59031837A JP3183784A JPH0568661B2 JP H0568661 B2 JPH0568661 B2 JP H0568661B2 JP 59031837 A JP59031837 A JP 59031837A JP 3183784 A JP3183784 A JP 3183784A JP H0568661 B2 JPH0568661 B2 JP H0568661B2
- Authority
- JP
- Japan
- Prior art keywords
- current
- circuit
- integrated value
- input
- timing pulse
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000001514 detection method Methods 0.000 claims description 5
- 238000007747 plating Methods 0.000 description 14
- 239000002184 metal Substances 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000001556 precipitation Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
- Y02E60/10—Energy storage using batteries
Description
【発明の詳細な説明】
本発明は電流積算計に関し、一層詳細には複数
の電流値を積算して表示することができ、複数の
連続めつきラインが組まれるめつき浴の管理等に
用いて好適な電流積算計に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a current integrator, and more specifically, it is capable of integrating and displaying a plurality of current values, and is used for managing a plating bath in which a plurality of continuous plating lines are constructed. The present invention relates to a suitable current integrator.
めつき処理工程において、めつき電流積算値を
知ることは、析出量や浴槽寿命等を考慮する上で
浴管理上重要である。昨今のめつき処理工程にお
いては、例えば、半導体装置用リードフレーム等
の金属帯条をめつきする場合、複数条のそれぞれ
電流値等のめつき処理条件の異なる金属帯条を
(従つて電源はそれぞれ異なる)同一めつきライ
ンに流す複数ライン方式も採用されている。従来
において上記の電流積算値の管理はそれぞれのめ
つきライン毎に1つの電流積算計を用意し、各々
個別に積算した電流値を合計して行つており、能
率に劣るという難点があつた。 In the plating process, knowing the integrated value of the plating current is important for bath management in consideration of the amount of precipitation, bath life, etc. In the current plating process, for example, when plating metal strips such as lead frames for semiconductor devices, multiple metal strips are used, each with different plating conditions such as current value (therefore, the power supply is A multiple line method is also adopted in which the metal is passed through the same plating line (each with a different color). Conventionally, the above-mentioned integrated current values have been managed by preparing one current integrator for each plating line and summing the individually integrated current values, which has the drawback of being inefficient.
本発明は上記難点に鑑みてなされ、その目的と
するところは、複数の電流値を積算してその合計
値を直ちに知ることのできる電流積算計を提供す
るにあり、その特徴は、複数の電流に対処しうる
ように設けた複数の入力部と、この各入力部に入
力された電流をぞれぞれ分流する分流回路と、こ
の分流回路によつて分流された各電流の一定時間
毎の積算値の有無もしくは該積算値が基準積算値
以上か否かを検出する積分回路と、前記の検出結
果をそれぞれ記憶する記憶回路と、前記の各記憶
回路にタイミングパルスを入力して、前記の積算
値を有する場合もしくは積算値が基準積算値を超
えている場合を検出すると共に記憶結果を消去す
るタイミングパルス発生回路と、このタイミング
パルス発生回路のタイミングパルスによつて検出
された前記の検出結果をカウントして、全電流積
算値を表示する計数回路とを具備するところにあ
る。 The present invention has been made in view of the above-mentioned difficulties, and its purpose is to provide a current integrator that can integrate a plurality of current values and immediately know the total value. A plurality of input sections are provided to handle this, a shunt circuit that shunts the current input to each of these input parts, and a shunt circuit that divides each current shunted by the shunt circuit at a fixed time interval. an integrating circuit that detects the presence or absence of an integrated value or whether or not the integrated value is greater than or equal to a reference integrated value; a memory circuit that stores each of the detection results; and a timing pulse is input to each of the memory circuits to perform the a timing pulse generation circuit that detects when an integrated value is present or when the integrated value exceeds a reference integrated value and erases the stored result; and the detection result detected by the timing pulse of this timing pulse generating circuit. and a counting circuit that counts the total current and displays the total current integrated value.
以下本発明の好適な実施例を添付図面を参照し
て詳細に説明する。 Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.
図は4ライン連続めつき装置等に用いる電流積
算計の例を示してある。10a,10b,10
c,10dは入力部で各めつきラインに対応して
4チヤンネルに設けてある。各入力部10a,1
0b,10c,10dには分流回路12a,12
b,12c,12dがそれぞれ接続され、またこ
の各分流回路にはそれぞれ積分回路14a,14
b,14c,14dが接続されている。各入力部
10に入力した電流が分流回路12によつて分流
され、この分流された電流が積分回路14に入力
される。積分回路14では分流電流が一定時間、
例えば60msec間毎に区切つて積分される。そし
てこの一定時間毎の積分値が各々基準積分値以上
か否かによつて、基準積分値以上であれば1の信
号に、基準積分以下であれば0の信号に変換さ
れ、この信号が記憶回路16a,16b,16
c,16dで記憶される。18はタイミングパル
ス発生回路で、微少な時間間隔で連続してパルス
を発生し、このパルス信号が前記の記憶回路16
に1チヤンネルから順に入力される。そしてこの
タイミングパルスによつて、記憶回路16に記憶
されている信号のうち1の信号のみが検出され、
この検出信号が計数回路20に入力されてカウン
トアツプされる。前記タイミングパルスの走査が
終了した記憶回路16の記憶は消去され、新たに
リセツトされていく。このタイミングパルスによ
る走査が順次連続的に行われることによつて計数
回路20にカウント数×基準積分値として全電流
積算値が表示されるものである。以上は4チヤン
ネルを用いた場合を例示したが適宜複数チヤンネ
ルに構成できることは言うまでもない。 The figure shows an example of a current integrator used in a 4-line continuous plating device or the like. 10a, 10b, 10
Reference characters c and 10d are input sections, which are provided in four channels corresponding to each plating line. Each input section 10a, 1
0b, 10c, 10d have shunt circuits 12a, 12
b, 12c, and 12d are respectively connected, and each of these shunt circuits is connected to an integrating circuit 14a, 14, respectively.
b, 14c, and 14d are connected. The current input to each input section 10 is shunted by the shunt circuit 12, and this shunted current is input to the integration circuit 14. In the integrating circuit 14, the shunt current flows for a certain period of time,
For example, it is divided and integrated every 60 msec. Depending on whether the integral value at each fixed time is greater than or equal to the reference integral value, it is converted into a signal of 1 if it is greater than or equal to the reference integral value, and a signal of 0 if it is less than the reference integral value, and this signal is stored. Circuits 16a, 16b, 16
c, 16d. 18 is a timing pulse generation circuit that continuously generates pulses at minute time intervals, and this pulse signal is sent to the memory circuit 16 mentioned above.
are input sequentially starting from channel 1. According to this timing pulse, only one signal among the signals stored in the memory circuit 16 is detected,
This detection signal is input to the counting circuit 20 and counted up. The memory of the memory circuit 16 after the scanning of the timing pulse is erased, and the memory is newly reset. By sequentially and continuously performing scanning using this timing pulse, the total current integrated value is displayed on the counting circuit 20 as the count multiplied by the reference integrated value. Although the above example uses four channels, it goes without saying that a plurality of channels can be used as appropriate.
前記の積分回路14での1か0の信号に変換さ
れる積分値の基準値は、例えば複数ラインのめつ
き装置に用いるものであれば、各ラインの電流値
のうち最低の電流値に係る実測積分値を採用する
ことによつて、洩れなく全電流積算値の概略を知
ることができる。あるいは各ラインの基準積分値
をそれぞれ各ラインの実測積分値に応じて別個に
設定して、計数回路20では総カウント数×実測
積分値の平均値として表示することによつて一層
正確に全電流積算値を表示しうる。 For example, in the case of a multi-line plating device, the reference value of the integral value converted into a 1 or 0 signal by the integrating circuit 14 is based on the lowest current value among the current values of each line. By employing the actually measured integral value, it is possible to know the outline of the total current integral value without omission. Alternatively, the reference integral value of each line can be set separately according to the actually measured integral value of each line, and the counting circuit 20 can display the total number of counts x the average value of the actually measured integral value to more accurately calculate the total current. The integrated value can be displayed.
さらには、各ラインにおいては基準積分値が実
測しうるのであるから、積分回路14においては
一定時間間隔毎に電流が流れたか否かを、流れた
場合には1の信号を、全く流れていない場合には
0の信号として出力し、前記のごとく1の信号の
みをカウントアツプし、このカウント数×実測積
分値の平均値として全電流積分値を得ることがで
きる。 Furthermore, since the reference integral value can be actually measured for each line, the integrating circuit 14 determines whether or not current has flowed at regular time intervals, and if it has flowed, a signal of 1 is output, or if no current has flowed at all. In this case, it is possible to output a 0 signal, count up only a 1 signal as described above, and obtain the total current integral value as the average value of this count multiplied by the actually measured integral value.
以上のように本発明に係る電流積算計によれ
ば、複数ラインの電流値の総積算値を直ちに知る
ことができ、複数ラインの連続めつきが組まれて
いるめつき液の管理に用いて特に好適であり、ま
た簡易な構成であるから安価に提供しうるという
著効を奏する。 As described above, according to the current integrator according to the present invention, the total integrated value of the current values of multiple lines can be immediately known, and it can be used to manage plating solutions in which continuous plating is performed on multiple lines. It is particularly suitable and has a simple configuration, so it has the remarkable effect of being able to be provided at low cost.
以上本発明につき好適な実施例を挙げて種々説
明したが、本発明はこの実施例に限定されるもの
ではなく、発明の精神を逸脱しない範囲内で多く
の改変を施し得るのはもちろんのことである。 Although the present invention has been variously explained above with reference to preferred embodiments, the present invention is not limited to these embodiments, and it goes without saying that many modifications can be made without departing from the spirit of the invention. It is.
第1図は入力部が4つの場合の電流積算計を示
すブロツク線図である。
10a,10b,10c,10d……入力部、
12a,12b,12c,12d……分流回路、
14a,14b,14c,14d……積分回路、
16a,16b,16c,16d……積分回路、
18……タイミングパルス発生回路、20……計
数回路。
FIG. 1 is a block diagram showing a current integrator with four input sections. 10a, 10b, 10c, 10d...input section,
12a, 12b, 12c, 12d... shunt circuit,
14a, 14b, 14c, 14d...integrator circuit,
16a, 16b, 16c, 16d...integrator circuit,
18...timing pulse generation circuit, 20... counting circuit.
Claims (1)
入力部と、 この各入力部に入力された電流をそれぞれ分流
する分流回路と、 この分流回路によつて分流された各電流の一定
時間毎の積算値の有無もしくは該積算値が基準積
算値以上が否かを検出する積分回路と、 前記の検出結果をそれぞれ記憶する記憶回路
と、 前記の各記憶回路にタイミングパルスを入力し
て、前記の積算値を有する場合もしくは積算値が
基準積算値を超えている場合を検出すると共に記
憶結果を消去するタイミングパルス発生回路と、 このタイミングパルス発生回路のタイミングパ
ルスによつて検出された前記の検出結果をカウン
トして、全電流積算値を表示する計数回路と を具備することを特徴とする電流積算計。[Claims] 1. A plurality of input sections provided to be able to handle a plurality of currents, a shunt circuit that shunts the current input to each input section, and a shunt circuit that shunts the current input to each of the input parts. an integrating circuit that detects the presence or absence of an integrated value of each current for a certain period of time or whether or not the integrated value is greater than or equal to a reference integrated value; a memory circuit that stores each of the detection results; and a timing pulse for each of the memory circuits. a timing pulse generating circuit that detects when the integrated value is input and the integrated value exceeds the reference integrated value, and erases the stored result; and the timing pulse of this timing pulse generating circuit. A current integrator comprising: a counting circuit that counts the detected detection results and displays a total current integrated value.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59031837A JPS60177272A (en) | 1984-02-22 | 1984-02-22 | Current integrating indicator |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59031837A JPS60177272A (en) | 1984-02-22 | 1984-02-22 | Current integrating indicator |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS60177272A JPS60177272A (en) | 1985-09-11 |
JPH0568661B2 true JPH0568661B2 (en) | 1993-09-29 |
Family
ID=12342169
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP59031837A Granted JPS60177272A (en) | 1984-02-22 | 1984-02-22 | Current integrating indicator |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60177272A (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2614622B2 (en) * | 1987-11-18 | 1997-05-28 | 三田工業株式会社 | Toner supply device |
CN114460360B (en) * | 2022-04-12 | 2022-07-01 | 江西西平计量检测有限公司 | Detection method, system and device based on ammeter measurement current time integral |
-
1984
- 1984-02-22 JP JP59031837A patent/JPS60177272A/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS60177272A (en) | 1985-09-11 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPH0568661B2 (en) | ||
US4577188A (en) | Level display device for audio signal | |
JPH0676079A (en) | Trend data display device and top-down display method for the data | |
SU1177902A1 (en) | Device for monitoring pulse sequences | |
SU1238224A1 (en) | Device for duration selection of television signal pulses | |
SU843276A1 (en) | Start-stop text distorting device | |
JPH05145415A (en) | Method and device for detecting aliasing | |
SU1008782A1 (en) | Device for reproducing data on gas-discharge indicator board | |
JPS6083779A (en) | Display device for welding condition of welding machine | |
JPH05119065A (en) | Waveform observation device | |
SU1626178A1 (en) | Multi channel digital small period deviation meter | |
SU1478376A1 (en) | Synchronizer | |
JPH05322943A (en) | Frequency measuring apparatus | |
JPH07248340A (en) | Level detecting circuit | |
SU676976A1 (en) | Parameter monitoring device | |
SU1045115A1 (en) | Ultrasonic speed meter | |
JPH01267470A (en) | Width measuring circuit | |
JPS584312A (en) | Electrospark machining apparatus | |
EP0070602A1 (en) | Multi-channel oscilloscope comprising a liquid crystal display screen | |
DE2453068B2 (en) | DURATION ANALYZER | |
JPH06331658A (en) | Digital oscilloscope | |
JPH03130563U (en) | ||
JPS58143274A (en) | Waveform display | |
JPS6440026U (en) | ||
Nielsen | Computer Controlled Pulse Counting Photometry |