JPH0562996A - Manufacture of thin film transistor - Google Patents

Abstract

PURPOSE:To enable a source ohmic layer and a drain ohmic layer to be easily formed so as not to overlap a gate electrode by a method wherein an electron cyclotron resonance plasma CVD method and a lift-off method are employed. CONSTITUTION:A gate electrode 12 is formed on an insulating board 11, and then a gate insulating film 13, a semiconductor film 14, and a surface protective 15 are successively laminated. Thereafter, a resist film 16 is formed on the upside of the surface protective film 15, and the surface protective film 15 is etched into a pattern using the resist film 16 as a mask. Then, an N<+>-a-Si semiconductor film 17 is formed on the semiconductor film 14 and the resist film 16 at a room temperature through an electron cyclotron resonance plasma CVD method. Furthermore, the board 11 is dipped into solvent such as acetone or the like to remove the resist film 16 and the semiconductor film 17 together by dissolution. By this setup, a source ohmic layer and a drain ohmic layer are formed of the semiconductor film 17 so as not to overlap the gate electrode 12.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improved method of manufacturing a thin film transistor.

[0002]

2. Description of the Related Art In recent years, thin film transistors (TFTs) are
Flat panel display, image sensor, image
It is widely used as a switching element such as a jig.

For example, an active matrix display element is known in which thin film transistors are formed in a matrix on a glass substrate and the voltage applied to a liquid crystal cell is controlled by the thin film transistors. A typical method of manufacturing an inverted staggered thin film transistor in this case will be described below with reference to the process chart shown in FIG.

That is, a glass substrate (hereinafter referred to as a substrate)
After forming the gate electrode 2 on 1 by patterning (a)
A gate insulating film 3, a semiconductor film 4 and a surface protective film 5 are continuously deposited on the substrate 1 and the gate electrode 2 by the plasma CVD method (b). Next, the surface protection film 5 is applied to the gate electrode 2
Pattern so that it is left only on the top of the (c). After that, n + -a is formed as an ohmic layer for the source and drain.
A semiconductor film 6 made of -Si is deposited and patterned so as to overlap the surface protection film 5. Further, the source electrode 7 and the drain electrode 8 are formed on the upper surface of the semiconductor film 6 (d).

However, the above-mentioned manufacturing method has a problem that the drain voltage is lowered because the parasitic capacitance and the channel capacitance are increased due to the overlap between the gate electrode 2 and the semiconductor film 6.

In order to solve this problem, the semiconductor film 6 which is an ohmic layer of the source and the drain is patterned by using the lift-off method to obtain the gate electrode 2 and the semiconductor film 6.
There has been proposed a method for manufacturing a thin film transistor that reduces the overlap of the above (Japanese Patent Laid-Open No. 63-15470).

In this method of manufacturing a thin film transistor, a patterned gate electrode, a first insulating film, a first amorphous silicon semiconductor film, a second insulating film and a first resist film are sequentially formed on the upper surface of a glass substrate. In the deposited state, the first resist film is exposed from the lower surface side of the glass substrate to leave the first resist film only above the gate electrode, and in this state, the second insulating film is etched.

After that, after removing the first resist film above the gate electrode, a second amorphous silicon film and a second resist film are sequentially deposited, and the second resist is applied from the lower surface side of the glass substrate. The film is exposed to leave the second resist film only above the gate electrode, and in this state, a metal film is deposited on the upper surfaces of the second resist film and the second amorphous silicon film.

Then, the second resist film is dissolved and removed to remove the metal film above the gate electrode, and then the remaining amorphous metal film is used as a mask to form a second amorphous silicon film above the gate electrode. Is removed by etching to form a source electrode and a drain electrode.

As a result, the gate electrode and the second amorphous silicon film, which is the ohmic layer of the source and drain, do not overlap with each other, and the parasitic capacitance and the channel portion between them do not occur. The capacity of can be reduced.

[0011]

However, in the latter method of manufacturing a thin film transistor described above, the step of exposing from the lower surface side of the glass substrate is required twice, and when the amorphous silicon film is formed thickly, the lower surface side is exposed from the lower surface side. There is a problem that the exposure time becomes very long and the production efficiency deteriorates.

In view of the above problems, an object of the present invention is to provide a method of manufacturing a thin film transistor capable of forming ohmic layers of a source and a drain which do not overlap the gate electrode by a simple process. To provide.

[0013]

In order to achieve the above-mentioned object, the present invention provides a patterned gate on a translucent insulating substrate.
A first insulating film, a first semiconductor film, a second insulating film, and a first resist film, which are sequentially deposited and deposited, and then from the lower surface side of the translucent insulating substrate. The first resist film is exposed to light to leave the first resist film only above the gate electrode, and the second insulating film is removed by etching using the first resist film as a mask. Then, a second layer is formed on the upper surfaces of the first semiconductor film and the first resist film by electron cyclotron resonance plasma CVD.
After the first semiconductor film is deposited, the first resist film is dissolved and removed to remove the second semiconductor film above the gate electrode, thereby forming the source and drain ohmic layers. A method for manufacturing a thin film transistor to be formed is proposed.

[0014]

According to the present invention, the patterned gate electrode is formed on the translucent insulating substrate, and the first insulating film,
The first semiconductor film, the second insulating film, and the first resist film are sequentially deposited and deposited. Then, the first resist film is exposed from the lower surface side of the transparent insulating substrate to expose the gate.
The first resist film is left only above the gate electrode.
Then, using the first resist film as a mask, the second
The insulating film is removed by etching, and in this state, the second semiconductor film is deposited on the upper surfaces of the first semiconductor film and the first resist film by the electron cyclotron resonance plasma CVD method. After that, the first resist film is dissolved and removed. At this time, the second semiconductor film above the gate electrode is also removed, and source and drain ohmic layers that do not overlap are formed on the gate electrode.

[0015]

Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a sectional view showing a main part of a thin film transistor in a manufacturing process of a thin film transistor according to an embodiment of the present invention.

For example, after depositing a metal electrode such as chromium (Cr), tantalum (Ta) or molybdenum (Mo) on a transparent insulating substrate (hereinafter referred to as substrate) 11 made of glass or the like, a pattern is formed. To form the gate electrode 12 (a). Then, the gate insulating film 13 made of silicon nitride (SiN _x ) and i-a-S are formed by the plasma CVD method.
The semiconductor film 14 made of i and the surface protection film 15 made of silicon nitride are sequentially and continuously deposited (b). The continuous deposition of these means that the semiconductor film 14 and the gate insulating film 1
3. It is necessary to prevent the formation of unnecessary interface states at the interface with the surface protective film 15 and obtain good transistor characteristics.

After that, a positive type resist is spin-coated on the upper surface of the surface protective film 15 and exposed from the lower surface side of the substrate 11, so that the pattern is self-aligned with the gate electrode 12.
A resist film 16 which has been turned into a resist is formed (c).

Next, the surface protection film 15 is etched and patterned using the resist film 16 remaining only above the gate electrode 12 as a mask (d). After that, n + -a-S is formed on the upper surfaces of the semiconductor film 14 and the resist film 16 at room temperature by an electron cyclotron resonance (ECR) plasma CVD method.
A semiconductor film 17 made of i is deposited (e). In the ECR plasma CVD method, the directivity of the deposited film is so strong that the semiconductor film 17 does not adhere to the side wall of the resist film 16. Further, even when the semiconductor film 17 is deposited with the substrate 11 at room temperature, the semiconductor film 17 having high quality, that is, a small specific resistance is obtained.
Can be formed.

Further, the substrate 11 formed as described above is dipped in a solvent such as acetone to dissolve and remove the resist film 16. At this time, the semiconductor film 1 above the gate electrode 12
7, that is, the semiconductor film 17 on the upper surface of the resist film 16 is also removed (f). As a result, the source and drain ohmic layers that do not overlap the gate electrode 12 are formed by the semiconductor film 17. When the resist film 16 is peeled off, since the semiconductor film 17 is deposited at room temperature as described above, the resist film 16 is not deteriorated.
The resist film 16 can be easily peeled off, and the yield can be increased.

Next, after patterning the semiconductor films 14 and 17 into a predetermined shape, an insulating film 18 made of silicon nitride or the like is deposited thereon by plasma CVD. Further, contact holes 19 and 20 are formed in the insulating film 18. These contact holes 19 and 20 correspond to the upper portions of the semiconductor films 17 serving as the source and drain ohmic layers, respectively, and are formed at a predetermined distance from the gate electrode 12 (g). After this, aluminum (A
A metal film made of 1) or the like is deposited to form the source electrode 21 and the drain electrode 22 (h). At this time, the source electrode 21 and the drain electrode 22 are respectively connected to the gate electrode 1.
It is formed so as not to overlap with 2.

As described above, according to this embodiment, the source and drain ohmic layers which do not overlap the gate electrode can be formed by a simple process, and the parasitic layers between them can be formed. The capacity and the capacity of the channel portion can be reduced. As a result, the drain voltage can be prevented from decreasing and the characteristics of the thin film transistor can be improved. Furthermore, the exposure from the lower surface side of the substrate 11 is 1
The number of times is sufficient, and the lift-off of the resist film 16 can be easily performed, so that the production efficiency can be improved.

In this embodiment, ECR plasma CVD is used.
N + on the semiconductor film 17 (ohmic layer) formed by the
Although -a-Si is used, the same effect can be obtained by using n-type microcrystalline silicon.

[0024]

As described above, according to the present invention, by using the electron cyclotron resonance (ECR) plasma CVD method and the lift-off method, the source and drain gates which do not overlap with the gate electrode can be formed. The Mick layer can be easily formed. As a result, the drain voltage can be prevented from decreasing and the characteristics of the thin film transistor can be improved. Furthermore, since the exposure from the lower surface side of the translucent insulating substrate only needs to be performed once, the excellent effect that the production efficiency can be improved is exhibited.

[Brief description of drawings]

FIG. 1 is a process diagram showing a method of manufacturing a thin film transistor of the present invention.

FIG. 2 is a process chart showing an example of a conventional method of manufacturing a thin film transistor.

[Explanation of symbols] 11 ... Substrate, 12 ... Gate electrode, 13 ... Gate insulating film,
14, 17 ... Semiconductor film, 15 ... Surface protective film, 16 ... Resist film, 18 ... Insulating film, 19, 20 ... Contact hole, 2
1 ... Source electrode, 22 ... Drain electrode.

Claims (1)

[Claims] 1. A patterned gate on a translucent insulating substrate.
A first insulating film, a first semiconductor film, a second insulating film, and a first resist film, which are sequentially deposited and deposited, and then from the lower surface side of the translucent insulating substrate. The first resist film is exposed to light to leave the first resist film only above the gate electrode, and the second insulating film is removed by etching using the first resist film as a mask. After depositing a second semiconductor film on the upper surfaces of the first semiconductor film and the first resist film by electron cyclotron resonance plasma CVD method, the first resist film is dissolved and removed to remove the gate. A method for manufacturing a thin film transistor, comprising forming the source and drain ohmic layers by removing the second semiconductor film above the electrodes.