JPH0562186U - Power control circuit - Google Patents

Abstract

(57) [Abstract] [Purpose] The generation of radio noise is suppressed by matching the rising edge of the pulse signal for controlling the power control means for switching the AC signal at the zero cross point with the zero cross point of the AC signal. [Configuration] zero-cross timing circuit 2 rises before and after the zero cross point of the AC signal from the power supply 1, and outputs a falling pulse signal P _n, the arithmetic circuit 3 has a width T _n and time of the pulse signal P _n T _n / 2 Calculate Delay circuit 4
Outputs the zero-cross pulse signal P ′ after delaying the time T _n / 2 from the rising edge of the pulse signal P _{n + 1} .

Description

[Detailed description of the device]

[0001]

[Industrial applications]

 The present invention relates to a power control circuit that controls electric energy in synchronization with an AC power supply, and particularly to a circuit that generates a zero-cross timing signal in synchronization with an AC zero-cross point.

[0002]

[Prior Art]

 Conventionally, in a power control circuit for switching an AC power supply with a semiconductor element such as a triac, the timing for energizing the triac is adjusted to the zero cross point where the AC signal crosses 0V. This is to prevent the generation of radio noise by making the voltage value at the timing of starting energization as low as possible.

The zero-cross timing signal generator 2 supplies the zero-cross timing, and as shown in FIG. 3, a full-wave rectifying circuit 5 for full-wave rectifying the AC signal from the AC power source 1 and a full-wave rectifying circuit. The resistors R1 and R2 for dividing the output voltage after rectification and the collector are connected to the direct current power supply VCC, and when the divided voltage divided by the resistors R1 and R2 becomes V ₁ or more as shown in FIG. And a transistor Q1.

In such a circuit, when the divided voltage becomes V ₁ or less, that is, when the AC signal approaches 0 V, the transistor Q1 is turned off, and the point B on the collector side of the transistor Q1 is connected to the DC power source VCC. The voltage appears as a zero-cross pulse signal P. When the divided voltage becomes V ₁ or more, the transistor Q1 is turned on and the point B becomes 0V.

As described above, the conventional zero-cross timing generation circuit 2 obtains the zero-cross pulse signal P by full-wave rectifying the alternating current and switching the transistor Q1 by the signal, and when the input signal approaches 0V, the transistor When Q1 is turned off, a zero-cross pulse signal P centering on the zero-cross point is output, and based on this zero-cross pulse signal P, a triac (not shown) is driven to switch the AC signal at the zero-cross point.

[0006]

[Problems to be solved by the device]

 However, in the power control circuit using the conventional zero-cross timing control circuit, since the zero-cross energization control is realized by using the rising timing of the pulse signal P, the fluctuation of the voltage of the AC power supply causes the change as shown in the figure. Moreover, if the width of the pulse signal P at point B changes, the energization start position of the triac also shifts. For this reason, even if the zero-cross energization control is performed at either the rising edge or the falling edge of the pulse signal, pulse-shaped signals a and b that cause radio noise are generated.

Therefore, an object of the present invention is to always supply the zero-cross pulse signal P to the triac synchronized with the zero-cross point of the AC signal even if the power supply voltage changes.

[0008]

[Means for Solving the Problems]

In order to solve such a problem, the present invention provides a zero-cross timing signal generating circuit that outputs a pulse signal P in synchronization with a zero-cross point of an AC signal, and an AC signal driven by the pulse signal P to turn on / off the AC signal at the zero-cross point. In a power control circuit for controlling power, which has a switching means for controlling, an arithmetic circuit for calculating a time T / 2 corresponding to half the width T of one pulse signal P _n , and a pulse signal P _n And a delay circuit that controls switching of the switching means with a delay of time T / 2 from the rising edge of the pulse signal P _{n + 1 that} appears next.

[0009]

[Action]

According to the present invention, the zero-cross pulse signal P ′ is output after a delay of the rising of the next pulse signal P _{n + 1} for a time T / 2 corresponding to half the width T of the previous pulse signal P _n , and switching is performed. The means is turned on and off in synchronization with the zero cross point of the AC signal.

[0010]

【Example】

 An embodiment according to the present invention will be described with reference to FIGS.

As shown in FIG. 1, the zero-cross timing signal generating circuit 10 of the present embodiment performs full-wave rectification of alternating current as in the prior art, and the waveform after full-wave rectification becomes a predetermined voltage value V ₁ or less. The zero-cross timing circuit 2 that outputs the pulse signal P while the pulse signal P is being measured, and the calculation circuit 3 that measures the pulse width T of the pulse signal P and calculates the time (T / 2) that is half the pulse width T. Based on the pulse signal P and a time (T / 2) which is half the pulse width, the delay circuit 4 delays the rising edge of the pulse signal P by (T / 2) and outputs the zero-cross pulse signal P ′.

[0012] Such zero cross timing signal generating circuit 10, as shown in FIG. 2, and starts measuring the width T from the rise of the pulse signal P _0, falling of the pulse signal P ₀ is Ridehaba T Exit measurement, determines the width T ₀ of the pulse signals P _0, stores the delay circuit 4 by calculating T / 2 based on this value.

[0013] Next, the delay circuit 4 detects a rise of the pulse signal P _1, generates a zero-cross pulse signal P ₁ 'with the rise of the pulse signal P ₁ T _0/2 delay. Also, during the fall the arithmetic circuit 3 simultaneously from the rise of the pulse signal P _1, measures the pulse width T ₁ of the pulse signal P ₁ calculates the T _1/2, stores the delay circuit 4.

By repeating this operation thereafter, it is possible to obtain a zero-cross pulse P ′ synchronized with the zero-cross point of the AC waveform having the rising input, and based on this zero-cross pulse P ′, a triac or the like (not shown) can be obtained. By switching, zero-cross control with less noise components can be performed.

[0015]

[Effect of the device]

As described above, according to the present invention, the time (T _0/2 ) that is half the pulse width T ₀ of the pulse signal P ₀ generated before and after the zero cross point of the AC waveform to be controlled is obtained, and then from the rise of the pulse signal P ₁ appearing (T _0/2) by generating a zero cross pulse P ₁ with a delay, even if the power supply voltage fluctuates, the start of energization of the triac such that switching the AC signal of the controlled object Since the timing can be accurately adjusted to the zero-cross point of the AC signal to be controlled, the generation of radio noise during switching operation can be suppressed.

[Brief description of drawings]

FIG. 1 is a circuit block diagram of an embodiment according to the present invention.

FIG. 2 is a timing chart of an embodiment according to the present invention.

FIG. 3 is a circuit block diagram of a conventional technique.

FIG. 4 is a timing chart of a conventional technique.

[Explanation of symbols]

 2 Zero cross timing circuit 3 Arithmetic circuit 4 Delay circuit

Claims (1)

[Scope of utility model registration request] 1. A zero-cross timing signal generation circuit that outputs a pulse signal P in synchronization with a zero-cross point of an AC signal, and a switching means that is driven by the pulse signal P and that controls ON / OFF of the AC signal at the zero-cross point. A power control circuit for controlling power, comprising: an arithmetic circuit for calculating a time T / 2 corresponding to half the width T of one of the pulse signals P _n ; and a pulse signal appearing next to the pulse signal P _n. A power control circuit comprising: a delay circuit that controls switching of the switching means with a delay of the time T / 2 from the rising edge of P _{n + 1} .