JPH0557824B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a power supply device known as a switching regulator.

[Background technology]

An example of a switching regulator is shown in "Electronic Technology" (February 1, 1985, Vol. 27, No. 2, published by Nikkan Kogyo Shimbun, p. 300).

A power MOS transistor capable of high-speed operation is used to drive the switching regulator at high speed, and its threshold level is generally set to a high level of about 2V to 7V.

On the other hand, the above power at low power supply voltage input
The threshold level to prevent MOS transistor malfunction is set at around 2.6 to 2.7V. Therefore, the malfunction prevention function works when the input voltage exceeds 2.7V, but this
There is no point in setting the threshold level of a MOS transistor to 7V.

In order to solve the above problem, it is conceivable to provide a high threshold level malfunction prevention circuit between the pair of power supplies. However, studies by the present inventors have revealed problems such as non-negligible power consumption of the malfunction prevention circuit after the power supply voltage as the input voltage reaches the malfunction prevention level or higher.

The present invention has been proposed to solve the above problems.

[Purpose of the invention]

An object of the present invention is to provide a power supply device that can arbitrarily set a threshold level with low power consumption and reduce malfunctions of power MOS transistors.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Summary of the invention]

A brief summary of the invention disclosed in this application is as follows.

In other words, a reference voltage is set between a pair of power supplies,
A malfunction circuit is provided between the power supply example and the ground side around this reference voltage, and as the input voltage increases, the second malfunction prevention circuit is disabled while the first malfunction prevention circuit is operating. Action and non-action, 2nd
When the first malfunction prevention circuit starts operating, the first malfunction prevention circuit is deactivated, thereby achieving the object of the present invention of obtaining a power supply device that prevents malfunction with low power consumption. be.

〔Example〕

Hereinafter, one embodiment of a power supply device to which the present invention is applied will be described with reference to FIG. Note that FIG. 1 shows a circuit diagram of a power supply device implemented as a semiconductor integrated circuit.

The feature of this embodiment is that the level of input voltage _Vcc2 is detected in two stages to reduce malfunction of the power MOSFET.

Commercial AC power is supplied to terminals T ₁ and T ₂ shown in FIG. S ₁ is a power switch, and when it is switched to the on state as shown,
The commercial power source is supplied to a rectifier circuit 1 configured with a diode bridge.

2 is a smoothing circuit, which includes a coil L ₁ and a capacitor.
_C1 to obtain a direct current power supply voltage Vcc. Resistor R ₁ is the power supply voltage stepped down to control circuit 3.
_The capacitor _C2 is used to stabilize the power supply voltage _Vcc2 .

By the way, all the current consumption of control circuit 3 is
If it is supplied through _R1 , the amount of heat generated by the resistor _R1 will be large, and the voltage of the resistor _R1 must be increased. This means that the resistor R ₁ becomes large, which is not desirable in terms of implementation. It also contributes to high costs and should be avoided at all costs.

Therefore, in this embodiment, the following measures are taken.

That is, in the main transformer 4 of the switching regulator, L ₁₁ is the primary coil, L ₁₂ , L ₁₃
are the secondary coils, respectively. Primary coil
The current of _L11 is controlled intermittently by a control circuit 3 and an output circuit 5, which will be described later, and a secondary voltage is applied to the secondary coils _L12 and _L13 in response to the intermittence of the power supply ₁ . e ₁ and e ₂ are respectively induced. Above 2
The secondary voltage e ₂ is the output voltage V ₀ of this power supply, but the secondary voltage e ₁ is used to reduce the current flowing through the resistor R ₁ , and the problem with the power of the resistor R ₁ is This is to solve the problem.

The voltage level of the secondary voltage e ₁ is the voltage level of the primary coil L ₁₁
It is set to a desired value depending on the turns ratio between _L12 and the secondary coil L12. When the secondary voltage e ₁ is induced, the output voltage rectified by the diode D ₁ is smoothed by the capacitor C ₂ and converted into DC.

The output voltage based on the output of the above secondary coil _L12 is:
It is supplied to the control circuit 3 and the output circuit 5 as a power supply Vcc ₂ . Therefore, the current flowing through the resistor _R1 is:
The voltage can be reduced by the amount obtained by the secondary voltage _e1 , and the above problem can be solved.

A phototransistor is installed at the 1st and 2nd terminals.
Q ₁ is connected. Phototransistor _Q1 has
Light is supplied from a light emitting diode D ₄ receiving an output voltage V ₀ . Therefore, phototransistor Q ₁
In this case, changes in the voltage level of the output voltage V ₀ are optically detected. This optical detection and the magnetic coupling of the main transformer 4 separate the primary and secondary sides of the power supply.

When a voltage is generated across phototransistor _Q1 ,
A reference voltage V ₁ is generated from the low input detection circuit 11 .
At the same time, voltage V ₂ generated as a voltage drop across resistor R ₂ is supplied to PWM comparator 12 . PWM comparator (Puls Width
Modulation) is described in detail in ``Pulse and Digital Circuits'' (February 20, 1970, published by Ohmsha Co., Ltd., pp. 177-180), but basically it is a sawtooth wave signal and a standard. A pulse signal having a time width corresponding to the time when the sawtooth wave signal is at a high level is generated.

In this embodiment, the voltage _V2 is used as the reference signal, and the sawtooth signal is supplied from a sawtooth signal generation circuit (not shown).

The sawtooth wave signal generation circuit generates a sawtooth wave signal having a predetermined peak value and time width.

The PWM comparator 12 compares the sawtooth wave signal with the voltage _V2 , and generates a pulse signal with a pulse width corresponding to the time width while the sawtooth wave signal is at a high level with respect to the voltage _V2 . Occur. Voltage
Since the level of V ₂ changes in response to a change in the level of the output voltage V ₀ of the power supply through the aforementioned optical detection, the width of the resulting pulse signal will also change accordingly. Note that the PWM comparator 12 is connected to Dead Band/
A Soft Start signal is provided, which allows the PWM
The driving of the comparator 12 is controlled.

Next, low input malfunction prevention circuits (hereinafter referred to as odor prevention circuits) 22 and 23 and constant voltage circuit 21
The circuit operation of the control circuit 3 including the following will be explained.

The constant voltage circuit 21 receives the power supply voltage Vcc ₂ and sets it to a voltage value of 5V, which is approximately equal to the threshold level of the power MOS transistor Q ₃₃ to form a reference voltage Vrefa.
This is to form a bias voltage Vref ₂ for causing a constant current to flow. The prevention circuit 22 prevents malfunction when the input voltage power supply Vcc ₂ rises to 5V or more, and the prevention circuit 23 prevents the power supply Vcc ₂ from rising to 5V or more.
This prevents malfunctions until the voltage rises above 5V.

First, the circuit operation until the power supply Vcc ₂ gradually rises from 0V will be described.

When the power supply Vcc ₂ rises above 0.7V, transistor Q ₇₆ turns on and current a flows.
Transistors Q ₇₅ to _{Q 77} constitute a current mirror circuit, so output currents b and c are obtained, and current b is passed through resistor R ₇₈ to transistor
It is supplied to the base of Q ₇₄ and further supplied to the base of transistor Q ₇₁ via resistor ₇₂ . Transistors Q ₇₁ and Q ₇₂ operate as a latch circuit. Transistor _Q71 operates in the on state and lowers the voltage Va. The conditions for Q ₇₂ to turn on are resistors R ₇₄ ,
Determined by the ratio of R ₇₆ and resistance R ₇₅ . And until the voltage Va becomes at least about 5V,
The above latching action is maintained.

On the other hand, although current c is supplied to the collector of transistor Q ₇₃ , such transistor Q ₇₃
is off because no base current is supplied.
During this period, although the power supply Vcc ₂ gradually rises, Vrefa remains at a lower level than the voltage level of Vcc ₂ , so the transistor Q ₈₂ is supplied with a bias voltage to its base and emitter, and is turned on.

Current c is then supplied to the base of transistor Q ₁₀₀ via resistor R ₁₀₀ . As a result, transistor Q ₁₀₀ is turned on. As a result, the middle point of the drive circuit 8, that is, the output terminal (7
terminal) is grounded, and even if noise or the like occurs in the previous stage, the output current will not reach the output circuit 5.
This means that it is possible to prevent malfunctions.

When the power supply voltage Vcc ₂ rises to 5V or more, the constant voltage generation circuit 21 outputs the transistor
Bias voltage Vref ₂ at a level that causes collector current to flow through Q ₆₈ and Q ₆₉ is now output. In this case, transistor Q ₆₄ of prevention circuit 22 is turned on prior to Q ₆₃ . This is a transistor
This is due to the fact that the rise of the bias voltage applied between the base and emitter of _Q63 is delayed due to the operation of the constant voltage circuit 21. The bias voltage applied between the base and emitter of transistor _Q64 is the bleeder resistor.
Since it is obtained by R ₈₆ and R ₈₁ , the response to Vcc ₂ is fast.

Transistor Q ₆₄ turns on to turn on the transistor
_Q65 turns on and its collector voltage, i.e. the base voltage of transistor _Q64 , decreases. Then, the base voltage is lowered further by the voltage division between the resistors R ₈₆ , R ₈₁ and R ₈₂ .

Transistor Q ₆₄ turns on to turn on the transistor
Since _Q83 is also turned on, the voltage Vb is also reduced.

On the other hand, the base bias voltage of the transistor Q ₆₃ is the Zener diode in the constant voltage circuit 21.
It is fixed at a constant voltage level by ZD ₂ and transistor Q ₄₁ . The bias voltage of transistor Q ₆₄ is determined by the voltage division of resistors R ₈₆ , R ₈₁ , and R ₈₂ as described above, and thus increases as voltage Vcc ₂ increases. Therefore, when the voltage Vcc ₂ rises to a certain extent, the transistor Q ₆₃ turns on. Transistor Q ₆₁ depending on the turn on of transistor Q ₆₃ ,
Q ₆₂ turns on, and transistors Q ₆₅ , Q ₈₃
are both turned off.

Voltage Vb is then raised by the current from transistor Q ₆₉ when transistor Q ₈₃ is turned off as described above. Transistor Q ₈₁
It is turned on by the rise in voltage Vb, and its collector current turns on transistor _Q73 . This causes the transistor Q ₇₃ to have a current c
You will begin to inhale.

When the level of the voltage Vrefa increases with the rise of the voltage Vcc ₂ , the transistor Q ₇₂ turns on, and accordingly the transistor Q ₇₁ turns off, and the resistors R ₇₄ ,
The current flowing through R ₇₅ to transistor Q ₇₁ is 0
becomes. Here, the constant voltage circuit 21 has an output voltage
If Vrefa is increased by external factors, it has little ability to force such output voltage Vrefa towards circuit ground voltage. Therefore, as mentioned above, when the current flowing through the resistor R74 becomes 0 due to the transistor _Q71 being turned off,
The voltage Vrefa is increasingly increased by the current supplied from Vcc ₂ through the bleeder resistors R ₈₆ and R ₈₁ . As the voltage Vrefa rises, the base and emitter of transistor _Q82 become reverse biased and turn off. Transistor Q ₁₀₀
The on state is canceled by turning off transistor _Q82 . In other words, protection is removed.

When the protection is released in this way, the current flowing from Vcc ₂ to the prevention circuit 22 is
Since the effective resistance in the series path between the prevention circuit 22 and the resistors R ₇₄ and R ₇₆ becomes larger by turning off the transistor Q ₇₁ , its level is reduced.

When the protection is released as described above, the switch circuit 7, drive circuit 8, and output circuit 5 become operational.

Regarding the constant voltage circuit 21, the resistor
R ₃₁ , Zener diode ZD ₁ is transistor Q ₄₂
This is to set the bias voltage of Transistors Q ₄₃ to _{Q 46} constitute a constant current circuit, and stabilize the bias voltage of transistor ₅₂ together with transistors Q ₄₆ to _{Q 49} and the like. Transistors Q ₅₂ and Q ₅₃ are
It operates as a feedback amplifier and stabilizes the reference voltage Vrefa. The feedback signal is supplied to the base of transistor _Q53 by a feedback circuit composed of transistors _Q55 to _Q57 and the like.

Next, circuit operations such as the drive circuit 8 will be explained.

The switch circuit 7 includes transistors Q ₃ , Q ₁₁ ~
_Q13 , which reduces the through current flowing to the next stage drive circuit 8. The switch circuit 7 performs the above operations in response to a pulsed switching signal supplied from the PWM comparator 12 provided at the previous stage.

When the output signal of the PWM comparator 12 is at a high level, the base current is supplied to the transistor Q3, and the transistor _Q3 operates in an on state.
By the way, transistor _Q3 has a small resistance rcst, and when it is on, Vce (sat) is
The voltage is set to be as low as 0.1V. And if we look at the base voltage of transistor _Q13 ,
The voltage level will be Vf (Q12) + Vce (sat) Q ₁₃ .

In this case, transistor Q ₁₃ is off because a voltage level _of 2Vf is required to turn it on. Also, since the collector voltage of transistor _Q3 is about 0.1V,
Transistor Q ₉ does not operate and therefore transistor Q ₈ is also turned off.

Since transistor Q ₁₃ is off, the output current of transistor qQ ₅ that constitutes constant current circuit CS ₁ is
All becomes the base current of transistor _Q6 . Since transistors Q ₆ and Q ₇ are Darlington connected, transistor Q ₇ is driven by the emitter current of transistor Q ₆ , and the output current c ₁ becomes 7.
The signal is supplied to the output circuit 5 via the terminal number.

Here, at the time when the output current o ₁ flows, the transistor Q ₈ is turned off as described above, so the current o ₁ does not flow to the transistor Q ₈ , and a through current is prevented.

When the output signal of the PWM comparator 12 becomes low level, the charge accumulated in the base of the transistor _Q3 is thereby absorbed. Transistor _Q3 is then turned off and its collector voltage increases. Transistor _Q13 will have a voltage of 2Vf or more applied to its base,
It is turned on and the output current of transistor _Q5 flows to GND via transistor _Q11 .

As a result, both transistors Q ₆ and Q ₇ are turned off, and the output current o ₁ is cut off.

On the other hand, when transistor Q ₃ is turned off and its collector voltage increases, transistors Q ₆ , Q ₇
It is turned on and the output current o ₂ is sucked. At this time, the through current is blocked by the following circuit operation.

In other words, transistor _Q13 has a transistor
Since the output current of Q ₄ is flowing, the transistor
While Q ₃ is turned off and a small current flows transiently to the base of transistor Q ₉ , the base voltage of transistor Q ₁₃ is raised to 2Vf or more.

Therefore, before transistors Q ₉ and Q ₈ are completely saturated, transistors Q ₁₃ and Q ₁₁ operate to turn on transistors Q ₆ and Q ₇ . As a result, the current o ₁ is cut off and the transistor
This means that the through current that is about to flow from Q ₇ to Q ₈ is blocked in advance.

As mentioned above, when the current o ₁ is supplied due to the on state of the transistors Q ₆ and Q ₇ , the output circuit 5
Transistor Q ₃₁ in turns on and drives power MOSFET Q ₃₃ . Also, the current o ₁
While the deep suction is performed by
Transistor Q ₃₂ turns on and powers
At the same time as MOSFETQ ₃₃ is turned off, the gate accumulated charge is discharged, speeding up the switching operation.

In the above manner, the current ₁ is controlled,
The above voltages e ₁ and e ₂ are obtained. The circuit operation due to voltage e ₁ has already been described, but when voltage e ₂ is generated, it is rectified by diodes D ₂ and D ₃ , and further smoothed by coil L ₂ and capacitor C ₄ to produce an output voltage. Get V ₀ .

Resistors R ₂₁ and R ₂₂ are bleeder resistors and supply a bias voltage to the constant voltage element connected in series to the light emitting diode D ₄ . The level change of the output voltage V ₀ becomes a change in the amount of light emitted from the light emitting diode D ₄ and is detected as described above, and the output voltage V ₀ is stabilized by the above circuit operations of the control circuit 3 and the output circuit 5. It will be done.

〔effect〕

(1) By detecting a level change at the rise of the power supply voltage and forcibly holding the output terminal of the drive circuit in a grounded state until it rises to a predetermined level, unnecessary operation of the output circuit can be prevented. is obtained.

(2) By setting the above-mentioned predetermined level, it is possible to arbitrarily select the range of unnecessary motion.

(3) By providing a prevention circuit that operates separately when the power supply voltage is at a low level and when it is at a high level, centered on the reference voltage, and by disabling one while the other is in operation, the power consumption can be reduced. This has the effect of reducing power consumption.

(4) Even if a power MOS transistor with a high threshold level is used as a control element, the unnecessary operation range can be set arbitrarily, making high-speed switching possible.

(5) According to (4) above, the output voltage can be controlled with high precision.

Above, the invention made by the present inventor has been specifically explained based on examples, but the present invention is not limited to the above examples, and can be modified in various ways without departing from the gist thereof. Needless to say, it is. For example, the level setting of the constant voltage Vrefa is not limited to 5V, and may be set to an even higher level.

[Application field]

In the above explanation, the invention made by the present inventor is mainly applied to a power supply device, which is the background field of application, but the present invention is not limited thereto. It can also be used for

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of a power supply device to which the present invention is applied. 3... Control circuit, 4... Main transformer, 5... Output circuit, 7... Switch circuit, 8... Drive circuit, 22, 2
3...Malfunction prevention circuit, a, b, c...Current,
Vrefa…Reference voltage, Q ₃ ~ Q ₁₀₀ …Transistor,
Vcc ₂ ...Power supply voltage.

Claims (1)

[Claims] 1. A power supply voltage Vcc ₂ provided between a power supply terminal and a ground potential terminal and supplied to the power supply terminal.
The first connection point (Q ₄₁ collector) is operated by
The first reference voltage is output to the second connection point (Vrefa point) from the emitter side of the first transistor _Q56 of the first conductivity type provided between the power supply terminal and the second connection point (Vrefa point). constant voltage circuit 2 that outputs the second reference voltage Vrefa to be supplied to
1 and the above power supply terminal and the above second connection point (Vrefa point)
first and second bleeder resistors connected in series between
R ₈₆ , R ₈₁ and the voltage at a common connection point between the first bleeder resistor R ₈₆ and the second bleeder resistor R ₈₁ provided between the power supply terminal and the second connection point (Vrefa point) and the second connection point (Vrefa point). 1 reference voltage _{, and a fourth transistor Q 81 of} a second conductivity type _whose base is connected to the second connection point (Vrefa point). When the power supply voltage Vcc ₂ at the power supply terminal rises to a predetermined level or higher by comparing the voltage at the common connection point and the first reference voltage, a high level voltage is supplied to the emitter of the fourth transistor _Q81 . 1 malfunction prevention circuit 22, and a second circuit whose emitter is connected to the power supply terminal side.
A plurality of conductive type transistors Q ₇₅ , Q ₇₆ , Q ₇₇ are provided, and _third and fourth connection points (R ₇₂ , R Current supply circuit that supplies currents b and c to Q ₇₃ common connection point, Q ₇₃ collector) Q ₇₅ , Q ₇₆ ,
Q ₇₇ , R ₃₆ , R ₃₇ , R ₇₁ are provided between the second connection point (Vrefa point) and the ground potential terminal, and their bases are connected to the third connection point (R ₇₂ , R ₇₃ common connection point). ) is connected to a fifth transistor Q ₇₁ of the first conductivity type, and the voltage at the second connection point (Vrefa point) provided between the base of the fifth transistor Q ₇₁ and the ground potential terminal is equal to or higher than a predetermined level. a 66th transistor Q ₇₂ of the first conductivity type which turns off the fifth transistor Q ₇₁ when the voltage is raised to 0.1, the emitter is connected to the ground potential terminal and the base is connected to the collector of the fourth transistor Q ₈₁ ; When the collector is connected to the fourth connection point (Q ₇₃ collector) and turned on, the current supply circuit Q ₇₅ , Q ₇₆ , Q ₇₇ , R ₃₆ , R ₃₇ , R ₇₁ is connected to the fourth connection point (Q ₇₃ collector). ) and a seventh transistor _Q73 of the first conductivity type that causes the current supplied to the circuit to flow to the ground potential point; The power MOS transistor _Q33 to be controlled, the drive circuit 8 which forms a signal for switching and driving the power MOS transistor _Q33 according to the input switching pulse signal, and the emitter connected to the fourth connection point (collector _{of Q73} ). an eighth transistor of a second conductivity type, the base of which is connected to the second connection point (Vrefa point);
_Q82 , and a first conductor whose base receives the collector current of the eighth transistor _Q82 and forces the output voltage of the drive circuit ₈ to the potential of the ground potential terminal in accordance with the collector current of the eighth transistor Q82. A power supply device comprising: a ninth transistor Q ₁₀₀ of the type;