JPH0556289A - High-voltage stabilizing circuit - Google Patents

High-voltage stabilizing circuit

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Publication number
JPH0556289A
JPH0556289A JP21075991A JP21075991A JPH0556289A JP H0556289 A JPH0556289 A JP H0556289A JP 21075991 A JP21075991 A JP 21075991A JP 21075991 A JP21075991 A JP 21075991A JP H0556289 A JPH0556289 A JP H0556289A
Authority
JP
Japan
Prior art keywords
voltage
circuit
output
differential amplifier
sample
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP21075991A
Other languages
Japanese (ja)
Inventor
Yoshio Yoshida
佳夫 吉田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu General Ltd
Original Assignee
Fujitsu General Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu General Ltd filed Critical Fujitsu General Ltd
Priority to JP21075991A priority Critical patent/JPH0556289A/en
Publication of JPH0556289A publication Critical patent/JPH0556289A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To realize the improved high-voltage stabilizing circuit of the dynamic regulation of a stable fast response by making a differential amplifier to output the error voltage to modulate the supply voltage to a flyback transformer into a gain variable type not to give a bad influence to a dynamic range by the set value of a reference voltage for comparison, in the high-voltage generating circuit of a television receiver. CONSTITUTION:A detection voltage B by high voltage HV output bleeder resistances 3 and 4 of a flyback transformer FBT 2 is sample-held, delayed for 1 horizontal scanning period, the difference of the detection voltage B is obtained by a differential amplifier 7 and by a control signal 14 to make the same difference voltage into an absolute value, the gain of a gain variable type differential amplifier 10 is controlled. An error voltage 15 of the output of the differential amplifier 10 is fed back to a voltage modulating circuit 11 of a power voltage Vc, and a supply power 16 of the FBT 2 is controlled.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】テレビ受像機およびテレビモニタ
等映像関連機器の水平偏向回路における高圧回路の安定
化に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to stabilization of a high voltage circuit in a horizontal deflection circuit of video related equipment such as a television receiver and a television monitor.

【0002】[0002]

【従来技術】図5に従来のテレビ受像機における高圧安
定化回路のブロック図を示す。1は水平ドライブHD信号
Aを入力とする水平出力回路、2は受像管CRT アノード
用高圧HVを発生するフライバックトランスFBT、3,4
は高圧HVの変動を検出するブリーダ抵抗、12は同ブリー
ダ抵抗4の検出電圧Bを積分するフィルタ回路、7は同
フィルタ回路12出力の比較用基準電圧Vref による差動
アンプ、11は同差動アンプ7出力の誤差電圧15を帰還し
て電源電圧Vc を変調する電源電圧変調回路である。回
路動作は高圧HVの変動をブリーダ抵抗4で検出し、差動
アンプ7で一定電圧を引きさり増幅して誤差電圧15と
し、電源電圧変調回路11に帰還して所定の補正電圧16を
フライバックトランスに供給することで回路の安定化を
図る。以上差動アンプ7において基準電圧Vref との差
をとっているので、基準電圧Vref の設定値により差動
アンプ7のダイナミックレンジが広くとれない場合が生
じる。また、帰還ループにフィルタ回路12を挿入したこ
とにより応答特性が変わり、時定数を大きくすると位相
が遅れるため発振しやすくなる。
2. Description of the Related Art FIG. 5 shows a block diagram of a high voltage stabilizing circuit in a conventional television receiver. 1 is a horizontal output circuit that receives the horizontal drive HD signal A. 2 is a flyback transformer FBT that generates a high voltage HV for a cathode ray tube CRT anode.
Is a bleeder resistance for detecting fluctuations in the high voltage HV, 12 is a filter circuit for integrating the detection voltage B of the bleeder resistance 4, 7 is a differential amplifier based on the reference voltage Vref for comparison of the output of the bleeder resistance 12, and 11 is the same differential This is a power supply voltage modulation circuit that feeds back the error voltage 15 output from the amplifier 7 and modulates the power supply voltage Vc. The circuit operation detects the fluctuation of the high voltage HV by the bleeder resistor 4, pulls a constant voltage by the differential amplifier 7 and amplifies it to an error voltage 15, which is fed back to the power supply voltage modulation circuit 11 and a predetermined correction voltage 16 is flyback. The circuit is stabilized by supplying it to the transformer. Since the difference from the reference voltage Vref is taken in the differential amplifier 7 as described above, the dynamic range of the differential amplifier 7 may not be wide depending on the set value of the reference voltage Vref. In addition, the response characteristic is changed by inserting the filter circuit 12 in the feedback loop, and if the time constant is increased, the phase is delayed, so that oscillation easily occurs.

【0003】[0003]

【発明が解決しようとする課題】本発明は上記従来例に
鑑みてなされたもので、テレビ受像機等の高圧発生回路
において、フライバックトランスへの供給電圧を変調す
るための誤差電圧を出力する差動アンプを比較用基準電
圧の設定値によりダイナミックレンジに悪影響を与えな
い利得可変型とし安定した高速応答のダイナミックレギ
ュレーションの改善した高圧安定化回路を実現する。
SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned conventional example, and outputs an error voltage for modulating a supply voltage to a flyback transformer in a high voltage generating circuit of a television receiver or the like. The differential amplifier is a gain variable type that does not adversely affect the dynamic range depending on the set value of the reference voltage for comparison, and a stable high-speed response and high voltage stabilization circuit with improved dynamic regulation are realized.

【0004】[0004]

【課題を解決するための手段】本発明は、フライバック
トランスの高圧出力ブリーダ抵抗による検出電圧をサン
プルホールドして1水平走査期間遅らせて検出電圧の差
をとり、同差電圧の絶対値(大きさ)により利得可変型
の差動アンプの利得を制御し、同差動アンプ出力の誤差
電圧を電源電圧の電圧復調回路に帰還してフライバック
トランスの供給電源をコントロールすることを特徴とす
る。
According to the present invention, the voltage detected by a high-voltage output bleeder resistor of a flyback transformer is sample-held and delayed by one horizontal scanning period to obtain the difference between the detected voltages. Is used to control the gain of the variable gain type differential amplifier, and the error voltage of the differential amplifier output is fed back to the voltage demodulation circuit of the power supply voltage to control the power supply of the flyback transformer.

【0005】[0005]

【作用】図1に示すように、水平出力回路1、高圧HVを
発生するフライバックトランスFBT 2、高圧HV出力の変
動を検出するブリーダ抵抗3,4、タイミング的に1H
(1水平走査)位相差のある2H周期のサンプルホール
ド回路5,6、同サンプルホールド回路5および6出力
の差動アンプ7、同差動アンプ7出力の絶対値回路8、
1H毎に前記サンプルホールド回路5および6出力を切
り換え出力するスイッチ回路9、利得可変の差動アンプ
10、電源電圧Vc を変調して前記フライバックトランス
2の供給電源とする電圧変調回路等の構成からなり、ブ
リーダ抵抗4出力の検出電圧Bをサンプルホールドして
1H期間遅らせて差動アンプ7で電圧の差を求め、同差
電圧を絶対値化した制御電圧14により差動アンプ10の利
得を制御し、同差動アンプ10出力の誤差電圧15で電源電
圧Vc を変調してフライバックトランス2の高圧HV出力
の変動を抑える。
As shown in FIG. 1, a horizontal output circuit 1, a flyback transformer FBT 2 for generating a high voltage HV, a bleeder resistor 3, 4 for detecting fluctuations in the high voltage HV output, and a timing 1H.
(1 horizontal scanning) Sample-hold circuits 5 and 6 having a phase difference of 2H period, differential amplifier 7 of the sample-hold circuits 5 and 6 output, absolute value circuit 8 of the differential amplifier 7 output,
Switch circuit 9 for switching and outputting the outputs of the sample and hold circuits 5 and 6 for each 1H, a differential amplifier with variable gain
10. It comprises a voltage modulation circuit or the like for modulating the power supply voltage Vc to supply power to the flyback transformer 2. The detection voltage B of the output of the bleeder resistor 4 is sample-held and delayed for 1H period by the differential amplifier 7. The difference between the voltages is calculated, the gain of the differential amplifier 10 is controlled by the control voltage 14 that is the absolute value of the difference voltage, the power supply voltage Vc is modulated by the error voltage 15 of the output of the differential amplifier 10, and the flyback transformer 2 It suppresses the fluctuation of high voltage HV output.

【0006】[0006]

【実施例】図1に高圧発生回路のフライバックトランス
出力を高抵抗で分割した検出電圧をフィードバックする
高圧安定化回路のブロック図を示す。また、図2に同図
1の各部動作タイミング図を示す。1は図2のAに示す
水平ドライブHD信号Aを入力し高圧パルスを発生する水
平出力回路、2は同高圧パルスの昇圧巻線による高圧整
流回路および中電圧電源用2次巻線等からなる受像管CR
T アノードへ高圧HVを出力するフライバックトランスFB
T 、3,4は同高圧HV出力の変動を検出し図2のBに示
す検出電圧Bとして出力するブリーダ抵抗、5は図2の
Cに示す2H(2水平走査)周期のサンプリングパルス
Cによる検出電圧Bのサンプルホールド回路、6は図2
のDに示す位相差1Hの2H周期のサンプリングパルス
Dによる検出電圧Bのサンプルホールド回路、7は同サ
ンプルホールド回路6出力と前記サンプルホールド回路
5出力との差動アンプ、8は同差動アンプ7出力を絶対
値化し制御信号14として出力する絶対値回路、9は前記
サンプルホールド回路5および6出力を図2のEに示す
切換信号Eにより1H毎に選択出力するスイッチ回路、
10は基準電圧Vref と同スイッチ回路9出力とを入力し
前記絶対値回路8出力の高圧HVの変動量に基づく制御信
号14により利得を制御して誤差電圧15を出力する利得可
変の差動アンプ、11は同利得可変差動アンプ10出力の誤
差電圧15を帰還することで、高圧負荷の変動により高圧
HVが上昇した場合はフライバックトランス2の供給電源
16電圧を下げ、また、高圧HVが下がった場合は逆に供給
電源16電圧を上げる方向に電源電圧Vc を変調する電源
電圧変調回路である。
1 is a block diagram of a high voltage stabilizing circuit for feeding back a detection voltage obtained by dividing a flyback transformer output of a high voltage generating circuit by a high resistance. Further, FIG. 2 shows an operation timing chart of each part of FIG. Reference numeral 1 is a horizontal output circuit that receives the horizontal drive HD signal A shown in FIG. 2A and generates a high-voltage pulse. Reference numeral 2 is a high-voltage rectifier circuit using a boost winding of the high-voltage pulse and a secondary winding for a medium-voltage power supply. Picture tube CR
Flyback transformer FB that outputs high voltage HV to T anode
T, 3 and 4 are bleeder resistors that detect fluctuations in the high-voltage HV output and output as detection voltage B shown in B of FIG. 2. Reference numeral 5 is a sampling pulse C of 2H (2 horizontal scanning) period shown in C of FIG. A sample and hold circuit for the detection voltage B, 6 is shown in FIG.
Of D, a sample-and-hold circuit for the detection voltage B by the sampling pulse D having a phase difference of 1H and a 2H period, 7 is a differential amplifier of the sample-and-hold circuit 6 output and the sample-and-hold circuit 5 output, and 8 is the same differential amplifier. An absolute value circuit for converting 7 outputs into an absolute value and outputting it as a control signal 14, 9 is a switch circuit for selectively outputting the sample and hold circuits 5 and 6 every 1H by a switching signal E shown in E of FIG.
Reference numeral 10 is a differential amplifier of variable gain for inputting the reference voltage Vref and the output of the same switching circuit 9 and controlling the gain by a control signal 14 based on the variation of the high voltage HV of the output of the absolute value circuit 8 to output an error voltage 15. , 11 feeds back the error voltage 15 of the output of the same variable gain differential amplifier 10, so that
Power supply of flyback transformer 2 when HV rises
The power supply voltage modulation circuit modulates the power supply voltage Vc in the direction in which the 16 voltage is lowered and, when the high voltage HV is lowered, the voltage of the power supply 16 is increased.

【0007】ブリーダ抵抗4出力の検出電圧Bをサンプ
ルホールドするタイミングを図2のC,Dに示すように
1Hシフトして2Hサンプルホールドすると差動アンプ
7出力には前1Hからの変動量が現れ(変動が大きいと
それだけ多く補正しなければならない)、同変動量の大
きさにより誤差電圧15を出力する差動アンプ10の利得を
変え、変動量が大きい場合は利得を大きくする。差動ア
ンプ10の基準電圧Vref に近くなる方向に関する制御は
利得が小さくなり制御が遅れ、また、急激な変化に対応
するため通常利得を上げておくと発振の原因にもなるた
め変化量の検出により差動アンプ10の利得を変化するこ
とは有効である。
When the timing for sampling and holding the detection voltage B of the output of the bleeder resistor 4 is shifted by 1H and sampled and held for 2H as shown in C and D of FIG. 2, a variation amount from the previous 1H appears in the output of the differential amplifier 7. (The larger the fluctuation, the more the correction must be made). The gain of the differential amplifier 10 that outputs the error voltage 15 is changed according to the magnitude of the fluctuation, and the gain is increased when the fluctuation is large. In the control relating to the direction close to the reference voltage Vref of the differential amplifier 10, the gain becomes small and the control is delayed, and if the normal gain is raised to cope with a rapid change, it also causes oscillation, so that the change amount is detected. Therefore, it is effective to change the gain of the differential amplifier 10.

【0008】図3に高圧変動の検出電圧をフィードバッ
クする高圧安定化回路の他の実施例のブロック図を示
す。また、図4に同図3の各部動作タイミング図を示
す。1は図4のAに示す(図2と同じ)水平ドライブHD
信号Aを入力し図4のFに示す高圧パルスFを発生する
水平出力回路、2はフライバックトランスFBT 、3,4
は高圧HVの変動を検出するブリーダ抵抗、5は図4のC1
に示す1H周期のサンプリングパルスC1によるブリーダ
抵抗4検出電圧Bのサンプルホールド回路、7は同サン
プルホールド回路5出力の比較用基準電圧Vref による
差動アンプ、11は同差動アンプ7出力の誤差電圧15を帰
還して電源電圧Vc を変調する電源電圧変調回路であ
る。図4において、C1に示す水平パルスFの影響の少な
い水平走査の中央部で検出電圧Bのサンプリングを行い
フィルタ回路を不要とすることで系の応答性を良くし、
また、検出電圧Bのピーク値に対する平滑化を行わない
ことから正しい値をサンプリングすることができる。以
上高圧変動に対するダイナミックレギュレーションの改
善および高圧出力精度の向上が認められる。
FIG. 3 shows a block diagram of another embodiment of the high voltage stabilizing circuit for feeding back the detection voltage of the high voltage fluctuation. Further, FIG. 4 shows an operation timing chart of each part of FIG. 1 is a horizontal drive HD shown in A of FIG. 4 (same as FIG. 2)
A horizontal output circuit for inputting the signal A and generating a high voltage pulse F shown in F of FIG. 4 is a flyback transformer FBT, 3, 4
Is a bleeder resistance for detecting fluctuations in high voltage HV, and 5 is C1 in FIG.
A sample and hold circuit for detecting the bleeder resistance 4 detected voltage B by the sampling pulse C1 of 1H cycle shown in FIG. 7, 7 is a differential amplifier based on the reference voltage Vref for comparison of the output of the sample and hold circuit 5, and 11 is an error voltage of the output of the differential amplifier 7. A power supply voltage modulation circuit that feeds back 15 to modulate the power supply voltage Vc. In FIG. 4, the detection voltage B is sampled at the central portion of the horizontal scanning where the influence of the horizontal pulse F shown by C1 is small, and the filter circuit is unnecessary, thereby improving the response of the system.
Further, since the peak value of the detection voltage B is not smoothed, a correct value can be sampled. As described above, improvement of dynamic regulation and improvement of high voltage output accuracy with respect to high voltage fluctuation are recognized.

【0009】[0009]

【発明の効果】以上のように本発明は、テレビ受像機等
の高圧発生回路において、フライバックトランスの高圧
出力ブリーダ抵抗による検出電圧をサンプルホールドし
て1水平走査期間遅らせて同検出電圧の差をとり、同差
電圧の絶対値(大きさ)により誤差電圧検出用差動アン
プの利得をコントロールし、同誤差電圧を電源電圧の電
圧復調回路に帰還してフライバックトランスの供給電源
をコントロールすることで、所期の目的である安定した
高速応答のダイナミックレギュレーションの改善した高
圧安定化回路を実現することができる。
As described above, according to the present invention, in the high-voltage generating circuit of a television receiver or the like, the detection voltage by the high-voltage output bleeder resistance of the flyback transformer is sample-held and delayed for one horizontal scanning period, and the difference in the detection voltage is detected. The gain of the differential amplifier for error voltage detection is controlled by the absolute value (magnitude) of the same difference voltage, and the error voltage is fed back to the voltage demodulation circuit of the power supply voltage to control the power supply of the flyback transformer. As a result, it is possible to realize the intended purpose of a high-voltage stabilizing circuit with stable high-speed response and improved dynamic regulation.

【図面の簡単な説明】[Brief description of drawings]

【図1】高圧出力を高抵抗で分割した検出電圧を帰還す
る高圧安定化回路のブロック図である。
FIG. 1 is a block diagram of a high voltage stabilizing circuit that feeds back a detection voltage obtained by dividing a high voltage output with a high resistance.

【図2】図1を説明するための回路各部のタイミング図
である。
FIG. 2 is a timing diagram of each part of the circuit for explaining FIG.

【図3】他の実施例を示す図1と同様の検出電圧を帰還
する高圧安定化回路のブロック図である。
FIG. 3 is a block diagram of a high voltage stabilizing circuit for feeding back a detection voltage similar to FIG. 1 showing another embodiment.

【図4】図3を説明するための回路各部のタイミング図
である。
FIG. 4 is a timing diagram of each part of the circuit for explaining FIG.

【図5】従来の検出電圧を帰還する高圧安定化回路のブ
ロック図である。
FIG. 5 is a block diagram of a conventional high voltage stabilizing circuit that feeds back a detected voltage.

【符号の説明】[Explanation of symbols]

1 水平出力回路 2 フライバックトランス 3 高圧出力変動を検出するブリーダ抵抗 4 高圧出力変動を検出するブリーダ抵抗 5 サンプルホールド回路 6 サンプルホールド回路 7 差動アンプ 8 絶対値回路 9 スイッチ回路 10 利得可変型の差動アンプ 11 電源電圧変調回路 12 フィルタ回路 14 制御信号 15 誤差電圧 16 供給電源 1 horizontal output circuit 2 flyback transformer 3 bleeder resistance for detecting high voltage output fluctuation 4 bleeder resistance for detecting high voltage output fluctuation 5 sample and hold circuit 6 sample and hold circuit 7 differential amplifier 8 absolute value circuit 9 switch circuit 10 variable gain type Differential amplifier 11 Power supply voltage modulation circuit 12 Filter circuit 14 Control signal 15 Error voltage 16 Power supply

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 テレビ受像機等の高圧発生回路におい
て、水平出力回路の負荷(1次)巻線、中電圧電源用2
次巻線および高圧巻線による高圧整流回路等からなるフ
ライバックトランスの同高圧整流回路出力を電圧変動検
出用に抵抗分割し、同抵抗分割による検出電圧を2H
(水平走査)周期の第1のサンプルホールド回路と第2
のサンプるホールド回路とに接続し、同第1および第2
サンプルホールド回路出力それぞれを第1の差動アンプ
に接続するとともに2入力のスイッチ回路に接続し、同
第1の差動アンプ出力を絶対値回路を介して同スイッチ
回路出力と比較用基準電圧とを入力とする利得可変の第
2の差動アンプに接続し、同第2の差動アンプ出力を電
源電圧の電圧変調回路に帰還し、同変調回路出力を前記
フライバックトランスの負荷供給電源としてなる高圧安
定化回路。
1. In a high voltage generating circuit of a television receiver or the like, a load (primary) winding of a horizontal output circuit and a medium voltage power supply 2
The output of the high-voltage rectifier circuit of the flyback transformer, which consists of a high-voltage rectifier circuit composed of a secondary winding and a high-voltage winding, is divided into resistors for voltage fluctuation detection, and the detection voltage by the same resistor division is 2H
(Horizontal scanning) period first sample hold circuit and second
Connected to the sample and hold circuit of
Each of the sample and hold circuit outputs is connected to a first differential amplifier and a two-input switch circuit, and the output of the first differential amplifier is supplied to the switch circuit output and a reference voltage for comparison via an absolute value circuit. Is connected to a variable gain second differential amplifier, the second differential amplifier output is fed back to the voltage modulation circuit of the power supply voltage, and the modulation circuit output is used as the load supply power source of the flyback transformer. High voltage stabilization circuit.
【請求項2】 テレビ受像機等の高圧発生回路におい
て、水平出力回路の負荷(1次)巻線、中電圧電源用2
次巻線および高圧巻線による高圧整流回路等からなるフ
ライバックトランスの同高圧整流回路出力を電圧変動検
出用に抵抗分割し、同抵抗分割による検出電圧を1H周
期のサンプルホールド回路に接続し、同サンプルホール
ド回路出力と比較用基準電圧とを差動アンプに接続し、
同差動アンプ出力を電源電圧の電圧変調回路に帰還し、
同変調回路出力を前記フライバックトランスの負荷供給
電源とし、サンプルホールドのタイミングを水平走査期
間の中央位置としてなることを特徴とする高圧安定化回
路。
2. In a high voltage generating circuit of a television receiver or the like, a load (primary) winding of a horizontal output circuit and a medium voltage power supply 2
The output of the same high-voltage rectifier circuit of the flyback transformer, which consists of a high-voltage rectifier circuit with a secondary winding and a high-voltage winding, is resistance-divided for voltage fluctuation detection, and the detected voltage by the same resistance division is connected to a 1H cycle sample-hold circuit, The output of the sample and hold circuit and the reference voltage for comparison are connected to a differential amplifier,
The differential amplifier output is fed back to the voltage modulation circuit of the power supply voltage,
A high-voltage stabilization circuit, wherein the output of the modulation circuit is used as a load supply power source of the flyback transformer, and a sample hold timing is set to a central position of a horizontal scanning period.
JP21075991A 1991-08-22 1991-08-22 High-voltage stabilizing circuit Pending JPH0556289A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21075991A JPH0556289A (en) 1991-08-22 1991-08-22 High-voltage stabilizing circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21075991A JPH0556289A (en) 1991-08-22 1991-08-22 High-voltage stabilizing circuit

Publications (1)

Publication Number Publication Date
JPH0556289A true JPH0556289A (en) 1993-03-05

Family

ID=16594661

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21075991A Pending JPH0556289A (en) 1991-08-22 1991-08-22 High-voltage stabilizing circuit

Country Status (1)

Country Link
JP (1) JPH0556289A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20030045953A (en) * 2001-12-03 2003-06-12 엘지전자 주식회사 A Circuit regulation of monitor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20030045953A (en) * 2001-12-03 2003-06-12 엘지전자 주식회사 A Circuit regulation of monitor

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