JPH0555842A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPH0555842A
JPH0555842A JP3217058A JP21705891A JPH0555842A JP H0555842 A JPH0555842 A JP H0555842A JP 3217058 A JP3217058 A JP 3217058A JP 21705891 A JP21705891 A JP 21705891A JP H0555842 A JPH0555842 A JP H0555842A
Authority
JP
Japan
Prior art keywords
operational amplifier
constant current
output stage
semiconductor device
current source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3217058A
Other languages
Japanese (ja)
Inventor
Masanori Kondo
雅則 近藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP3217058A priority Critical patent/JPH0555842A/en
Publication of JPH0555842A publication Critical patent/JPH0555842A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To improve the generality of a semiconductor device including an operational amplifier by allowing a user to set up several characteristics for the operational amplifier built in the semiconductor device by means of a program. CONSTITUTION:The operational amplifier is provided with plural constant current sources 109, 110, plural PMOS switches 111, 112 for turning on/off the constant current sources 109, 110 and plural constant current source selecting registers 113, 114 for applying signals to the switches 111, 112. When '1' and '0' are written in the registers 113, 114, the switches 111, 112 are turned on and off and the level of a current supplied to an output stage is changed. Thereby the reduction of the current to the output stage suppresses the power consumption of the operational amplifier, and when the current is increased, the response speed or driving capacity of the amplifier can be improved.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、オペアンプを内蔵した
半導体装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device containing an operational amplifier.

【0002】[0002]

【従来の技術】従来の半導体装置に於けるオペアンプは
CMOSで構成された場合図3のような構成をしてい
る。図3に於て301は差動段に電流を供給する差動増
幅段定電流源であり、302は出力段に電流を供給する
出力段定電流源、303はオペアンプ差動増幅段、30
4はオペアンプ出力段、305は非反転入力、306は
反転入力、307はオペアンプの出力である。非反転入
力305からの入力と反転入力306からの入力の差を
増幅して307の出力端子から出力している。 このオ
ペアンプの消費電力と応答速度、駆動力は302の出力
段定電流源により供給される電流の大きさによって変わ
る。この電流を小さくすることによりオペアンプの消費
電力は低くなり、電流を大きくすることによりオペアン
プの応答速度と駆動力が高くなる。
2. Description of the Related Art An operational amplifier in a conventional semiconductor device has a structure as shown in FIG. In FIG. 3, 301 is a differential amplification stage constant current source that supplies current to the differential stage, 302 is an output stage constant current source that supplies current to the output stage, 303 is an operational amplifier differential amplification stage, 30
4 is an operational amplifier output stage, 305 is a non-inverting input, 306 is an inverting input, and 307 is an operational amplifier output. The difference between the input from the non-inverting input 305 and the input from the inverting input 306 is amplified and output from the output terminal 307. The power consumption, response speed, and driving force of this operational amplifier vary depending on the magnitude of the current supplied by the output-stage constant current source 302. By reducing this current, the power consumption of the operational amplifier is reduced, and by increasing the current, the response speed and driving force of the operational amplifier are increased.

【0003】[0003]

【発明が解決しようとする課題】従来の半導体装置に内
蔵されるオペアンプに於て、その消費電力を抑えるため
には、出力段への電流源として出力する電流が小さい定
電流源を設置すれば良いが、このことによりオペアンプ
の応答速度や駆動力が低下してしまう、また反対にオペ
アンプの応答速度や駆動力を向上させるためには、出力
段への電流源として出力する電流が大きい定電流源を設
置すれば良いが、このことによりオペアンプの消費電流
が大きくなってしまう。従来において出力段の定電流源
は固定であったため、オペアンプの消費電力、応答速
度、駆動力といった特性について設定変更することが不
可能であった。
In order to suppress the power consumption of an operational amplifier incorporated in a conventional semiconductor device, a constant current source that outputs a small current as a current source to an output stage should be installed. Good, but this reduces the response speed and driving force of the operational amplifier. Conversely, in order to improve the response speed and driving force of the operational amplifier, a constant current that outputs a large current as a current source to the output stage is used. It is sufficient to install a power source, but this increases the current consumption of the operational amplifier. Since the constant current source in the output stage has been fixed in the past, it was impossible to change the setting of the characteristics of the operational amplifier such as power consumption, response speed and driving force.

【0004】特にアプリケーションとしてオペアンプを
取り込んだ汎用の半導体装置の場合、その半導体装置の
使用される状況により、オペアンプが応答速度性や駆動
能力に優れていることよりも低消費電力であることが要
求される場合や、逆に低消費電力であることよりも応答
速度性や駆動能力に優れていることが要求される場合が
ある。このとき、半導体装置に取り組んだオペアンプの
特性が、その時々の要求に合わない場合があり、そのた
めに半導体装置の汎用性が低下してしまうことになって
いた。
Particularly, in the case of a general-purpose semiconductor device incorporating an operational amplifier as an application, it is required that the operational amplifier has low power consumption rather than excellent response speed and driving capability depending on the usage of the semiconductor device. In some cases, on the contrary, it is required that the response speed and the driving capability are superior to the low power consumption. At this time, the characteristics of the operational amplifier used in the semiconductor device may not meet the demands at each time, which reduces the versatility of the semiconductor device.

【0005】[0005]

【課題を解決するための手段】(1)a)単一半導体基
盤上に、b)オペアンプと、c)前記オペアンプの出力
段に接続される複数の定電流源を有し、d)前記複数の
定電流源のうち、1つ以上の定電流源が選択的に前記オ
ペアンプの出力段に接続される手段を有することを特徴
とする。
Means for Solving the Problems (1) a) a single semiconductor substrate, b) an operational amplifier, c) a plurality of constant current sources connected to the output stage of the operational amplifier, and d) the plurality of constant current sources. One or more constant current sources among the constant current sources of 1) have means for selectively connecting to the output stage of the operational amplifier.

【0006】(2)a)プログラム命令を記憶するメモ
リ装置と、b)前記プログラム命令に基づき順次出力す
る制御手段を有し、c)前記制御手段に基づいて、前記
複数の定電流源のうち、1つ以上の定電流源を選択的に
前記オペアンプの出力段に接続される手段を有すること
を特徴とする。
(2) a) a memory device for storing program instructions; b) a control means for sequentially outputting based on the program instructions; and c) one of the plurality of constant current sources based on the control means. It is characterized in that it has means for selectively connecting one or more constant current sources to the output stage of the operational amplifier.

【0007】[0007]

【作用】以上のように構成されたオペアンプを内蔵した
半導体装置は、オペアンプの出力段に供給される電流の
大きさをプログラムによって数段階に切り換えることが
可能となり、低消費電力向けのオペアンプの設定や応答
速度性、駆動能力を向上させた設定など、一つの半導体
装置上でその半導体装置のアプリケーションにあわせた
オペアンプの特性が設定できるようになる。
In the semiconductor device having the built-in operational amplifier configured as described above, the magnitude of the current supplied to the output stage of the operational amplifier can be switched in several steps by a program, and the operational amplifier for low power consumption can be set. The characteristics of the operational amplifier can be set on one semiconductor device according to the application of the semiconductor device, such as setting with improved response speed and driving capability.

【0008】[0008]

【実施例】本発明によるオペアンプを内蔵した半導体装
置の1実施例を図2に示す。
FIG. 2 shows one embodiment of a semiconductor device incorporating an operational amplifier according to the present invention.

【0009】201は出力段の定電流源を複数個備えた
オペアンプで、202はその複数個ある定電流源の中か
ら1個以上任意の定電流源を選択するためのスイッチ、
203は202のスイッチをON、OFFさせるための
信号を保持する定電流選択レジスタである。204は入
出力ポートで、205はCPU、206は定電流源を選
択可能とするためのプログラムが記憶されたROMであ
る。
Reference numeral 201 is an operational amplifier provided with a plurality of constant current sources in the output stage, reference numeral 202 is a switch for selecting one or more constant current sources from the plurality of constant current sources,
Reference numeral 203 denotes a constant current selection register that holds a signal for turning on and off the switch of 202. Reference numeral 204 is an input / output port, 205 is a CPU, and 206 is a ROM storing a program for enabling selection of a constant current source.

【0010】定電流源を選択するためには入出力ポート
へ決められた信号を与えれることにより、ROMに記憶
されたプロクラムに従って定電流源選択レジスタに”
0”または”1”が書き込まれ、定電流源が選択される
ことになる。
In order to select the constant current source, a constant signal is applied to the constant current source selection register according to the program stored in the ROM by applying a predetermined signal to the input / output port.
0 "or" 1 "is written, and the constant current source is selected.

【0011】次に、オペアンプ部分について詳細に示し
たのが図1である。
Next, FIG. 1 shows the operational amplifier portion in detail.

【0012】101はオペアンプの差動段、102は差
動段への電流を供給する差動段定電流源。103は非反
転入力104、反転入力105の電圧差を増幅するオペ
アンプ差動増幅段、106は差動段からの出力を外部に
出力するオペアンプ出力段、107、108は出力段へ
電流を供給するための定電流源を選択するための定電流
源選択信号、109、110は出力段へそれぞれが大き
さの等しい、あるいは異なる電流を供給する出力段定電
流源。111、112は出力段定電流源109、110
への電流の供給を選択するためのPMOSスイッチ、1
13、114は定電流源109、110を選択するため
の信号を保持するための定電流源選択レジスタ、115
はオペアンプの出力である。この回路図では、定電流源
選択レジスタ113に”1”を書き込むことによりPM
OS定電流源スイッチ111をONさせ、定電流源10
9により、出力段への電流が供給される。同様に定電流
源選択レジスタ114に”1”を書き込めば、定電流源
110により、出力段への電流が供給される。また定電
流源選択レジスタ113、114両方に”1”を書き込
めば定電流源119、110の両方から電流が供給され
ることになる。また定電流源選択レジスタ113、11
4両方に”0”を書き込めば出力段に電流が供給されな
い。出力段に設置した複数の定電流源がそれぞれ等しい
ものであれば、定電流源選択レジスタに書き込んだ”
1”の数が多いほど出力段に供給される電流は大きいも
のとなり、”1”の数が少なければ出力段に供給される
電流は小さいものとなる。
Reference numeral 101 is a differential stage of an operational amplifier, and 102 is a differential stage constant current source for supplying a current to the differential stage. 103 is an operational amplifier differential amplification stage that amplifies the voltage difference between the non-inverting input 104 and the inverting input 105, 106 is an operational amplifier output stage that outputs the output from the differential stage to the outside, and 107 and 108 supply current to the output stage Constant current source selection signals for selecting a constant current source for the output stage, and 109 and 110 are output stage constant current sources for supplying currents of the same or different magnitudes to the output stages. 111 and 112 are output stage constant current sources 109 and 110.
PMOS switch for selecting current supply to the, 1
Reference numerals 13 and 114 denote constant current source selection registers for holding a signal for selecting the constant current sources 109 and 110, and 115.
Is the output of the operational amplifier. In this circuit diagram, PM is written by writing "1" in the constant current source selection register 113.
The OS constant current source switch 111 is turned on to turn on the constant current source 10
9 supplies the current to the output stage. Similarly, if “1” is written in the constant current source selection register 114, the constant current source 110 supplies the current to the output stage. If "1" is written in both the constant current source selection registers 113 and 114, the currents are supplied from both the constant current sources 119 and 110. Further, the constant current source selection registers 113 and 11
No current is supplied to the output stage if "0" is written in both of them. If the constant current sources installed in the output stage are the same, write them in the constant current source selection register ”
The larger the number of 1's, the larger the current supplied to the output stage, and the smaller the number of 1's, the smaller the current supplied to the output stage.

【0013】出力段に供給する電流を小さくした場合、
そのオペアンプの応答速度や駆動力は小さくなるが、消
費電力を抑えることができる、反対に出力段に供給する
電流を大きくした場合、消費電力は大きくなるが応答速
度や駆動力は向上させることができる。
When the current supplied to the output stage is reduced,
Although the response speed and driving force of the operational amplifier are reduced, the power consumption can be suppressed. Conversely, when the current supplied to the output stage is increased, the power consumption is increased but the response speed and driving force can be improved. it can.

【0014】以上のようなことから、オペアンプの出力
段に供給される電流を数段階に切り換えることによっ
て、オペアンプを内蔵する半導体装置の使用される状況
に応じ、応答速度や駆動力、消費電力といったオペアン
プの特性を設定することが可能となる。
From the above, by switching the current supplied to the output stage of the operational amplifier in several stages, the response speed, the driving force, the power consumption, etc. can be changed according to the usage of the semiconductor device incorporating the operational amplifier. It is possible to set the characteristics of the operational amplifier.

【0015】[0015]

【発明の効果】以上述べたように本発明によれば、オペ
アンプの出力段に供給される電流の大きさを数段階に切
り換えることが可能となり、オペアンプの特性を低消費
電力なものにしたり、応答速度性や駆動能力の優れたも
のにしたりすることができるようになる。これにより、
一つの半導体装置上でその半導体装置のアプリケーショ
ンにあわせたオペアンプの特性を設定できるようにな
る。
As described above, according to the present invention, it becomes possible to switch the magnitude of the current supplied to the output stage of the operational amplifier in several steps, and the characteristics of the operational amplifier can be made low power consumption, It becomes possible to improve the response speed and the driving ability. This allows
It becomes possible to set the characteristics of the operational amplifier on one semiconductor device according to the application of the semiconductor device.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明によるオペアンプの実施例を示す回路図
である。
FIG. 1 is a circuit diagram showing an embodiment of an operational amplifier according to the present invention.

【図2】本発明によるオペアンプの実施例を示すブロッ
ク図である。
FIG. 2 is a block diagram showing an embodiment of an operational amplifier according to the present invention.

【図3】従来のオペアンプの実施例を示すための回路図
である。
FIG. 3 is a circuit diagram showing an example of a conventional operational amplifier.

【符号の説明】[Explanation of symbols]

101・・・オペアンプ差動段 102・・・差動増幅段定電流源 103・・・オペアンプ差動増幅段 104・・・非反転入力 105・・・反転入力 106・・・オペアンプ出力段 107・・・定電流選択信号1 108・・・定電流選択信号2 109・・・出力段定電流源1 110・・・出力段定電流源2 111・・・PMOSトランジスタによる定電流源スイ
ッチ1 112・・・PMOSトランジスタによる定電流源スイ
ッチ2 113・・・定電流源選択レジスタ 114・・・定電流源選択レジスタ 115・・・オペアンプ出力 201・・・オペアンプ 202・・・定電流源スイッチ 203・・・定電流源選択レジスタ 204・・・入出力ポート 205・・・CPU 206・・・プログラムROM 301・・・差動増幅段定電流源 302・・・出力段定電流源 303・・・オペアンプ差動増幅段 304・・・オペアンプ出力段 305・・・非反転入力 306・・・反転入力 307・・・オペアンプ出力
101 ... Operational amplifier differential stage 102 ... Differential amplification stage constant current source 103 ... Operational amplifier differential amplification stage 104 ... Non-inverting input 105 ... Inversion input 106 ... Operational amplifier output stage 107. ..Constant current selection signal 1 108 ... constant current selection signal 2 109 ... output stage constant current source 1 110 ... output stage constant current source 2 111 ... constant current source switch 1 112 by PMOS transistor ..Constant current source switch 2 113 by PMOS transistor ... Constant current source selection register 114 ... Constant current source selection register 115 ... Operational amplifier output 201 ... Operational amplifier 202 ... Constant current source switch 203 ...・ Constant current source selection register 204 ・ ・ ・ Input / output port 205 ・ ・ ・ CPU 206 ・ ・ ・ Program ROM 301 ・ ・ ・ Differential amplification stage constant current Source 302 ... output stage constant current source 303 ... op amplifier stage 304 ... operational amplifier output stage 305 ... non-inverting input 306 ... inverting input 307 ... op amp output

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 a)単一半導体基盤上に、 b)オペアンプと、 c)前記オペアンプの出力段に接続される複数の定電流
源を有し、 d)前記複数の定電流源のうち、1つ以上の定電流源が
選択的に前記オペアンプの出力段に接続される手段を有
することを特徴とする半導体装置。
1. A) a single semiconductor substrate, b) an operational amplifier, c) a plurality of constant current sources connected to an output stage of the operational amplifier, and d) a plurality of constant current sources among the plurality of constant current sources. A semiconductor device comprising one or more constant current sources selectively connected to the output stage of the operational amplifier.
【請求項2】 a)プログラム命令を記憶するメモリ装
置と、 b)前記プログラム命令に基づき順次出力する制御手段
を有し、 c)前記制御手段に基づいて、前記複数の定電流源のう
ち、1つ以上の定電流源を選択的に前記オペアンプの出
力段に接続される手段を有することを特徴とする請求項
1記載の半導体装置。
2. A memory device for storing program instructions, b) control means for sequentially outputting based on the program instructions, and c) one of the plurality of constant current sources based on the control means. 2. The semiconductor device according to claim 1, further comprising means for selectively connecting one or more constant current sources to the output stage of the operational amplifier.
JP3217058A 1991-08-28 1991-08-28 Semiconductor device Pending JPH0555842A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3217058A JPH0555842A (en) 1991-08-28 1991-08-28 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3217058A JPH0555842A (en) 1991-08-28 1991-08-28 Semiconductor device

Publications (1)

Publication Number Publication Date
JPH0555842A true JPH0555842A (en) 1993-03-05

Family

ID=16698173

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3217058A Pending JPH0555842A (en) 1991-08-28 1991-08-28 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH0555842A (en)

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US8149048B1 (en) * 2000-10-26 2012-04-03 Cypress Semiconductor Corporation Apparatus and method for programmable power management in a programmable analog circuit block
US8358150B1 (en) 2000-10-26 2013-01-22 Cypress Semiconductor Corporation Programmable microcontroller architecture(mixed analog/digital)
US8370791B2 (en) 2001-11-19 2013-02-05 Cypress Semiconductor Corporation System and method for performing next placements and pruning of disallowed placements for programming an integrated circuit
US9720805B1 (en) 2007-04-25 2017-08-01 Cypress Semiconductor Corporation System and method for controlling a target device
US9766650B2 (en) 2000-10-26 2017-09-19 Cypress Semiconductor Corporation Microcontroller programmable system on a chip with programmable interconnect
US10466980B2 (en) 2001-10-24 2019-11-05 Cypress Semiconductor Corporation Techniques for generating microcontroller configuration information
US10698662B2 (en) 2001-11-15 2020-06-30 Cypress Semiconductor Corporation System providing automatic source code generation for personalization and parameterization of user modules

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US10261932B2 (en) 2000-10-26 2019-04-16 Cypress Semiconductor Corporation Microcontroller programmable system on a chip
US8149048B1 (en) * 2000-10-26 2012-04-03 Cypress Semiconductor Corporation Apparatus and method for programmable power management in a programmable analog circuit block
US8358150B1 (en) 2000-10-26 2013-01-22 Cypress Semiconductor Corporation Programmable microcontroller architecture(mixed analog/digital)
US9766650B2 (en) 2000-10-26 2017-09-19 Cypress Semiconductor Corporation Microcontroller programmable system on a chip with programmable interconnect
US9843327B1 (en) 2000-10-26 2017-12-12 Cypress Semiconductor Corporation PSOC architecture
US10020810B2 (en) 2000-10-26 2018-07-10 Cypress Semiconductor Corporation PSoC architecture
US10248604B2 (en) 2000-10-26 2019-04-02 Cypress Semiconductor Corporation Microcontroller programmable system on a chip
US10725954B2 (en) 2000-10-26 2020-07-28 Monterey Research, Llc Microcontroller programmable system on a chip
US6854067B1 (en) 2000-10-30 2005-02-08 Cypress Semiconductor Corporation Method and system for interaction between a processor and a power on reset circuit to dynamically control power states in a microcontroller
US10466980B2 (en) 2001-10-24 2019-11-05 Cypress Semiconductor Corporation Techniques for generating microcontroller configuration information
US10698662B2 (en) 2001-11-15 2020-06-30 Cypress Semiconductor Corporation System providing automatic source code generation for personalization and parameterization of user modules
US8370791B2 (en) 2001-11-19 2013-02-05 Cypress Semiconductor Corporation System and method for performing next placements and pruning of disallowed placements for programming an integrated circuit
US9720805B1 (en) 2007-04-25 2017-08-01 Cypress Semiconductor Corporation System and method for controlling a target device

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