JPH0555842A - Semiconductor device - Google Patents

Semiconductor device

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Publication number
JPH0555842A
JPH0555842A JP3217058A JP21705891A JPH0555842A JP H0555842 A JPH0555842 A JP H0555842A JP 3217058 A JP3217058 A JP 3217058A JP 21705891 A JP21705891 A JP 21705891A JP H0555842 A JPH0555842 A JP H0555842A
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JP
Japan
Prior art keywords
operational amplifier
constant current
current source
output stage
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3217058A
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Japanese (ja)
Inventor
Masanori Kondo
雅則 近藤
Original Assignee
Seiko Epson Corp
セイコーエプソン株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by Seiko Epson Corp, セイコーエプソン株式会社 filed Critical Seiko Epson Corp
Priority to JP3217058A priority Critical patent/JPH0555842A/en
Publication of JPH0555842A publication Critical patent/JPH0555842A/en
Application status is Pending legal-status Critical

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Abstract

PURPOSE:To improve the generality of a semiconductor device including an operational amplifier by allowing a user to set up several characteristics for the operational amplifier built in the semiconductor device by means of a program. CONSTITUTION:The operational amplifier is provided with plural constant current sources 109, 110, plural PMOS switches 111, 112 for turning on/off the constant current sources 109, 110 and plural constant current source selecting registers 113, 114 for applying signals to the switches 111, 112. When '1' and '0' are written in the registers 113, 114, the switches 111, 112 are turned on and off and the level of a current supplied to an output stage is changed. Thereby the reduction of the current to the output stage suppresses the power consumption of the operational amplifier, and when the current is increased, the response speed or driving capacity of the amplifier can be improved.

Description

【発明の詳細な説明】 DETAILED DESCRIPTION OF THE INVENTION

【0001】 [0001]

【産業上の利用分野】本発明は、オペアンプを内蔵した半導体装置に関する。 The present invention relates to a semiconductor device with a built-in operational amplifier.

【0002】 [0002]

【従来の技術】従来の半導体装置に於けるオペアンプはCMOSで構成された場合図3のような構成をしている。 In the operational amplifier to a conventional semiconductor device has a structure as in the case Figure 3 composed of CMOS. 図3に於て301は差動段に電流を供給する差動増幅段定電流源であり、302は出力段に電流を供給する出力段定電流源、303はオペアンプ差動増幅段、30 301 At a 3 is a differential amplifier stage constant current source for supplying a current to the differential stage, 302 output stage constant current source for supplying a current to the output stage, 303 operational amplifier differential amplifier stage, 30
4はオペアンプ出力段、305は非反転入力、306は反転入力、307はオペアンプの出力である。 4 operational amplifier output stage, 305 the non-inverting input, 306 an inverting input, 307 is an output of the operational amplifier. 非反転入力305からの入力と反転入力306からの入力の差を増幅して307の出力端子から出力している。 Amplifies the difference between the input from the input and the inverting input 306 from the non-inverting input 305 is output from the output terminal 307. このオペアンプの消費電力と応答速度、駆動力は302の出力段定電流源により供給される電流の大きさによって変わる。 Power consumption and the response speed of the operational amplifier, the driving force varies depending on the magnitude of the current supplied by the output stage constant current source 302. この電流を小さくすることによりオペアンプの消費電力は低くなり、電流を大きくすることによりオペアンプの応答速度と駆動力が高くなる。 Power consumption of the operational amplifier by reducing the current is low and the current response speed of the operational amplifier and the driving force is increased by the increase.

【0003】 [0003]

【発明が解決しようとする課題】従来の半導体装置に内蔵されるオペアンプに於て、その消費電力を抑えるためには、出力段への電流源として出力する電流が小さい定電流源を設置すれば良いが、このことによりオペアンプの応答速度や駆動力が低下してしまう、また反対にオペアンプの応答速度や駆動力を向上させるためには、出力段への電流源として出力する電流が大きい定電流源を設置すれば良いが、このことによりオペアンプの消費電流が大きくなってしまう。 At a operational amplifier incorporated in THE INVENTION Problems to be Solved by the conventional semiconductor device, in order to suppress the power consumption, if installed current is small constant current source for outputting as a current source to the output stage good, the response speed and the driving force of the operational amplifier is reduced by, also in order to improve the response speed and the driving force of the operational amplifier Conversely, current is large constant current output as a current source to the output stage the source may be installed, but the current consumption of the operational amplifier is increased by this. 従来において出力段の定電流源は固定であったため、オペアンプの消費電力、応答速度、駆動力といった特性について設定変更することが不可能であった。 Since the constant current source in the output stage in the prior was fixed, the power consumption of the operational amplifier, it is impossible to set change the response speed, characteristics such as driving force.

【0004】特にアプリケーションとしてオペアンプを取り込んだ汎用の半導体装置の場合、その半導体装置の使用される状況により、オペアンプが応答速度性や駆動能力に優れていることよりも低消費電力であることが要求される場合や、逆に低消費電力であることよりも応答速度性や駆動能力に優れていることが要求される場合がある。 [0004] especially a general-purpose semiconductor device incorporating an operational amplifier as an application, its the circumstances for use of the semiconductor device, is required that the operational amplifier has a low power consumption than to have an excellent response speed property and drivability when desiring to, in some cases it is required to have excellent response speed resistance and driving capability than that power consumption is low in the reverse. このとき、半導体装置に取り組んだオペアンプの特性が、その時々の要求に合わない場合があり、そのために半導体装置の汎用性が低下してしまうことになっていた。 In this case, the characteristics of the operational amplifier worked on semiconductor devices, may not fit to prevailing requirements, the versatility of the semiconductor device was supposed to lowered for that.

【0005】 [0005]

【課題を解決するための手段】(1)a)単一半導体基盤上に、b)オペアンプと、c)前記オペアンプの出力段に接続される複数の定電流源を有し、d)前記複数の定電流源のうち、1つ以上の定電流源が選択的に前記オペアンプの出力段に接続される手段を有することを特徴とする。 On SUMMARY OF THE INVENTION (1) a) single semiconductor substrate, b) an operational amplifier, c) a plurality of constant-current source connected to the output stage of the operational amplifier, d) said plurality of the constant current source, and having a means for one or more of the constant current source is connected to the output stage of selectively said operational amplifier.

【0006】(2)a)プログラム命令を記憶するメモリ装置と、b)前記プログラム命令に基づき順次出力する制御手段を有し、c)前記制御手段に基づいて、前記複数の定電流源のうち、1つ以上の定電流源を選択的に前記オペアンプの出力段に接続される手段を有することを特徴とする。 [0006] (2) a) and a memory device for storing program instructions, b) a control means for sequentially outputting based on the program instructions, c) on the basis of said control means, said plurality of constant current sources , characterized in that it has a means connected to the output stage of selectively said operational amplifier of one or more constant current sources.

【0007】 [0007]

【作用】以上のように構成されたオペアンプを内蔵した半導体装置は、オペアンプの出力段に供給される電流の大きさをプログラムによって数段階に切り換えることが可能となり、低消費電力向けのオペアンプの設定や応答速度性、駆動能力を向上させた設定など、一つの半導体装置上でその半導体装置のアプリケーションにあわせたオペアンプの特性が設定できるようになる。 [Action] or more semiconductor device having a built-configured operational amplifier as is, it is possible to switch several steps by a program the magnitude of the current supplied to the output stage of the operational amplifier, the operational amplifier setting low power for and response speed resistance and set with improved drivability, characteristic of the operational amplifier to suit the application of the semiconductor device on a single semiconductor device will be able to set.

【0008】 [0008]

【実施例】本発明によるオペアンプを内蔵した半導体装置の1実施例を図2に示す。 An embodiment of EXAMPLES semiconductor device including an operational amplifier according to the invention is shown in FIG.

【0009】201は出力段の定電流源を複数個備えたオペアンプで、202はその複数個ある定電流源の中から1個以上任意の定電流源を選択するためのスイッチ、 [0009] 201 operational amplifier provided with a plurality of constant-current source in the output stage, a switch for selecting an arbitrary constant current source 1 or more from among the plurality certain constant current source 202,
203は202のスイッチをON、OFFさせるための信号を保持する定電流選択レジスタである。 203 ON the switch 202, a constant current selection register which holds a signal to OFF. 204は入出力ポートで、205はCPU、206は定電流源を選択可能とするためのプログラムが記憶されたROMである。 204 input and output ports, 205 CPU, 206 is a ROM in which a program for a selectable constant current source is stored.

【0010】定電流源を選択するためには入出力ポートへ決められた信号を与えれることにより、ROMに記憶されたプロクラムに従って定電流源選択レジスタに” [0010] By in order to select the constant current source is applied with a signal which is determined to output port, the constant current source selection register according Purokuramu stored in ROM "
0”または”1”が書き込まれ、定電流源が選択されることになる。 0 "or" 1 "is written, so that the constant current source is selected.

【0011】次に、オペアンプ部分について詳細に示したのが図1である。 [0011] Next, it is 1 to that shown in detail the operational amplifier portion.

【0012】101はオペアンプの差動段、102は差動段への電流を供給する差動段定電流源。 [0012] 101 differential stage of the operational amplifier, 102 is a differential stage constant current source for supplying a current to the differential stage. 103は非反転入力104、反転入力105の電圧差を増幅するオペアンプ差動増幅段、106は差動段からの出力を外部に出力するオペアンプ出力段、107、108は出力段へ電流を供給するための定電流源を選択するための定電流源選択信号、109、110は出力段へそれぞれが大きさの等しい、あるいは異なる電流を供給する出力段定電流源。 103 non-inverting input 104, an operational amplifier differential amplifier stage for amplifying the voltage difference between the inverting input 105, an operational amplifier output stage for outputting the output from the differential stage to the outside 106, 107 and 108 supplies a current to the output stage constant current source selection signal, 109 and 110 the output stage constant current source for supplying an equal, or different current in each magnitude to the output stage for selecting the constant current source for. 111、112は出力段定電流源109、110 111 and 112 output stage constant current source 109 and 110
への電流の供給を選択するためのPMOSスイッチ、1 PMOS switch for selecting the current supply to, 1
13、114は定電流源109、110を選択するための信号を保持するための定電流源選択レジスタ、115 13,114 constant current source selection register for storing a signal for selecting the constant current source 109 and 110, 115
はオペアンプの出力である。 Is the output of the operational amplifier. この回路図では、定電流源選択レジスタ113に”1”を書き込むことによりPM In this circuit diagram, PM by writing "1" to the constant current source selection register 113
OS定電流源スイッチ111をONさせ、定電流源10 It is turned ON OS constant current source switch 111, a constant current source 10
9により、出力段への電流が供給される。 By 9, the current to the output stage is supplied. 同様に定電流源選択レジスタ114に”1”を書き込めば、定電流源110により、出力段への電流が供給される。 Writing a "1" similarly to the constant current source selection register 114, the constant current source 110, current to the output stage is supplied. また定電流源選択レジスタ113、114両方に”1”を書き込めば定電流源119、110の両方から電流が供給されることになる。 Also so that current is supplied from both the constant current source 119,110 Writing a "1" in both the constant current source selection register 113 and 114. また定電流源選択レジスタ113、11 The constant current source selection register 113,11
4両方に”0”を書き込めば出力段に電流が供給されない。 Both 4 "0" is the current in the output stage Writing a not supplied. 出力段に設置した複数の定電流源がそれぞれ等しいものであれば、定電流源選択レジスタに書き込んだ” As long as a plurality of constant current sources installed in the output stage are equal respectively, written to the constant current source selection register "
1”の数が多いほど出力段に供給される電流は大きいものとなり、”1”の数が少なければ出力段に供給される電流は小さいものとなる。 1 "current number is supplied to as the output stage large in becomes larger," the current number is supplied to the output stage the less the 1 "becomes small.

【0013】出力段に供給する電流を小さくした場合、 [0013] If you reduce the current supplied to the output stage,
そのオペアンプの応答速度や駆動力は小さくなるが、消費電力を抑えることができる、反対に出力段に供給する電流を大きくした場合、消費電力は大きくなるが応答速度や駆動力は向上させることができる。 Although the response speed and the driving force of the operational amplifier is reduced, and power consumption can be suppressed, when increasing the current supplied to the output stage Conversely, that power consumption is larger, but the response speed and the driving force is improved it can.

【0014】以上のようなことから、オペアンプの出力段に供給される電流を数段階に切り換えることによって、オペアンプを内蔵する半導体装置の使用される状況に応じ、応答速度や駆動力、消費電力といったオペアンプの特性を設定することが可能となる。 [0014] Since the above as, by switching the current supplied to the output stage of the operational amplifier in several stages, depending on the context in which it is used in a semiconductor device incorporating an operational amplifier, the response speed and driving force, such as power consumption it is possible to set the properties of the operational amplifier.

【0015】 [0015]

【発明の効果】以上述べたように本発明によれば、オペアンプの出力段に供給される電流の大きさを数段階に切り換えることが可能となり、オペアンプの特性を低消費電力なものにしたり、応答速度性や駆動能力の優れたものにしたりすることができるようになる。 According to the present invention as described above, according to the present invention, it is possible to switch the magnitude of the current supplied to the output stage of the operational amplifier in several stages, or the characteristics of the operational amplifier to the low-power ones, it is possible or the excellent response speed property and drivability. これにより、 As a result,
一つの半導体装置上でその半導体装置のアプリケーションにあわせたオペアンプの特性を設定できるようになる。 It becomes possible to set the properties of the operational amplifier together on a single semiconductor device on the application of the semiconductor device.

【図面の簡単な説明】 BRIEF DESCRIPTION OF THE DRAWINGS

【図1】本発明によるオペアンプの実施例を示す回路図である。 1 is a circuit diagram showing an embodiment of an operational amplifier according to the present invention.

【図2】本発明によるオペアンプの実施例を示すブロック図である。 Is a block diagram showing an example of an operational amplifier according to the invention, FIG.

【図3】従来のオペアンプの実施例を示すための回路図である。 3 is a circuit diagram for showing an example of a conventional operational amplifier.

【符号の説明】 DESCRIPTION OF SYMBOLS

101・・・オペアンプ差動段 102・・・差動増幅段定電流源 103・・・オペアンプ差動増幅段 104・・・非反転入力 105・・・反転入力 106・・・オペアンプ出力段 107・・・定電流選択信号1 108・・・定電流選択信号2 109・・・出力段定電流源1 110・・・出力段定電流源2 111・・・PMOSトランジスタによる定電流源スイッチ1 112・・・PMOSトランジスタによる定電流源スイッチ2 113・・・定電流源選択レジスタ 114・・・定電流源選択レジスタ 115・・・オペアンプ出力 201・・・オペアンプ 202・・・定電流源スイッチ 203・・・定電流源選択レジスタ 204・・・入出力ポート 205・・・CPU 206・・・プログラムROM 301・・・差動増幅段定電 101 ... operational amplifier differential stage 102 ... differential amplifier stage constant current source 103 ... op amplifier stage 104 ... non-inverting input 105 ... inverting input 106 ... operational amplifier output stage 107, · constant current selection signal 1 108, ... constant current selection signal 2 109 constant current source according ... output stage constant current source 1 110 ... output stage constant current source 2 111 ... PMOS transistor switch 1 112, · a constant current source by the PMOS transistor switch 2 113, ... a constant current source selection register 114 ... constant current source select register 115 ... op amp output 201 ... operational amplifier 202 ... constant current source switch 203 .. and constant current source selection register 204 ... output port 205 ... CPU 206 ... program ROM 301 ... differential amplifier stage constant- 源 302・・・出力段定電流源 303・・・オペアンプ差動増幅段 304・・・オペアンプ出力段 305・・・非反転入力 306・・・反転入力 307・・・オペアンプ出力 Source 302 ... output stage constant current source 303 ... op amplifier stage 304 ... operational amplifier output stage 305 ... non-inverting input 306 ... inverting input 307 ... op amp output

Claims (2)

    【特許請求の範囲】 [The claims]
  1. 【請求項1】 a)単一半導体基盤上に、 b)オペアンプと、 c)前記オペアンプの出力段に接続される複数の定電流源を有し、 d)前記複数の定電流源のうち、1つ以上の定電流源が選択的に前記オペアンプの出力段に接続される手段を有することを特徴とする半導体装置。 To the claim 1: a) on a single semiconductor substrate, b) an operational amplifier and, c) a plurality of constant-current source connected to the output stage of the operational amplifier, d) of said plurality of constant current sources, wherein a one or more constant current source having a means which is selectively connected to an output stage of the operational amplifier.
  2. 【請求項2】 a)プログラム命令を記憶するメモリ装置と、 b)前記プログラム命令に基づき順次出力する制御手段を有し、 c)前記制御手段に基づいて、前記複数の定電流源のうち、1つ以上の定電流源を選択的に前記オペアンプの出力段に接続される手段を有することを特徴とする請求項1記載の半導体装置。 2. A memory device for storing a) program instructions, b) a control means for sequentially outputting based on the program instructions, c) on the basis of said control means, said plurality of constant current sources, one or more semiconductor device according to claim 1, characterized in that it comprises a means which is selectively connected to an output stage of the op amp constant current source.
JP3217058A 1991-08-28 1991-08-28 Semiconductor device Pending JPH0555842A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3217058A JPH0555842A (en) 1991-08-28 1991-08-28 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3217058A JPH0555842A (en) 1991-08-28 1991-08-28 Semiconductor device

Publications (1)

Publication Number Publication Date
JPH0555842A true JPH0555842A (en) 1993-03-05

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Family Applications (1)

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JP3217058A Pending JPH0555842A (en) 1991-08-28 1991-08-28 Semiconductor device

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US6854067B1 (en) 2000-10-30 2005-02-08 Cypress Semiconductor Corporation Method and system for interaction between a processor and a power on reset circuit to dynamically control power states in a microcontroller
US8149048B1 (en) * 2000-10-26 2012-04-03 Cypress Semiconductor Corporation Apparatus and method for programmable power management in a programmable analog circuit block
US8358150B1 (en) 2000-10-26 2013-01-22 Cypress Semiconductor Corporation Programmable microcontroller architecture(mixed analog/digital)
US8370791B2 (en) 2001-11-19 2013-02-05 Cypress Semiconductor Corporation System and method for performing next placements and pruning of disallowed placements for programming an integrated circuit
US9720805B1 (en) 2007-04-25 2017-08-01 Cypress Semiconductor Corporation System and method for controlling a target device
US9766650B2 (en) 2000-10-26 2017-09-19 Cypress Semiconductor Corporation Microcontroller programmable system on a chip with programmable interconnect

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9843327B1 (en) 2000-10-26 2017-12-12 Cypress Semiconductor Corporation PSOC architecture
US8149048B1 (en) * 2000-10-26 2012-04-03 Cypress Semiconductor Corporation Apparatus and method for programmable power management in a programmable analog circuit block
US8358150B1 (en) 2000-10-26 2013-01-22 Cypress Semiconductor Corporation Programmable microcontroller architecture(mixed analog/digital)
US10261932B2 (en) 2000-10-26 2019-04-16 Cypress Semiconductor Corporation Microcontroller programmable system on a chip
US9766650B2 (en) 2000-10-26 2017-09-19 Cypress Semiconductor Corporation Microcontroller programmable system on a chip with programmable interconnect
US10020810B2 (en) 2000-10-26 2018-07-10 Cypress Semiconductor Corporation PSoC architecture
US10248604B2 (en) 2000-10-26 2019-04-02 Cypress Semiconductor Corporation Microcontroller programmable system on a chip
US6854067B1 (en) 2000-10-30 2005-02-08 Cypress Semiconductor Corporation Method and system for interaction between a processor and a power on reset circuit to dynamically control power states in a microcontroller
US8370791B2 (en) 2001-11-19 2013-02-05 Cypress Semiconductor Corporation System and method for performing next placements and pruning of disallowed placements for programming an integrated circuit
US9720805B1 (en) 2007-04-25 2017-08-01 Cypress Semiconductor Corporation System and method for controlling a target device

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