JPH0555270A - Charge transfer device - Google Patents

Abstract

PURPOSE:To transfer charge at a high speed without imprudently reducing the length of a transfer electrode in a transferring direction by depleting a P-type diffused layer under a channel. CONSTITUTION:A P-type diffused layer 2, an N-type diffused layer 3 for forming a channel and P-type diffused layers 4, 5, 6 for preventing the reverse flow of a transfer charge are sequentially formed on an N-type semiconductor substrate 1. Then, transfer electrodes 7-13 are formed through an insulating film 14. The layer 2 is depleted to reduce a diffusion capacity. Thus, the high speed transfer of a charge transfer device can be performed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a charge transfer device,
In particular, it relates to high-speed transfer of charges.

[0002]

2. Description of the Related Art In a conventional charge transfer device, as shown in FIG. 5, a P-type diffusion layer 32, an N-type diffusion layer 3 for forming a channel, and a P-type diffusion for preventing backflow of charges are formed on an N-type semiconductor substrate 1. Layer 4
6 to 6 and further has transfer electrodes 7 to 13 via the insulating film 14 on the surface.

Next, the operation will be described. Assuming that a high level voltage is applied to Φ ₁ and a low level voltage is applied to Φ ₂ , the charges are transferred to the N-type diffusion layer 3 and the P-type diffusion layer 3 below the transfer electrode 9.
It is stored in the junction capacitance C _{31 of} 2. Then low level to Φ ₁ ,
When a high-level voltage is applied to Φ ₂ , the charge accumulated in the junction capacitance C ₃₁ passes through the channel below the transfer electrode 10 and the junction capacitance between the N-type diffusion layer 3 and the P-type diffusion layer 32 below the transfer electrode 11 is transferred. It is stored in C ₃₂ . At this time, since the P-type diffusion layer 4 is formed under the transfer electrode 8 having the same potential as the transfer electrode 9, the potential under the transfer electrode 8 is always the transfer electrode 9.
The potential becomes shallower than the lower potential, and the charges accumulated under the transfer electrode 9 are prevented from flowing back to the transfer electrode 7 side.

[0004] Now, if the time required to transfer the charges accumulated in the junction capacitance C31 in the junction capacitance C32 and t ₃

[0005]

C ₃₁ is an N-type diffusion layer 3 and a P-type diffusion layer 32.
When the depletion layer width d ₃ between the

[0007]

[0008] Therefore, from (1) and (2)

[0009]

Therefore, the transfer rate is inversely proportional to the depletion layer width.

[0011]

In this conventional charge transfer device, the P-type diffusion layer 32 under the transfer electrode is not depleted and the width of the depletion layer is as small as about 2 μm, so that high-speed transfer of charges cannot be performed. There was a problem.

[0012]

In the charge transfer device of the present invention, the P-type diffusion layer under the channel is depleted, so that the length of the transfer electrode in the transfer direction is not unnecessarily reduced, and the charge transfer It is characterized by enabling high-speed transfer.

[0013]

The present invention will be described below with reference to the drawings. FIG. 1 is a sectional view of an embodiment of the present invention. On the N-type semiconductor substrate 1, a P-type diffusion layer 2, an N-type diffusion layer 3 for forming a channel 3, P-type diffusion layers 4 to 6 for preventing backflow of transfer charges are formed, and an insulating film 14 on the surface is interposed. Transfer electrode 7-
13 is formed. The concentration of the N-type semiconductor substrate 1 is 2
× 10 ¹⁴ cm ^-3 , the concentration of the P-type diffusion layer is about 1/2 that of the conventional one, 5 × 10 ¹⁴ cm ^-3 , and the concentration of the N-type diffusion layer 3 is 2 × 10 ^16.
cm ^-3 . Further, the junction depth between the N-type semiconductor substrate 1 and the P-type diffusion layer is 8 μm, and the junction depth between the P-type diffusion layer 2 and the N-type diffusion layer 3 is 4 μm, which is the same as the conventional one.

Next, the operation will be described. 2 is a timing chart, and FIG. 3 is a charge transfer device (FIG. 3 (a)).
And its potential (Fig. 3 (b), (c), (d))
FIG. Now, at t = T ₁ , a voltage of 5v is applied to Φ ₁ and Φ ₂ is Ov. At this time, the charge Q is accumulated in the junction capacitance C ₁ below the transfer electrode 9, as shown in FIG. Next, when t = T ₂ (FIG. 3C), Φ ₁ is in a state where a voltage of 1v and Φ ₂ is in a state of 4v, and the electric charge Q accumulated in the junction capacitance C ₁ at this time is It is transferred under the transfer electrode 10 to the junction capacitance C ₂ under the transfer electrode 11. When t = T ₃ , FIG.
As shown in (d), a voltage of Ov is applied to Φ _{1 and} a voltage of 5 v is applied to Φ ₂ , and the charge Q is completely connected to the junction capacitance C.
Accumulated in ₂ .

Here, when t = T ₂ , that is, when the charge Q is transferred from the junction capacitance C ₁ to the junction capacitance C ₂ , the P-type diffusion layer 2 is depleted, and the depletion layer width d is about 9 μm. ，
It is about 5 times that of the conventional case.

Generally, when the transfer time is T and the capacity is C,

[0017]

Therefore, in this embodiment, the transfer time is about 5
It is reduced by a factor of 1. Therefore, high-speed transfer which is 5 times faster than the conventional one is possible.

FIG. 4 is a sectional view of another embodiment of the present invention.

In this embodiment, the concentration of the P-type diffusion layer 22 was 1 × 10 ₁₅ cm _-3 , which is the same as the conventional one.
The junction surface between 2 and the N-type semiconductor substrate 1 is 6 μm, which is shallower than the conventional one. Also in this case, the P-type diffusion layer 32 is depleted, and the width of the depletion layer is about 6 μm, so that high-speed transfer which is about three times that of the conventional one can be performed.

[0021]

As described above, the present invention has the effect of depleting the P-type diffusion layer below the transfer channel, thereby reducing the capacitance at the bottom of the transfer channel and enabling high-speed transfer of charges. ..

[Brief description of drawings]

FIG. 1 is a sectional view of an embodiment of the present invention.

FIG. 2 is a timing chart for explaining an operation.

FIG. 3 is a potential diagram.

FIG. 4 is a sectional view of another embodiment of the present invention.

FIG. 5 is a sectional view of a conventional example.

[Explanation of symbols]

 1 N-type semiconductor substrate 2,22,32 P-type diffusion layer 3 N-type diffusion layer 4,5,6 P-type diffusion layer 7 to 13 Transfer electrode 14 Insulating film

Claims (1)

[Claims] 1. A second conductivity type layer having a second conductivity type layer on a first conductivity type semiconductor substrate, and a second first conductivity type different from the first conductivity type semiconductor substrate on the second conductivity type layer. In a charge transfer device having a layer and a transfer electrode on the second first conductivity type layer via an insulating film, the second conductivity type layer below the second first conductivity type layer is depleted. A charge transfer device characterized in that