JPH0554315B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application This invention relates to a high-speed video system in which a high-speed phenomenon is imaged using a television camera and the imaged output is recorded on, for example, a VTR, in which a video signal is recorded on the VTR. The present invention relates to a video signal generator suitable for use as a video signal generator.

BACKGROUND TECHNOLOGY AND PROBLEMS Conventionally, high-speed film cameras have been used as devices for capturing and recording high-speed phenomena, but they have had the drawback of not being able to reproduce images instantly. In order to compensate for this drawback, various research and developments have been carried out to capture images of high-speed phenomena using a television camera and record them on a VTR or the like to enable immediate reproduction.

The applicant previously proposed a new high-speed video system using this television camera and VTR.

FIG. 1 shows a system diagram of an example of the basic configuration of a video signal generating apparatus in this system, which converts the speed of a high-speed video signal from a television camera and obtains a video signal suitable for recording on a VTR.
In the figure, reference numeral 1 denotes a color camera having, for example, three image pickup tubes, which operates at a scanning speed N times the normal scanning speed. In this example, the scanning speed is, for example, tripled. Therefore, the red from this color camera 1,
Each of the green and blue primary color signals has a frequency band three times that of a normal scanning speed color camera. The output signal band of a normal color camera is
Since the frequency is about 6 MHz, the output signal of this color camera 1 has a band of 18 MHz or more. In addition, since the scanning speed of the output signal of the color camera 1 is 3x, three fields of video signals are generated in one field period of a standard television signal, that is, in the case of an NTSC color video signal, a period of 1/60 second. It will be destroyed.

The three primary color signals R, G and B from this color camera 1 are sent to preamplifiers 2R, 2G and 2, respectively.
A luminance signal Y and red and blue color difference signals R-Y and B-Y are supplied to the matrix circuit 3 through the speed conversion circuits 4Y and B, respectively.
Supplied to 4R and 4B. These speed conversion circuits 4Y, 4R, and 4B convert a triple speed signal into a normal scanning speed signal.
Since the circuits Y, 4R, and 4B have the same configuration, the speed conversion circuit 4Y will be explained as a representative, and the others will be omitted.

That is, FIG. 2 shows an example of the configuration of this speed conversion circuit 4Y, in which the luminance signal Y through the input terminal 41 is passed through the low-pass filter 42 and sent to the A/D conversion circuit 43.
supplied to The low-pass filter 42 is used to limit the signal band, and in this example has a characteristic that allows signals of 20 MHz or less to pass. Further, the A/D conversion circuit 43 performs sampling at a rate three times faster than when sampling the output luminance signal from a color camera having a normal scanning rate. The sampling rate of a normal video signal is
Since it is about 6 MHz, for example, about 14.3 MHz (4 _SC ) or 13.5 MHz is usually used in consideration of the color subcarrier frequency _SC . In this example, the sampling rate in the A/D conversion circuit 43 is three times that value, so approximately 42.9MHz or 40.5MHz is selected.

In this example, the sampling rate is 40.5MHz, and this 40.5MHz clock signal _CKN is
The luminance signal Y is supplied to a D conversion circuit 43, and the luminance signal Y is converted into a digital signal of, for example, 8 bits per sample.

Specifically, the speed conversion circuit 4Y has N field memory circuits, that is, three field memory circuits each having a capacity for one field, and sequentially writes high-speed video signals for one field to these three field memory circuits. At a sampling rate of 1/3, three channels are read out in parallel and converted to a normal speed signal.

In other words, 44 ₁ , 44 ₂ , 44 ₃ are each 1
Field memory with capacity for field, A/
A high-speed digital luminance signal from the D conversion circuit 43 is supplied to these field memories 44 ₁ , 44 ₂ , 44 ₃ . And write address setting circuit 4
Write address signals ADW ₁ , ADW ₂ ,
ADW ₃ has each field memory 44 ₁ , 4
4 ₂ and 44 ₃ as well as a read address signal from the read address setting circuit 46.
ADR ₁ , ADR ₂ , and ADR ₃ are supplied to field memories 44 ₁ , 44 ₂ , and 44 ₃ , respectively. The write address signal setting circuit 45 is supplied with a clock signal CK _N of 40.5 MHz, three times the normal speed, to form write address signals ADW ₁ to ADW ₃ that change at three times the normal speed. On the other hand, the read address setting circuit 46 has a 13.5MHz
A normal speed clock signal _CKO is supplied to form address signals ADR ₁ -ADR ₃ that change at normal speed. These field memories 44 ₁ , 44
In the memory access operation of _2.2 and _44.3 , writing and reading are performed in a time-division manner, and it appears that writing and reading can be performed simultaneously. That is, as shown in FIG. 3, a high-speed digital luminance signal DV (FIG. 3A) is sequentially written into the field memories 44 ₁ , 44 ₂ , 44 ₃ for each field by a write signal from the write address setting circuit 45. However, since it is a triple-speed signal, as is clear from Figure 3 B, F, and J, the writing timing is 1/3 of one field period FS of a normal-speed television signal (high-speed video This results in a delay of one field period of the signal). This is done, for example, by sequentially switching the memories 44 ₁ , 44 ₂ , 44 ₃ every 1/3 period F ₁ , F ₂ , F ₃ of one field period FS. The same address is repeatedly set during 1/3 periods F ₁ , F ₂ , and F ₃ . Therefore, since the address signals ADW ₁ , ADW ₂ and ADW ₃ are the same, they are common to the three field memories 44 ₁ to 44 ₃ , and the address signals ADW ₁ to 44 ₃ are the same. The write period may be switched as described above. And Figure 3B,
As shown in F and J, in the first 1/3 period F ₁ of the period FS, the odd field signal O ₁ of the high-speed television signal is written in the field memory 44 ₁ , and in the next 1/3 period F ₂ Even field signal _E1 of the high-speed video signal is stored in field memory 4.
_Furthermore , in the next 1/3 period _F3 , the video signal _O2 of the odd field next to the high-speed video signal is written to the field memory ₄₄₃ ,
This will be repeated one after another.

Then, at the same time as the high-speed video signal is written, the written signal is immediately sequentially read out from each field memory at 1/3 the speed.

Therefore, the read address signals ADR ₁ , ADR 2 , ADR ₂ , supplied to each field memory 44 ₁ , 44 ₂ , 44 ₃ from the read address setting circuit 46
In ADR ₃ , the same address data is sequentially supplied with a shift of 1/3 of the period FS. Therefore, as shown in FIGS. 3B, F, and J, the signals read from the field memories 44 ₁ , 44 ₂ , and 44 ₃ are obtained with a shift of 1/3 FS from each other. The digital luminance signals read out in parallel from these three channels are each D/
It is returned to the original analog luminance signal in A conversion circuits 47 ₁ , 47 ₂ , 47 ₃ and sent to output terminals 48 1 , 47 ₃ , respectively.
48 ₂ and 48 ₃ .

In this way, in the speed conversion circuits 4Y, 4R, and 4B, the high-speed luminance signal Y and the red and blue color difference signals RY and B-Y are converted into the luminance signals Y ₁ , Y ₂ , Y of three normal speed channels, respectively. ₃ , red and blue color difference signals R-Y ₁ , R-Y ₂ , R-Y ₃ and B-Y ₁ , B
−Y ₂ and B−Y ₃ are obtained. Note that the color difference signals obtained from the circuits 4R and 4B are lower than the luminance signal band as usual, and have a narrow band of, for example, 0.5 MHz.
The following signals are considered.

The luminance signal of the first channel obtained in this way
Y ₁ , red and blue color difference signals R-Y ₁ and B-Y ₁ are sent to the encoder 5 ₁ of the first channel, luminance signal Y ₂ of the second channel, red and blue color difference signals R-Y ₂ and B- Y ₂ is the encoder 5 ₂ of the second channel,
The luminance signal Y ₃ of the third channel and the red and blue color difference signals R-Y ₃ and B-Y ₃ are respectively supplied to the encoder 5 ₃ of the third channel, and the encoders 5 ₁ , 5 ₂ and ₅₃ , NTSC composite color video signals are obtained at output terminals ₆₁ , ₆₂ , and _63, respectively, as will be described later.

In this case, the signals of each of the three parallel channels are obtained in field units as described above. For example, as shown in Figure 3A, a high-speed video signal for three fields read out in one field period FS is obtained. The video signal for the first field is sent to the output terminal ₆₁ as the first channel signal.
The second video signal for one field is obtained as a second channel signal at the output terminal ₆₂ , and the third video signal for one field is obtained as a third channel signal at the output terminal ₆₃ . Ru. Since the sampling rate of each channel signal is set to 1/3, the signal becomes a normal speed video signal. Therefore, the output terminals 6 ₁ , 6 ₂ ,
The color video signals obtained at 6.6 _{and 3} respectively are approximately equal to the color video signals from a television camera at a normal scanning speed. However, in this case, the output terminal 6 ₁ ,
The signals obtained at each of 6 ₂ and 6 ₃ are the signals of every third field of the high-speed video signal, that is, the signal obtained at the output terminal 6 ₁ is, for example, the signal of the fourth field after the video signal of the first field. This is followed by the 7th field, then the 10th field, and so on intermittently in terms of the field order of high-speed video signals. However, the video signal itself is exactly the same as a normal one.

In this way, according to the circuit shown in Figure 1, the television signal obtained by imaging with a high-scanning television camera is converted in speed, and three channels of signals at the same speed as the standard television signal can be obtained in parallel. Become.

Therefore, the signals of each parallel channel can be processed in the same way as normal speed signals.

Note that when the scanning speed of the color camera 1 is set to N times the normal scanning speed as in this example, if the value of N is an odd number, the output terminals 6 ₁ , 6 ₂ , 6 of each channel The signal obtained at ₃ is a signal that alternates between odd field O, even field E, odd field O, and even field E. In other words, if the scanning speed of the color camera 1 is increased to an even number, for example, 4 times the scanning speed, an output signal will be extracted in parallel for every 4 fields of the high-speed video signal. The output signals of each channel obtained in the field period FS are, for example, if the first channel is an odd field O, the second channel is an even field E, the third channel is an odd field O, and the fourth channel is an even field E. In the next one field period FS, it will be odd number O, even number E, odd number O, even number E, so the first
The video signal of the channel is always odd field O, the video signal of the second channel is always even field E, etc., and the signal of each channel is a signal in a different form from a normal television signal considering interlacing. is obtained. On the other hand, in the case of an odd number multiplier, for example, 3 times the speed as in this example, as shown in FIG. The channel will be an odd field O, and in the next one field period FS, the first channel will be an even field E, the second channel will be an odd field O, the third channel will be an even field E, and so on. , even number E, odd number O, and even number E are arranged alternately.

By the way, in a color video signal, in order to make the bright and dark dot interference caused by the color subcarrier component along the scanning line inconspicuous, the frequency of the color subcarrier has a predetermined relationship with the horizontal frequency. In the case of an NTSC color video signal, a so-called 1/2 line offset relationship is established, and the phase of the color subcarrier with respect to the scanning line of each field is repeated at a period of four fields. In other words, if it is set to 0° at the beginning of the first field in this 4-field unit, then the second
At the beginning of the field it is 270°, at the beginning of the third field it is 180°, at the beginning of the fourth field it is 90°, and at the beginning of the next four fields it is 270°.
In the field, the relationship returns to 0°.

However, as mentioned above, the signal of each channel of the three parallel channels is the first channel of the high-speed video signal.
~ The 4th field is not arranged sequentially, but the 3rd field
As shown in the figures and FIG. 5, the order of the first to fourth fields is the order of the first, fourth, third, and second fields. Therefore, if the encoders 5 ₁ , 5 ₂ , and 5 ₃ of each channel directly modulate the color difference signal based on the continuous color subcarrier, the fourth field and the second field are originally The phases that should be 90° and 270° end up being 270° and 90°, which are 180° out of phase, as shown in FIG. 3C, G, and K, respectively. Therefore, the color subcarrier signals supplied to each encoder 5 ₁ , 5 ₂ , 5 ₃ need to have their phases reversed in their fourth and second fields. As is clear from Figures 3 and 5,
Since the signals of each channel are fields in which the phase of the color subcarrier differs at the same point in time, in principle, a circuit is provided to obtain the reference color subcarrier for each channel, and each of the reference color subcarriers is As described above, the signals are inverted at the second and fourth fields for each channel.

Incidentally, in the above example, the signals of three parallel channels are delayed by a period of 1/3 FS (1/3 field) and are obtained at the output terminals 6 ₁ , 6 ₂ , 6 ₃ . If the phase of the color subcarrier within one field is 0° at the beginning of that field, it will be 90° after 1/3 field has elapsed, and 180° after 1/3 field has elapsed. It is. Therefore, with respect to the beginning of the signal of one field of the first channel, the beginning of the signal of one field of the second channel is delayed by 90 degrees as shown in FIGS. It is 180° as shown in J and K of the same figure.
I'll be late. Then, as is clear from B, C, F, G, J, and K in the same figure, the first signal of each channel is
~The signals of the fourth field have exactly the same phase relationship. Therefore, without preparing a reference color subcarrier for each channel, only a reference color subcarrier common to the three channels is prepared, and this is used for each channel at the time points of the second field and the fourth field. If the phase is inverted at , the desired result will be obtained.

A configuration that achieves the above is shown in FIG. That is, 71 is a reference color subcarrier frequency signal generation circuit, and a 3.58 MHz color subcarrier frequency signal from this and a signal whose phase is inverted by a 180° phase shift circuit 72 are sent to the selector 7 of each channel.
3 ₁ , 73 ₂ , and 73 ₃ respectively. These selectors 73 ₁ , 73 ₂ , 73 ₃ are provided with select signals SE ₁ , SE ₂ , SE ₃ (Fig. 3 D, H, L), respectively.
is supplied from each selector 73 ₁ , 73 ₂ , 73 ₃ to the first field and the third field in each channel.
During the field period, the color subcarrier from the generation circuit 71 is obtained as is, and the second and fourth fields
During the field, a phase-inverted color subcarrier from the phase shift circuit 72 is obtained, respectively. The signals from these selectors 73 ₁ , 73 ₂ , 73 ₃ are supplied to NTSC encoders 5 ₁ , 5 ₂ , 5 ₃ and burst signal forming circuits 74 1 , 73 ₃ .
74 ₂ , 74 ₃ to form burst signals SB ₁ , SB ₂ , SB ₃ for each channel, and these burst signals SB ₁ , SB ₂ , SB ₃ are sent to encoders 5 ₁ , 5 ₂ , 5 ₃ respectively. supplied to encoder 5
₁ , ₅₂ , and ₅₃ are well known. For example, to explain the first channel encoder ₅₁ , the first channel red and blue color difference signals RY1 and _RY from the speed conversion circuits 4R and 4B are B-
Y ₁ is supplied to the balanced modulation circuits 51 and 52, respectively, while the color subcarrier signal from the selector 73 ₁ is supplied to the balanced modulation circuit 51 through the 90° phase shift circuit 53.
At the same time, the color subcarrier signal from the selector 73 ₁ is supplied as it is to the balanced modulation circuit 52, where it is balanced modulated with red and blue color difference signals in the balanced modulation circuits 51 and 52, respectively. The modulated signals from these balanced modulation circuits 51 and 52 are combined in a combining circuit 54, and the combined output is supplied to a combining circuit 56 through an amplifier 55. Also,
This synthesis circuit 56 is supplied with a luminance signal SY ₁ through an amplifier 57, a burst signal SB ₁ from a burst signal forming circuit 74 ₁ , and a synchronization signal SS, and the output terminal 6 ₁ from this synthesis circuit 56 is supplied with the NTSC signal of the first channel. A color video signal can be obtained.

Similarly, NTSC color video signals of the second and third channels are obtained at the output terminals 6 ₂ and 6 ₃ .

These three channel signals are processed using the following special
For example, by recording a pattern in SMPTE type C format using a VTR and playing it back on a normal VTR that can play back recording tapes in this format, high-speed phenomena can be viewed as a reproduced image in slow motion. be able to.

Figure 6 shows an example of a special VTR rotary head device, in which the number of channels, that is, three rotary heads H ₁ , H ₂ , and H ₃ are arranged at equal angular intervals, that is, 120°.
On the other hand, the tape 8 is wound around the circumferential surface of the guide drum 7 in an Ω shape over a predetermined angle, for example, 344°, and these three heads H ₁ ,
H ₂ and H ₃ make it possible to sequentially record three parallel channels of video signals.

In this case, a VTR with this rotating head device
is designed to record in SMPTE Type C format, so the rotational speed of the rotating head is
The speed is one revolution per field of the NTSC standard television signal, the same as in a VTR recording in the normal SMPTE Type C format, but the tape speed is tripled in this case. Since the tape speed is tripled, the angle of inclination of the track with respect to the longitudinal direction of the tape is different from that of the SMPTE type C format. This can be made to match that of the SMPTE type C format by adjusting the angle at which the tape 8 is wound diagonally around the drum 7 (so-called still angle).

In FIG. 7, Tc is a control signal track, and Ts is a recording track of a synchronization signal. In this way, the head can be opened as shown in Figure 7.
Every third track T ₁₁ , T ₁₂ , T ₁₃ ... by H ₁
... is formed, the head H ₂ forms every third track T ₂₁ , T ₂₂ , T ₂₃ ... at the adjacent position, and the head H ₃ forms the remaining every third track T ₃₁ , T ₃₂ , T ₃₃ ... are formed. In this case, since the tape speed is triple speed, the tape will shift by one track in the SMPTE type C format from when head _H1 starts scanning until when head _H2 starts scanning. In other words, the pitch of the recording track is also the same as that of the SMPTE Type C format, and completely matches the SMPTE Type C format.

With such a VTR, output terminals 6 ₁ , 6 ₂ ,
For example, the FM modulated signal of the video signal obtained at terminal ₆₁ is sent to head _H1 , and the FM _modulated signal of the video signal obtained at terminal ₆₂ is sent to head H1. ₂ , if the FM modulated signal of the video signal obtained at the terminal ₆₃ is recorded by the head _H3 , the video signal for each field is sequentially recorded on one track _T11 , _T21 , _T31 , _T12 ,
They will be recorded as T ₂₂ , T ₃₂ , etc. In this case, when recording the signals obtained at the output terminals 6 ₁ , 6 ₂ , 6 ₃ on the VTR, the head angle interval is
That is, it is made to shift by a period of 1/3 of one field period FS.

As mentioned above, if a tape recorded in this way is played back using a normal VTR (using one rotating head) that can play back tapes recorded in the SMPTE Type C format, the playback speed will be three times that of a normal VTR. An image at a speed of be.

In this case, since the phase of the color subcarrier in the reproduced color video signal is the correct phase suitable for each field as described above, a beautiful reproduced color image can be obtained.

As mentioned above, this device is not limited to the case where the scanning speed of the color camera 1 is 3 times the speed, but in particular, if the scanning speed of the color camera 1 is set to 5 times the speed and the signals of 5 parallel channels are obtained as output. , the order of the first to fourth fields of each channel is as shown in FIG. 8, although the arrangement phase is different.
The fields will line up correctly. Therefore, in the case of this 5x speed and 5 channels, 5 color subcarriers with a phase shift of 360°/5 must be prepared for each channel and supplied as is to the encoder for each channel. I can do it. That is, the color subcarriers of each channel may be of continuous phase.

Note that this device is applicable not only to NTSC color television signals but also to PAL signals, for example. However, in the case of the PAL system, the phase of the color subcarrier must be considered in units of the first to eighth fields.

Incidentally, at a broadcasting station, usually a plurality of television cameras are installed, and the plurality of television cameras are switched on a main adjustment console while viewing a monitor image of each television camera and used for broadcasting. It is a multi-camera system. In this multi-camera system, in order to prevent synchronization disturbances and color shifts when switching the signals from each TV camera, the broadcasting station uses the standard video signal, that is, the internal synchronization signal, as well as the output signal from each TV camera. A so-called genlock control is used to synchronize the two.

In such a multi-camera system at a broadcasting station, it would be very convenient if the above-described high-speed video signal generator could be used as one of the television cameras.

In this case, as described above, this high-speed video signal generator also needs to be synchronized with an external synchronization signal, and its imaging output must be supplied to a monitor receiver so that the captured image can be monitored. In this case, in the above example, it is conceivable that one channel of the three parallel channels of video signals obtained at the output terminals 6 ₁ to 6 ₃ is used as the video output of the normal speed television camera. However, as is clear from the above explanation, although the output signal of the parallel N channels of the high-speed video system is converted to the speed from a normal television camera, it is
When the output signal of each channel is recorded and played back on a VTR, the field order and color subcarrier phase are changed and encoded to match the standard television signal. It is a signal of a different form from that of a signal. Therefore, when using this high-speed video signal generator as a multi-camera system at a broadcasting station, first, a special receiver is used as a monitor receiver to monitor the output from the high-speed video signal generator. Furthermore, there is a disadvantage in that a special control device must be used to lock the video signal from the high-speed video signal generator to an external synchronization signal.

Purpose of the Invention In view of the above points, the present invention allows the use of an ordinary monitor receiver of the current system, and can be used as one TV camera in a multi-camera system at a broadcasting station without using any special equipment for genlock. The purpose of the present invention is to provide a high-speed video signal generation device that can generate high-speed video signals.

Summary of the Invention This invention provides, for example, as shown in FIG.
The scanning speed is the standard scanning speed N (N is an integer greater than or equal to 2)
The speed converting circuit 40 has a double television camera 10 and a memory, and an output signal is delayed by τ _V with respect to an input signal. A high-speed video signal is written at a high-speed sampling rate, and when reading from this memory, the sampling rate is reduced to 1/N, and N channels are read out from this memory in parallel, so that the output of the speed conversion circuit 40 has N channels. In the video signal generation device, the video signal of at least one channel of the standard scanning speed video signal outputted from the speed conversion circuit 40 is obtained in a predetermined manner. an encoder 80 which converts the standard color television signal into a color video signal conforming to the standard color television signal, and whose output signal is delayed by τ _E with respect to the input signal; and a first encoder 80 which operates in synchronization with an external synchronization signal. Synchronous circuit 1
01, and a phase control circuit 105 that controls the phase of the external synchronization signal to advance by (τ _V +τ _E );
The second synchronization circuit 10S operates the television camera 10 in synchronization with the output of the phase control circuit 105.

Embodiment Hereinafter, an example of the apparatus of this invention will be described with reference to FIG. 9 and subsequent figures.

FIG. 9 shows a system diagram of an example of the apparatus of the present invention, and parts corresponding to those in the example of FIG. 1 are given the same reference numerals.

In the figure, reference numeral 10 denotes a high-speed television camera device, which includes a television camera 1 whose scanning speed is, for example, three times as fast as that of a normal television camera in the example shown in FIG.
It includes preamplifiers 2R, 2G, 2B and a matrix circuit 3. Therefore, this television camera device 1
0, the luminance signal Y and the red and blue color difference signals RY and BY are obtained as described above.

The signal from this television camera device 10 is supplied to a speed conversion device 40 having speed conversion circuits 4Y, 4R and 4B as in the example shown in FIG.
The red and blue color difference signals R-Y and B-Y are converted into normal speed signals and simultaneously converted into three-channel parallel signals, which are sent to the encoders 5 ₁ , 5 ₂ and 5 _{3 .}
are supplied to an NTSC encoder device 50 having an encoder 5 ₁ . At 5 ₂ and 5 ₃ , the NTSC color composite video signal is output to the output terminals 6 _{1 and} 5 3.
6 ₂ and 6 ₃ will be obtained. In this case, the color subcarrier frequency signal from the color subcarrier frequency signal generation circuit 71 provided in the timing signal generation circuit 100 is transmitted to the 180° phase shift circuit 72 and the selectors 73 _{1 , 73 2 , 73 3 and the selectors 73 1} , 73 ₂ , 73 ₃ and The burst signal is supplied to a color subcarrier control circuit 70 having burst signal forming circuits 74 ₁ , 74 ₂ , 74 ₃ .
The color subcarrier signal changed to the appropriate phase as the color subcarrier of each channel from the encoder 5 ₁ .
5 ₂ and 5 ₃ respectively, and in the same way as the example in Figure 1, each channel is not a standard television signal, but the signal of each channel is recorded on a special VTR and recorded. When played,
Each signal is encoded into a standard television signal. Note that the synchronization signal SS from the synchronization signal generation circuit 101 provided in the timing signal generation circuit 100 is supplied to each encoder 5 ₁ , 5 ₂ , and 5 ₃ and added to each encode output. The above is exactly the same as the example in FIG.

In this example, for example, the luminance signal Y ₁ of the first channel, the red and blue color difference signals R-Y ₁ and B-
Y ₁ is provided to the NTSC encoder 80. The encoder 80 is supplied with the color subcarrier frequency signal as it is from the color subcarrier signal generation circuit 71 and is also supplied to the burst signal generation circuit ₇₄₀ to form a burst signal, which is then supplied to the encoder 80. . Also, the synchronization signal SS from the synchronization signal generation circuit 101 is transmitted to this encoder 8.
0. Therefore, this encoder 8
0 results in a signal compatible with a standard composite color television signal in which the velocity and phase of the color subcarriers are also equal to the signal from a conventional television camera.

Further, the signal from the encoder 80 is controlled to be genlocked to the external synchronization signal in the following manner. That is, the external synchronization signal REF, which is an NTSC video signal having the reference horizontal and vertical synchronization signals and the phase of the color subcarrier, is input to the input terminal 91.
Through the color subcarrier separation circuit 92, horizontal synchronization signal separation circuit 93 and vertical synchronization signal separation circuit 9
4. A reference color subcarrier frequency and phase signal is obtained from the color subcarrier separation circuit 92, and is supplied to one input terminal of the comparison circuit 102 of the timing signal generation circuit 100, and
The output signal from the color subcarrier frequency signal generation circuit 71 is supplied to the other input terminal of this comparison circuit 102, and the phase comparison output of both is supplied to the generation circuit 71, and the frequency and frequency of the output signal of this generation circuit 71 are The phase is made to lock to the frequency and phase of the chrominance subcarrier of the external synchronization signal. Further, a horizontal synchronization signal SH and a vertical synchronization signal SV are obtained from the horizontal synchronization signal separation circuit 93 and the vertical synchronization signal separation circuit 94, and these are supplied to the synchronization signal generation circuit 101 of the timing signal generation circuit 100. A synchronization signal SS from 101 is synchronized with these horizontal and vertical synchronization signals SH and SV.

In this case, the output signal from the television camera device 10 is advanced by the delay τ _V in the speed converter 40 and the delay τ _E in the encoder 80 with respect to the external synchronization signal REF, and the output side of the speed converter 40 is In the encoder 80
must be ahead of the external synchronization signal REF by a delay τ _E at . The delay amount τ _V in the speed converter 40 is an integral multiple of the reference 40.5 MHz clock signal CK _N , and the delay amount in the encoder 80 is an integral multiple of the clock signal CK _N + α. Therefore, the horizontal and vertical synchronizing signal separation circuits 93 and 94 are supplied to minute time phase advancing circuits 103 and 104, and are first advanced by a delay amount α within one clock range of the clock signal _CKN . The horizontal and vertical synchronizing signals passed through the phase advancing circuits 103 and 104 are supplied to the phase advancing circuits 105 and 106 in units of one clock of the clock signal CK _N , and the delay amount is determined by the clock signal CK _N from the clock signal generating circuit 107. The phase is advanced by τ _V + τ _E. In addition, phase advance circuit 1
Horizontal synchronization signal advanced by τ _E + α from 05
SH is supplied to one input terminal of the comparison circuit 108. On the other hand, the clock signal CK _N from the clock signal generating circuit 107 is supplied to the frequency dividing circuit 109 and divided into 1/3 to obtain the normal speed clock signal _{C O .} The signal is supplied to a frequency circuit 110 and divided into horizontal frequency signals. The horizontal frequency signal from this frequency dividing circuit 110 is supplied to the other input terminal of the comparator circuit 108, and its phase is compared with the advanced horizontal synchronizing signal SH from the phase advance circuit 105. The output clock signal CK _N of the signal generating circuit 107 is controlled to be synchronized with the signal SH.

The output clock signal _CKN of this clock signal generation circuit 107 and the clock from the frequency dividing circuit 109
CK _O is supplied to the speed conversion device 40 as described above.

Next, the output of the television camera device 10 is controlled to be synchronized with the reference horizontal synchronization signal and vertical synchronization signal advanced from the phase advance circuits 105 and 106.

That is, in this example, the camera device 10 is provided with a triple-speed horizontal synchronization signal generation circuit 10S, and the horizontal synchronization signal is superimposed on, for example, the luminance signal Y among its output signals. Then, the horizontal synchronization signal superimposed on the luminance signal Y is separated in the synchronization signal separation circuit 95. Since the signal obtained from this synchronization signal separation circuit 95 is a high speed signal, which is triple speed, it is supplied to a ⅓ frequency divider circuit 96 and frequency-divided into a normal speed horizontal synchronization signal. The frequency-divided horizontal synchronizing signal is then supplied to the other input terminal of the comparator circuit 97, where the phase is compared with the reference horizontal synchronizing signal from the phase advance circuit 105, and the comparison output is used to generate the horizontal synchronizing signal generator 10S. is controlled. Also,
The reference vertical synchronizing signal from the phase advancing circuit 106 is supplied to the horizontal synchronizing signal generating circuit 10S, thereby resetting this circuit 10S.

Note that 200 is a camera control unit, and this camera control unit 200
A control signal from the television camera device 10 is supplied to the television camera device 10 to control the operation of the television camera device 10. Further, the signal from the television camera device 10 is supplied to the camera control unit 200 and is used as a control reference for the camera control unit 200.
In this case, the output signal from the television camera 1 passing through the camera control unit 200 is supplied to the speed conversion device 40. In this case, the speed conversion device 40 does not sample signals during the horizontal blanking period and the vertical blanking period, and therefore the horizontal synchronization signal from the horizontal synchronization signal generation circuit 10S does not appear as the output of the speed conversion device 40. , encoders 5 ₁ , 5 ₂ and 5 ₃ and 80
In this case, a horizontal synchronizing signal and a vertical synchronizing signal from the synchronizing signal generating circuit 101 are added to make it compatible with a standard television signal.

As described above, according to this device, a color video signal compatible with the standard television system is obtained from the encoder 80, and furthermore, this color video signal is genlocked to the external synchronization signal that is the internal sync of the broadcasting station. becomes. Furthermore, the high-speed video signal generator also operates in a state locked to an external synchronizing signal. Therefore, this device can be easily used as one television camera in a multi-camera system at a broadcasting station. Moreover, in this case, a current type monitor receiver can be used, and it can be incorporated into the system by simply switching it with another conventional television camera using a switcher.

FIG. 10 is a diagram showing an outline of the multi-camera system.

In the figure, 1 ₁ , 1 ₂ , . . . 1 _o indicate n ordinary television cameras, and these are camera control units 200 ₁ , 200 ₂ , . . . 2 , respectively.
The camera outputs passing through the camera control units _{2001 to 200o} are supplied to the switcher 300, where they are selectively switched and taken out, and are recorded on the VTR 400 or relayed. The information is transmitted by the transmitter 500.

1H is a high-speed video signal generating device shown in FIG.
Video signals of three channels from 0 to 1 are recorded in a VTR 400H as shown in FIG. 6 by its three rotary recording heads. The recorded signal is then reproduced by one reproducing rotary head, and the reproduced signal is supplied to the switcher 300. Further, the output of the encoder 80 is supplied to the switcher 300, and is appropriately switched and selected by the switcher 300, as well as the reproduction signal from the VTR 400H and the signals from the other television cameras ₁₁ to _1o .

The above example is a multi-TV camera in which n normal-speed TV cameras are prepared, one high-speed video signal generator is added, these are switched by a switcher, and the n+1 TV cameras are controlled. In the case of a system, n high-speed video signal generators are prepared,
Each of the n high-speed video signal generators is switched by a switcher, and this
The present invention can also be applied to a system for recording on a VTR.

Effects of the Invention As described above, according to the present invention, a video signal generator having a high-speed video camera can be used as it is as one television camera in a multi-camera system at a broadcasting station. Moreover, in this case, there is the advantage that, while synchronized with an external synchronization signal and locked, this video signal generator can be controlled by the camera in the same way as the output of other television cameras while viewing the monitor image. . In addition, since this system has a genlock function that synchronizes to an external synchronization signal, this system can perform its own function, that is, function as a high-speed video system, while simultaneously performing one of the functions of a multi-camera system.
This has the effect that the camera can function satisfactorily.

[Brief explanation of the drawing]

Fig. 1 is a system diagram showing an embodiment of this invention, Fig. 2 is a system diagram of an example of its essential parts, Fig. 3 is a time chart for explaining the same, and Figs. 4 and 5 are diagrams of this invention. 6 and 7 are diagrams for explaining an example of a VTR that records signals obtained according to the present invention. FIG. 8 is a diagram for explaining the output mode of multiple channels in one embodiment. FIG. 9 is a diagram for explaining the output mode of multiple channels in another example of
The figure is a system diagram of an example of the device of the invention, and FIG. 10 is a system diagram of an example of the usage mode of the device of the invention. 10 is a camera device having a color camera with a high scanning speed; 40 is a speed conversion device having memory; 50 and 80 are each an NTSC encoder;
90 is an input terminal for an external synchronization signal, and 100 is a timing signal generation circuit.

Claims (1)

[Claims] 1. A television camera whose scanning speed is N times the standard scanning speed (N is an integer of 2 or more) and a memory, wherein the output signal is τ _V with respect to the input signal.
and a speed conversion circuit that is delayed, and in the speed conversion circuit, a high-speed video signal from the television camera is written into the memory at a high sampling rate, and when reading from the memory, the sampling rate is 1/N. In the video signal generating device, the video signal of at least one of the N channels at a standard scanning speed is obtained as the output of the speed conversion circuit by reading N channels in parallel from the memory. , converts at least one channel of video signals of the standard scanning speed video signals outputted from the speed conversion circuit into a color video signal compatible with a predetermined standard color television signal, and outputs an output signal with respect to the input signal. an encoder in which τ _E is delayed; a first synchronization circuit that operates the encoder in synchronization with an external synchronization signal; and a phase control that controls the phase of the external synchronization signal to advance by (τ _V + τ _E ). A video signal generation device comprising: a circuit; and a second synchronization circuit that operates the television camera in synchronization with the output of the phase control circuit.