JPH0554241B2 - - Google Patents

Info

Publication number
JPH0554241B2
JPH0554241B2 JP59191220A JP19122084A JPH0554241B2 JP H0554241 B2 JPH0554241 B2 JP H0554241B2 JP 59191220 A JP59191220 A JP 59191220A JP 19122084 A JP19122084 A JP 19122084A JP H0554241 B2 JPH0554241 B2 JP H0554241B2
Authority
JP
Japan
Prior art keywords
slits
slit
resistor
broken
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP59191220A
Other languages
Japanese (ja)
Other versions
JPS6167903A (en
Inventor
Takafumi Katsuno
Shigeru Kanbara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP59191220A priority Critical patent/JPS6167903A/en
Publication of JPS6167903A publication Critical patent/JPS6167903A/en
Publication of JPH0554241B2 publication Critical patent/JPH0554241B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Apparatuses And Processes For Manufacturing Resistors (AREA)

Description

【発明の詳細な説明】 (イ) 産業上の利用分野 この発明は、基板上に複数個の抵抗器を形成
し、抵抗器毎に基板をブレイクしてチツプ抵抗器
を得るチツプ抵抗器の製造方法に関する。
[Detailed description of the invention] (a) Industrial application field This invention is a method for manufacturing a chip resistor, in which a plurality of resistors are formed on a substrate, and the substrate is broken for each resistor to obtain a chip resistor. Regarding the method.

(ロ) 従来の技術 チツプ抵抗器を製造する方法としては、従来、
1枚のアルミナの基板上に、予め行列に同じ深さ
のスリツトを設け、これら行列のスリツトで囲ま
れる各領域内に、電極及び抵抗体を含む抵抗器を
形成し、その後、この基板をブレイクマシンにか
けて、先ず、基板を帯状体にブレイクし、さらに
この帯状体を再度ブレイクマシンにかけて、チツ
プ毎の抵抗器に分割し、チツプ抵抗器を得るよう
にしたものがある。また、ここで使用されるブレ
イクマシンは大径のゴムローラと小径のゴムロー
ラが接合される機構を含み、この接合部分に、基
板あるいは帯状体を挿入挟持し、両ゴムローラの
圧接力により、スリツト部分でブレイクするよう
になつている。
(b) Conventional technology There are conventional methods for manufacturing chip resistors.
On one alumina substrate, slits of the same depth are provided in advance in the matrix, a resistor including an electrode and a resistor is formed in each area surrounded by the slits in the matrix, and then this substrate is broken. There is a method in which the substrate is first broken into strips by a machine, and then this strip is again run through the break machine to divide it into resistors each chip to obtain a chip resistor. In addition, the break machine used here includes a mechanism in which a large diameter rubber roller and a small diameter rubber roller are joined, and a substrate or a strip is inserted and held in this joint part, and the slit part is pressed by the pressure of both rubber rollers. It's starting to break out.

(ハ) 発明が解決しようとする問題点 チツプ抵抗器は、近年種々のものが製造、市販
されており、比較的大きなものから、長さが1〜
数mmのものまで存在する。これら種々のサイズの
ものを、同じブレイクマシンでブレイクできれば
非常に便利であるが、比較的大きな抵抗器をブレ
イクするマシーンを用いて小型のものをブレイク
すると、上記従来の製造方法では、ブレイクが完
全になされずに、複数個くつついた状態の不良チ
ツプが生じる、いわゆるアベツク不良が生じると
いう欠点があつた。このアベツク不良は特に、ブ
レイクする最後のスリツトで発生している。
(c) Problems to be solved by the invention In recent years, various types of chip resistors have been manufactured and sold on the market, ranging from relatively large ones to those with a length of
They exist up to several millimeters in size. It would be very convenient if these various sizes could be broken using the same breaking machine, but if a small resistor is broken using a machine that breaks relatively large resistors, the conventional manufacturing method described above would not be able to completely break the resistors. However, there is a drawback that a plurality of defective chips are produced in a state where the chips are stuck together, so-called "average defects" occur. This abnormality occurs especially at the last slit that breaks.

この発明は、上記に鑑み、ブレイク時にアベツ
ク不良の発生が少ない製造方法を提供することを
目的としている。
In view of the above, it is an object of the present invention to provide a manufacturing method that reduces the occurrence of average failures during breaks.

(ニ) 問題点を解決するための手段及び作用 この発明は1枚の基板上に行列にスリツトを設
け、かつ、これら行列のスリツトは、基板の端部
より第1番目の行列を、他の行列より深くしてお
き、これら行列のスリツトで囲まれる各領域内に
電極及び抵抗体を含む抵抗器を形成し、深くした
スリツトの行列が少なくとも最後となるようにし
てブレイクするようにしており、最後に残される
2行の帯状体、あるいは2個のチツプも最後のス
リツトが深いので、スムーズにブレイクされる。
(d) Means and operation for solving the problem This invention provides slits in a matrix on one substrate, and the slits in these matrix A resistor including an electrode and a resistor is formed in each region surrounded by the slits of the matrix, and the matrix of the deep slit is at least the last one to break. The last two rows of strips or two chips are also broken smoothly because the final slits are deep.

(ホ) 実施例 以下、実施例によりこの発明をさらに詳細に説
明する。
(e) Examples The present invention will be explained in more detail below using examples.

第1図は、この発明の実施に使用されるブレイ
ク前のアルミナ基板の斜視図である。同図におい
て、アルミナ基板1上に、行列にスリツト2a,
2b,…,2n及び3a,3b,…,3nが設け
られている。これら行方向のスリツト2a,2
b,…,2n及び列方向のスリツト3a,3b,
…,3nは、端部に設けられるもの、すなわちア
ルミナ基板1の端面より第1番目のスリツト2
a,2n,3a,3nが、その他のスリツトより
も大なる深さに形成されている。例えばアルミナ
基板1の厚さ500μに対し、スリツト2a,2n
は250μ、その他の行方向のスリツト2b等は
220μ、スリツト3a,3nは110μ、その他の列
方向のスリツト3b等は90μ程度に選定される。
FIG. 1 is a perspective view of an alumina substrate before breaking used in the practice of this invention. In the figure, slits 2a are arranged in a matrix on an alumina substrate 1.
2b,..., 2n and 3a, 3b,..., 3n are provided. These row direction slits 2a, 2
b,..., 2n and column direction slits 3a, 3b,
..., 3n are the slits 2 provided at the ends, that is, the first slits 2 from the end surface of the alumina substrate 1.
slits a, 2n, 3a, and 3n are formed to a greater depth than the other slits. For example, if the thickness of the alumina substrate 1 is 500μ, the slits 2a, 2n
is 250μ, other row direction slits 2b etc.
220μ, 110μ for the slits 3a and 3n, and about 90μ for the other slits 3b in the column direction.

基板1上のスリツト2a,2b,…,2n及び
3a,3b,…,3nで囲まれる各格子4内に
は、それぞれ電極5,5、抵抗体6を含む抵抗器
7が形成されている。なお、抵抗器7の電極5,
5は列方向に形成されている。
A resistor 7 including electrodes 5, 5 and a resistor 6 is formed in each grid 4 surrounded by slits 2a, 2b, . . . , 2n and 3a, 3b, . Note that the electrode 5 of the resistor 7,
5 are formed in the column direction.

上記アルミナ基板1上に形成された各抵抗器7
を、ブレイクしてチツプ抵抗器を得るのに、第2
図に示すブレイクマシン10が使用される。ブレ
イクマシン10は、大径のゴムローラ11と小径
のゴムローラ12を備えており、アルミナ基板1
を矢符Aの方向に移動させ、ゴムローラ11と1
2で挟持させると、ゴムローラ11,12の圧接
力により、アルミナ基板1がゴムローラ11,1
2を通過する際に、スリツト毎にブレイクされ、
帯状体あるいはチツプ抵抗器が得られる。
Each resistor 7 formed on the alumina substrate 1
, to obtain the chip resistor, the second
A break machine 10 as shown in the figure is used. The break machine 10 is equipped with a large-diameter rubber roller 11 and a small-diameter rubber roller 12, and has an alumina substrate 1.
in the direction of arrow A, and move the rubber rollers 11 and 1
When the alumina substrate 1 is held between the rubber rollers 11 and 1, the pressure of the rubber rollers 11 and 12 causes the alumina substrate 1 to be held between the rubber rollers 11 and 1.
When passing through 2, it is broken at every slit,
A strip or chip resistor is obtained.

アルミナ基板1は、行方向のスリツトを列方向
のスリツトよりも深くしているので、先に行方向
のスリツト2a,2b,…,2nがブレイクさ
れ、帯状体が得られる方向に、アルミナ基板1を
ブレイクマシン10にかける。行方向スリツト2
a,2nは、他の行方向スリツト2b等より深く
しているので、スリツト2a側あるいはスリツト
2n側のいずれからブレイクしてもよい。例え
ば、スリツト2n側から、先に進めてゆくと、先
ず、スリツト2nで簡単にブレイクされ、以下、
順次、スリツト毎にブレイクされ、最後にスリツ
ト2aでブレイクされる。スリツト2aは深くし
てあるので、最後にわずか2本の帯状体となつて
も、完全にブレイクされ、2本の帯状体は分離さ
れるので、アベツク不良が生じることはない。な
お行方向のスリツト2a,2b,…,2nをブレ
イクしていく際に、上記したように、列方向のス
リツト3a,3b,…,3nがスリツト2a,2
b,…,2nより浅いので、これらスリツト3
a,3b,…,3nが先にブレイクされることは
ない。
Since the slits in the row direction of the alumina substrate 1 are made deeper than the slits in the column direction, the slits 2a, 2b, ..., 2n in the row direction are broken first, and the alumina substrate 1 is is applied to break machine 10. Row direction slit 2
Since the slits a and 2n are deeper than the other row-direction slits 2b, etc., they may be broken from either the slit 2a side or the slit 2n side. For example, if you proceed from the slit 2n side, it will first be easily broken at slit 2n, and then,
The signal is sequentially broken at each slit, and finally at slit 2a. Since the slit 2a is deep, even if there are only two strips in the end, they are completely broken and the two strips are separated, so no abnormality occurs. Note that when breaking the slits 2a, 2b, ..., 2n in the row direction, the slits 3a, 3b, ..., 3n in the column direction break the slits 2a, 2n, as described above.
Since these slits 3 are shallower than b,...,2n,
a, 3b, . . . , 3n are never broken first.

以上のように、行毎のブレイクがなされ、帯状
体が得られると、今度は、その帯状体毎にブレイ
クマシン10にかけて、列方向のスリツト3a,
3b,…,3nがブレイクして、個々のチツプ抵
抗器を得る。スリツト3a,3nは他の列方向の
スリツト3b等に対し、やはり深くしているの
で、いずれの方向からブレイクマシン10にかけ
ても、最後のスリツトは、深いスリツトとなるの
で、完全なブレイクをなすことができる。
As described above, when a strip is obtained by breaking row by row, each strip is passed through the break machine 10 to form slits 3a in the column direction,
3b, . . . , 3n are broken to obtain individual chip resistors. The slits 3a and 3n are deeper than the slits 3b, etc. in the other column directions, so no matter which direction the break machine 10 is applied to, the last slit will be a deep slit, so a complete break can be achieved. I can do it.

なお、上記実施例では、アルミナ基板1に設け
られるスリツトは行列とも両端部の第1番目を深
くしているが、行列とも一端部の第1番目のスリ
ツトのみを深くし、深くしたスリツトの行列が最
後にブレイクされるように、方向を定めてブレイ
クマシンにかけるようにしてもよい。
In the above embodiment, the slits provided in the alumina substrate 1 are made deep at the first slit at both ends of the matrix, but only the first slit at one end of the matrix is deepened, and the slits in the matrix are made deep. You may set the direction and apply it to the break machine so that it breaks last.

(ヘ) 発明の効果 この発明によれば、基板上に設けられる行列の
スリツトの端部から第1番目のスリツトを他のス
リツトよりも深くし、少なくとも、その深く形成
されたスリツト部分で最後にブレイクするもので
あるから、残帯状体、あるいはチツプが2本、あ
るいは2個となつても、完全にブレイクすること
ができ、アベツク不良が生じることがないので、
歩留りの良いチツプ抵抗器の製造を行うことがで
きる。
(F) Effects of the Invention According to the present invention, the first slit from the end of the slits in the matrix provided on the substrate is made deeper than the other slits, and at least the deep slit portion forms the last slit. Because it breaks, even if there are two or two remaining strips or chips, it can be completely broken and no abnormality will occur.
Chip resistors can be manufactured with high yield.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、この発明の実施に使用されるブレイ
ク前のアルミナ基板の斜視図、第2図は同アルミ
ナ基板をブレイクマシンでブレイクする場合を説
明するための断面図である。 1:アルミナ基板、2a,2b,…,2n・3
a,3b,…,3n:スリツト、5:電極、6:
抵抗体、7:抵抗器。
FIG. 1 is a perspective view of an alumina substrate before breaking used in the practice of the present invention, and FIG. 2 is a sectional view for explaining the case where the alumina substrate is broken with a breaking machine. 1: Alumina substrate, 2a, 2b,..., 2n・3
a, 3b,..., 3n: slit, 5: electrode, 6:
Resistor, 7: Resistor.

Claims (1)

【特許請求の範囲】 1 1枚の基板上に行列にスリツトを設け、か
つ、これら行列のスリツトは、基板の端部より第
1番目の行列を、他の行列より深くしておき、こ
れら行列のスリツトで囲まれる各領域内に電極及
び抵抗体を含む抵抗器を形成し、前記深くしたス
リツトの行列が少なくとも最後となるようにし
て、前記基板をスリツト毎にブレイクしてゆき、
複数個のチツプ抵抗器を得るようにしたチツプ抵
抗器の製造方法。 2 前記他より深く形成されるスリツトは、前記
基板の両端部より第1番目の行列である特許請求
の範囲第1項記載のチツプ抵抗器の製造方法。 3 前記他より深く形成されるスリツトは、行あ
るいは列のうち、いずれか先にブレイクされる方
が後にブレイクされる方よりも、深く形成される
ものである特許請求の範囲第1項または第2項記
載のチツプ抵抗器の製造方法。
[Claims] 1. Slits are provided in rows and columns on one substrate, and the slits in these rows and columns are such that the first row from the edge of the board is deeper than the other rows. forming a resistor including an electrode and a resistor in each area surrounded by the slits, and breaking the substrate slit by slit so that the deep slit matrix is at least the last;
A method for manufacturing a chip resistor in which a plurality of chip resistors are obtained. 2. The method of manufacturing a chip resistor according to claim 1, wherein the slits formed deeper than the others are in the first matrix from both ends of the substrate. 3. The slits formed deeper than the others are formed deeper in the row or column, whichever is broken first, than the one broken later. 2. A method for manufacturing a chip resistor according to item 2.
JP59191220A 1984-09-11 1984-09-11 Method of producing chip resistor Granted JPS6167903A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59191220A JPS6167903A (en) 1984-09-11 1984-09-11 Method of producing chip resistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59191220A JPS6167903A (en) 1984-09-11 1984-09-11 Method of producing chip resistor

Publications (2)

Publication Number Publication Date
JPS6167903A JPS6167903A (en) 1986-04-08
JPH0554241B2 true JPH0554241B2 (en) 1993-08-12

Family

ID=16270895

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59191220A Granted JPS6167903A (en) 1984-09-11 1984-09-11 Method of producing chip resistor

Country Status (1)

Country Link
JP (1) JPS6167903A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55116042A (en) * 1979-02-27 1980-09-06 Omron Tateisi Electronics Co Multi-type airconditioning device
JPS57138109A (en) * 1981-02-19 1982-08-26 Murata Manufacturing Co Method of producing chip resistor

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6018418Y2 (en) * 1979-02-07 1985-06-04 日本特殊陶業株式会社 Structure of snap groove on ceramic substrate

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55116042A (en) * 1979-02-27 1980-09-06 Omron Tateisi Electronics Co Multi-type airconditioning device
JPS57138109A (en) * 1981-02-19 1982-08-26 Murata Manufacturing Co Method of producing chip resistor

Also Published As

Publication number Publication date
JPS6167903A (en) 1986-04-08

Similar Documents

Publication Publication Date Title
JPH04306867A (en) Lead frame and manufacture thereof
DE69610109T2 (en) SEMICONDUCTOR COMPONENT WITH IMPROVED SAFETY; SEMICONDUCTOR CIRCUIT ARRANGEMENT AND METHOD FOR THE PRODUCTION THEREOF
US6402449B1 (en) Screw with an improved head
JPH0554241B2 (en)
EP1270504B1 (en) Semiconductor device joint to a wafer
JPS6039207B2 (en) Manufacturing method of liquid crystal display element
JPH02179708A (en) Break separating method of semi-conductor wafer
JPS5946429B2 (en) Method for manufacturing a light emitting display device
JPS61172362A (en) Bonding electrode structure
DE1927326A1 (en) Method and device for producing a semiconductor component
JPS639950A (en) Method for separating semiconductor element
DE102019209065B4 (en) Semiconductor device and method for producing the semiconductor device
DE2014246A1 (en) Method for dividing semiconductor wafers into semiconductor wafers
CN110660815B (en) Design method of CMOS image sensor wafer
DE10106836B4 (en) Integrated circuit arrangement of a flat substrate
DE102019212650A1 (en) Method of manufacturing a physical quantity detection sensor and physical quantity detection sensor
JPH06820Y2 (en) Active matrix substrate
DE19756082C2 (en) Method for repairing the row and column lines of an active matrix liquid crystal display device
JP2000047226A (en) Production of liquid crystal display panel
CN110010550B (en) Array substrate preparation method and display panel preparation method
JPH04249113A (en) Wafer scriber
JPH07326501A (en) Structure of ceramic material for insulation board and method of manufacture
JPH0766997B2 (en) Ceramic substrate for electronic parts
JPS63219104A (en) Manufacture of electronic component
DE19800715A1 (en) Semiconductor element consists of a wafer segmented into isolated individual elements

Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees