JPH0552791U - Clock counter - Google Patents

Abstract

(57) [Abstract] [Purpose] To provide a clock counter that does not advance even if noise is mixed into the commercial power supply. [Structure] When a clock pulse obtained by converting a commercial power supply into a pulse of 5 V system rises, an interrupt occurs. In S11, it is determined whether the internal counter of the microcomputer is 311 or more.
If it is 311 or more, this pulse is regarded as a regular commercial power supply pulse and the clock counter is incremented by 1 in S13. When the clock counter reaches 50 in S14, S15
Advance the clock by 1 second and reset it. If the internal counter is less than 311 in S11, this pulse is an erroneous pulse due to noise, and is returned without any processing.

Description

[Detailed description of the device]

[0001]

[Industrial application]

 The present invention relates to a clock counter built in an electronic device such as a television receiver.

[0002]

[Prior Art]

 Some electronic devices such as television receivers have a built-in clock function, and in many cases various timers are realized by using this clock. For example, there is a function that automatically turns on the power of the device at a set time, a so-called on-timer, and a function that automatically turns off the power of the device at the set time, a so-called off-timer. These functions are generally controlled by a microcomputer. In addition, the clock function itself is often performed by a microcomputer. In this case, a 100V commercial power supply (50Hz or 60Hz) is read by the microcomputer, and this is used as the reference clock to realize the timepiece. The commercial power supply has a highly accurate periodicity, and by using this as a reference clock, a very accurate clock can be obtained.

In order to read the commercial power source with the microcomputer, it is necessary to first convert the commercial power source into a pulse of 5V system. FIG. 4 is a circuit diagram showing an example of the conversion circuit, and FIG. 5 shows voltage waveforms at points A to C in FIG. In FIG. 4, the waveform shown in A of FIG. 5 obtained from the secondary side of the power transformer 1 is taken out as the AC component shown in B of FIG. 5 via the capacitor C1 and the high resistance R1. The positive section is taken out as a 5V system pulse by the diodes D1 and D2, and the waveform is shaped by the inverters 2 and 3 via the resistor R2 to obtain the 5V system pulse shown in C of FIG. As a result, an accurate clock of 50 Hz or 60 Hz can be obtained (hereinafter, the frequency will be described as 50 Hz). Then, this clock is applied to the input port of the microcomputer.

The microcomputer counts this clock to realize a clock. That is, it is sufficient to count the time on the assumption that 20 mS has elapsed for each pulse of the clock. Although this clock is read, this input port may be a general-purpose port or an interrupt port. However, the interrupt port is easy to use because of the ease of writing software. Here, the interrupt port is taken as an example, and a flowchart of the processing is shown in FIG. When an interrupt occurs at each rising edge of the clock pulse, the clock counter is incremented by +1 (one increment) [step (S) 1]. Here, 1 of the clock counter means 20 mS, and 50 seconds is 1 second. Therefore, it is sufficient to advance the clock by 1 second for every 50 counts. If the clock counter is 50 (Yes) [S2], the clock is advanced by 1 second [S3], and the clock counter is set to 0 [S4] to restore. If the time counter is not 50 in step 2 (No), the counter is returned as it is. Here, the clock counter is a software counter arranged on the RAM. Note that the carry processing for hours and minutes and the processing for clock adjustment by the user are omitted.

[0005]

[Problems to be solved by the device]

 Although the clock function can be realized with the above configuration, the noise superimposed on the power supply line becomes a problem when a commercial power supply is used. Recently, there are many devices that generate noise, and noise may enter the power supply from these devices through an outlet. FIG. 6 shows voltage waveforms at points A to C in FIG. 4 when noise is mixed. When noise is mixed in as shown in A of FIG. 6, the waveform at point B in FIG. 4 becomes as shown in B of FIG. 6, and the waveform obtained at point C of FIG. 4 becomes as shown in C of FIG. turn into. Then, due to incorrect counting, many clock pulses are counted and the clock advances.

Actually, this noise is introduced only about several times per hour, but if noise is entered five times per hour, 5 (times) × 24 (hours) = 120 (per day) Times), 20 (mS) × 120 (times) = 2.4 (seconds), the clock advances by 2.4 seconds. To prevent this problem, noise may be removed when the commercial power supply is converted to 5 V, that is, in the circuit of FIG. 4, but in order to completely remove noise, the circuit scale becomes large. It is not realistic because it costs money. The present invention has been made in view of the above problems, and an object of the present invention is to provide a clock counter capable of improving the clock accuracy by correcting the advance of the clock due to the count error due to the clock pulse.

[0007]

[Means for Solving the Problems]

 In order to solve the above-mentioned problems of the conventional technology, the present invention uses a microcomputer equipped with an internal counter synchronized with the system clock, in a clock counter that counts by counting the commercial power cycle as a reference clock. The present invention provides a timepiece counter, characterized in that the commercial power supply cycle is measured by the internal counter and only clocks having a cycle within a certain range are counted.

[0008]

【Example】

 Hereinafter, a timepiece counter of the present invention will be described with reference to the accompanying drawings. FIG. 1 is a flow chart of processing by the clock counter of the present invention, and FIG. 2 is a block diagram showing the peripheral part of the internal counter of the microcomputer.

The present invention corrects the advance of the clock due to the count error of the clock pulse and improves the clock precision, and uses the internal counter built in the microcomputer. Generally, a microcomputer has some internal counters built therein. This counter counts the pulses obtained by dividing the system clock of the microcomputer, and can start and stop counting, read the counter value, and set the initial value by software. FIG. 2 shows the peripheral part of the internal counter of the microcomputer. It is assumed here that the system clock is 4 MHz and the frequency division ratio of the system clock by the frequency divider 5 is 1/256. The size of the internal counter 6 is 12 bits (it can count from 0 to 4095).

The original oscillation of the system clock is the ceramic oscillator 4 which is an external oscillation circuit, and this accuracy is the accuracy of the internal counter 6 as it is. The accuracy of the ceramic oscillator 4 has an error of ± 0.1% to ± 0.3%. Although the accuracy required for the clock is not reached at all, the internal counter 6 built into this microcomputer is used to correct the count error of the commercial power supply clock. Since the false pulse due to the noise of the commercial power source is random, the pulse has a completely different value from the original pulse interval of 20 mS. Therefore, since the internal counter 6 can sufficiently detect the erroneous pulse.

Next, a specific procedure will be described. First, the maximum error of the internal counter is ± 0. Since it is 3%, the count value of the internal counter 6 during the period of 20 mS is as follows. The count value of error 0 is 20 × 10 ⁻³ ÷ [{1 / (4 × 10 ⁶ )} × 256] = 312.5, and the count value of error −0.3% is 312.5 × 1. 003 = 313.4375, and the count value of the error + 0.3% is 312.5 × 0. It becomes 997 = 311.5625. That is, any value of 311 to 313 is counted by the internal counter during the period of 20 mS. Therefore, if it is less than 311, it means that 20 ms has not elapsed.

As described above, in the conventional process, the interrupt is generated for each commercial power source, but the circuit configuration is also the same in the present invention. Only the processing at the time of the interruption is different. A flowchart of the processing is shown in FIG. At the time of interruption, first, the value of the internal counter 6 is read and it is checked whether the values are 311 to 313. If the value of the internal counter 6 is 311 or more (Yes) [step (S) 11], the internal counter 6 is set to 0 [S12], and the clock counter is incremented by 1 [S13]. If the clock counter is 50 (Yes) [S14], the clock is advanced by 1 second [S15], the clock counter is cleared (set to 0) [S16], and the interrupt ends. If the internal counter value 6 is less than 311 in step 11, this is an erroneous pulse due to noise. Therefore, the internal counter 6 is also left as it is and the interrupt process is terminated without performing any process.

Further, description will be made with reference to FIG. In FIG. 6C, (A) indicates that 20 mS has elapsed since the last interruption. In this case, since the internal counter 6 has a range of 311 to 3133, the route 2 is traced in FIG. 1 and the clock is counted correctly. Also, here, the internal counter 6 is initialized to zero. Next, (a) gives an interrupt. At this time, the value of the internal counter 6 is less than 311 because 20 mS has not elapsed from (a). Therefore, the process of route 1 in FIG. 1 is followed. That is, the internal counter 6 continues counting without performing any processing. Similarly, (c) does not perform any processing. The interruption in (d) is when 20 mS has elapsed from (a). Therefore, since the internal counter is in the range of 311 to 313, the route 2 is traced. As a result, the clock is counted up. The internal counter becomes 0 again here. Similarly, (e) follows route 1, and (f) follows route 2. The above is repeated below.

As described above, in the timepiece counter according to the present invention, it is possible to eliminate false pulses due to noise and count only the pulses from the correct commercial power source. Although the frequency of the commercial power source is 50 Hz in the present embodiment, it can be similarly realized at 60 Hz.

[0015]

[Effect of the device]

 As described in detail above, the clock counter of the present invention is configured to measure the commercial power cycle with the internal counter built into the microcomputer and count only the clock with a cycle within a certain range. Pulses can be removed and only pulses from the correct utility power can be clock counted. Moreover, since the circuit scale does not increase, it can be realized at low cost.

[Brief description of drawings]

FIG. 1 is a flow chart of processing by a timepiece counter of the present invention.

FIG. 2 is a block diagram showing a peripheral portion of an internal counter of a microcomputer.

FIG. 3 is a flowchart of processing by a conventional clock counter.

FIG. 4 is a circuit diagram showing an example of a 5V system conversion circuit of a commercial power supply.

5 is a voltage waveform diagram of each part in FIG.

FIG. 6 is a voltage waveform diagram of each part when noise in FIG. 4 is mixed.

[Explanation of symbols]

 1 power transformer 2,3 inverter 4 ceramic oscillator 5 frequency divider 6 internal counter

Claims (1)

[Scope of utility model registration request] 1. A clock counter that uses a microcomputer provided with an internal counter synchronized with a system clock to count by counting a commercial power cycle as a reference clock, wherein the commercial power cycle is measured by the internal counter and fixed. A clock counter that counts only clocks with a range of cycles.