JPH0548230A - Thin-film wiring substrate - Google Patents

Thin-film wiring substrate

Info

Publication number
JPH0548230A
JPH0548230A JP23121691A JP23121691A JPH0548230A JP H0548230 A JPH0548230 A JP H0548230A JP 23121691 A JP23121691 A JP 23121691A JP 23121691 A JP23121691 A JP 23121691A JP H0548230 A JPH0548230 A JP H0548230A
Authority
JP
Japan
Prior art keywords
wiring
layer
wiring layer
thin
wiring board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP23121691A
Other languages
Japanese (ja)
Inventor
Terutake Hayashi
輝 威 林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujifilm Business Innovation Corp
Original Assignee
Fuji Xerox Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Xerox Co Ltd filed Critical Fuji Xerox Co Ltd
Priority to JP23121691A priority Critical patent/JPH0548230A/en
Publication of JPH0548230A publication Critical patent/JPH0548230A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/321Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/36Assembling printed circuits with other printed circuits
    • H05K3/361Assembling flexible printed circuits with other printed circuits

Landscapes

  • Combinations Of Printed Boards (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PURPOSE:To enable a need for limiting selection of a material of a wiring layer or setting of thickness of a layer to be eliminated in a thin-film wiring substrate. CONSTITUTION:A buffer layer 8 consisting of polyimide, etc., is provided be low a wiring layer in a thin-film wiring substrate 1, thus enabling a conductive particle to intrude the wiring layer easily when making connection to other wiring substrate using an adhesive 4 containing a conductive particle 5 by applying pressure. Therefore, a hard material can be used as a material for the wiring layer and its thickness may be thin.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、配線層の材料の選定や
層の厚さの設定について、格別の制限をする必要がない
ようにした薄膜配線基板に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film wiring board which does not require special restrictions on selection of material for wiring layers and setting of layer thickness.

【0002】[0002]

【従来の技術】ガラス基板等の絶縁基板上に薄膜工程で
形成された配線と、他の基板上の配線とを、導電性粒子
を含む接着剤で配線表面同士を接続することが行われて
いる。図2は、従来の薄膜配線基板を他の配線基板と接
続した状態を示す図である。図2において、1は基板、
2は下層配線層、3は配線層、4は接着剤、5は導電性
粒子、6は配線部、7は基板、Aは薄膜配線基板、Bは
配線基板である。
2. Description of the Related Art Wiring surfaces formed on an insulating substrate such as a glass substrate by a thin film process and wirings on another substrate are connected to each other by an adhesive containing conductive particles. There is. FIG. 2 is a diagram showing a state in which a conventional thin film wiring board is connected to another wiring board. In FIG. 2, 1 is a substrate,
Reference numeral 2 is a lower wiring layer, 3 is a wiring layer, 4 is an adhesive, 5 is conductive particles, 6 is a wiring portion, 7 is a substrate, A is a thin film wiring substrate, and B is a wiring substrate.

【0003】薄膜配線基板Aは、基板1の上に下層配線
層2が形成され、その上に配線層3が形成されている。
基板1にはガラスが用いられ、配線層3には例えばアル
ミニウムが用いられる。下層配線層2には、基板1およ
び配線層3の両方に対して接着性が良い材料、例えばク
ロムが用いられる。クロムは、ガラスおよびアルミニウ
ムに対して接着性が良い。
In the thin film wiring board A, a lower wiring layer 2 is formed on a substrate 1, and a wiring layer 3 is formed thereon.
Glass is used for the substrate 1, and aluminum is used for the wiring layer 3, for example. For the lower wiring layer 2, a material having good adhesiveness to both the substrate 1 and the wiring layer 3, for example, chromium is used. Chromium has good adhesion to glass and aluminum.

【0004】これに対して配線基板Bは、薄膜配線基板
Aと同様な構成のものであってもよいし、FPC(フレ
キシブル・プリント・サーキット…配線パターンを搭
載)とか、TAB(テープ・オートメイテッド・ボンデ
ィング…配線パターンとICを搭載)とかであってもよ
い。図では、配線部6は1層に描いてあるが、配線層だ
けが1層あることのみを示しているのではなく、要する
にその表面に配線層が含まれている層であることを示し
ている。従って、配線層の下に絶縁層が設けられている
構成等も、配線部6の内に含めてある。
On the other hand, the wiring board B may have the same structure as the thin film wiring board A, or may be an FPC (flexible printed circuit ... with a wiring pattern) or a TAB (tape automated). -Bonding ... Wiring pattern and IC mounted) may be used. In the figure, the wiring portion 6 is drawn as one layer, but it is not shown that only one wiring layer is provided, but in short, it is shown that the surface includes the wiring layer. There is. Therefore, the configuration in which the insulating layer is provided below the wiring layer is also included in the wiring section 6.

【0005】前記のような薄膜配線基板Aと配線基板B
の配線同士は、導電性粒子5を含む接着剤4を間に挟
み、上下より圧力を加えることにより接着される。導電
性粒子5は、例えば10μm程度の銀(Ag)の粒子であ
る。図2に図示するように、導電性粒子5が薄膜配線基
板Aの配線と配線基板Bの配線層に食い込み、電気的な
接続が行われる。物理的な接続は、接着剤4によって行
われる。なお、基板上の配線同士の接続には、フィルム
状の熱硬化樹脂中に表面を金属で被覆した熱可塑性樹脂
の微粒子を分散させたところの異方性導電フィルムを、
間に挟んで熱圧着して行うものもある。
Thin film wiring board A and wiring board B as described above
The wirings are bonded to each other by sandwiching the adhesive 4 containing the conductive particles 5 and applying pressure from above and below. The conductive particles 5 are, for example, silver (Ag) particles having a size of about 10 μm. As shown in FIG. 2, the conductive particles 5 dig into the wirings of the thin film wiring board A and the wiring layer of the wiring board B to establish electrical connection. The physical connection is made by the adhesive 4. Incidentally, for the connection of the wiring on the substrate, an anisotropic conductive film where fine particles of a thermoplastic resin whose surface is coated with a metal in a film-shaped thermosetting resin are dispersed,
Some of them are thermocompression-bonded between them.

【0006】配線基板間の接続に関する従来の文献とし
ては、例えば、特開昭62−246280号,日経エレクトロニ
クス,1989.7.24 (no.478)号,pp112〜113 がある。
Prior art documents relating to the connection between wiring boards include, for example, JP-A-62-246280, Nikkei Electronics, 1989.7.24 (no.478), pp112-113.

【0007】[0007]

【発明が解決しようとする課題】前記した従来の薄膜配
線基板では、導電性粒子5が配線層3に食い込むことに
よって電気的接続がなされるので、配線層3は、食い込
みがし易いように、軟らかい材質(例、アルミニウム)
を使い、しかも厚くしておかなければならないというよ
うな制限があった。本発明は、このような制限をなくす
ことを課題とするものである。
In the above-mentioned conventional thin film wiring substrate, since the conductive particles 5 bite into the wiring layer 3 to make an electrical connection, the wiring layer 3 is easily bited. Soft material (eg aluminum)
There was a restriction that it had to be used and kept thick. The present invention aims to eliminate such a limitation.

【0008】[0008]

【課題を解決するための手段】前記課題を解決するた
め、本発明の薄膜配線基板では、配線層の下に緩衝層を
設けることとした。
In order to solve the above problems, in the thin film wiring board of the present invention, a buffer layer is provided below the wiring layer.

【0009】[0009]

【作 用】薄膜配線基板において、配線層の下にポリ
イミド等からなる緩衝層を設けると、導電性粒子を含ん
だ接着剤を用いて他の配線基板と圧力をかけて接続する
際、導電性粒子の配線層への食い込みが良好に行われ
る。そのため、配線層の材料としては、硬い材料を用い
ることが出来るし、層の厚さは薄くても良くなる。
[Operation] In a thin film wiring board, if a buffer layer made of polyimide or the like is provided under the wiring layer, it will be electrically conductive when pressure is applied to another wiring board using an adhesive containing conductive particles. The particles are favorably cut into the wiring layer. Therefore, a hard material can be used as the material of the wiring layer, and the layer can be thin.

【0010】[0010]

【実施例】以下、本発明の実施例を図面に基づいて詳細
に説明する。図1は、本発明の薄膜配線基板を他の配線
基板と接続した状態を示す図である。符号は図2のもの
に対応し、8は緩衝層である。ガラス等の基板1の上
に、該基板1と接着性のよいクロム等から成る下層配線
層2を着膜する(例、0.5 μm)。その上に、弾性を有
する材料、例えばポリイミドを着膜し(例、1.5 μ
m)、緩衝層8とする。
Embodiments of the present invention will now be described in detail with reference to the drawings. FIG. 1 is a diagram showing a state in which the thin film wiring board of the present invention is connected to another wiring board. Reference numerals correspond to those in FIG. 2, and 8 is a buffer layer. On the substrate 1 made of glass or the like, a lower wiring layer 2 made of chromium or the like having good adhesiveness to the substrate 1 is deposited (eg, 0.5 μm). An elastic material such as polyimide is deposited on top of it (eg 1.5 μm).
m) and the buffer layer 8.

【0011】緩衝層8の上に配線層3を着膜するが、そ
の材料には硬い導電材料でも用いることができ、厚さも
従来のもの(図2の配線層3参照)より薄くてもよい。
その理由は、配線層3の下層に弾性を有する緩衝層8を
設けたので、薄膜配線基板Aと配線基板Bとを圧力をか
けて接着する際、緩衝層8が導電性粒子5の食い込み深
さを受容するので、導電性粒子5(例、10μm程度の
銀)が配線層3に食い込み易くなるからである。硬くて
も薄ければ突き破り易く、その先は軟らかい緩衝層8に
食い込むだけであるから、容易に深く食い込むことが出
来る。そのため、硬くてあまり厚くできないITO(イ
ンジウム・ティン・オキサイド,例、0.06μm)等で
も、配線層3の導電材料として使用することが出来る。
即ち、配線層3の材料の選定や厚さの設定をする際、従
来あったような制限はなくなる。
Although the wiring layer 3 is deposited on the buffer layer 8, a hard conductive material can be used as the material, and the thickness may be smaller than that of the conventional one (see the wiring layer 3 in FIG. 2). ..
The reason for this is that since the buffer layer 8 having elasticity is provided below the wiring layer 3, when the thin film wiring board A and the wiring board B are adhered by applying pressure, the buffer layer 8 penetrates into the conductive particles 5. This is because the conductive particles 5 (eg, silver having a thickness of about 10 μm) easily bite into the wiring layer 3 because they receive the temperature. If it is hard and thin, it easily breaks through, and since the tip only bites into the soft buffer layer 8, it can easily bite deeply. Therefore, ITO (indium tin oxide, for example, 0.06 μm) or the like that is hard and cannot be made too thick can be used as the conductive material of the wiring layer 3.
That is, when selecting the material of the wiring layer 3 and setting the thickness, there are no restrictions as in the past.

【0012】[0012]

【発明の効果】以上述べた如く、本発明の薄膜配線基板
によれば、緩衝層を設け、その上に配線層を設けたの
で、導電性粒子を含む接着剤を用いて他の配線基板と圧
力をかけて接続する際、導電性粒子の配線層への食い込
みが容易となる。そのため、配線層の材料の選定や厚さ
の設定につき、軟らかい材料でなければならないとか、
厚くなくてはならないとかといった条件を満たさなくて
もよくなった。
As described above, according to the thin film wiring board of the present invention, since the buffer layer is provided and the wiring layer is provided thereon, another wiring board is formed by using the adhesive containing conductive particles. When connecting by applying pressure, the conductive particles can easily penetrate into the wiring layer. Therefore, when selecting the material of the wiring layer and setting the thickness, it must be a soft material,
It is no longer necessary to satisfy the conditions such as having to be thick.

【図面の簡単な説明】[Brief description of drawings]

【図1】 本発明の薄膜配線基板を他の配線基板と接続
した状態を示す図
FIG. 1 is a diagram showing a state in which a thin film wiring board of the present invention is connected to another wiring board.

【図2】 従来の薄膜配線基板を他の配線基板と接続し
た状態を示す図
FIG. 2 is a diagram showing a state in which a conventional thin film wiring board is connected to another wiring board.

【符号の説明】[Explanation of symbols]

1…基板、2…下層配線層、3…配線層、4…接着剤、
5…導電性粒子、6…配線部、7…基板、8…緩衝層、
A…薄膜配線基板、B…配線基板
1 ... Substrate, 2 ... Lower wiring layer, 3 ... Wiring layer, 4 ... Adhesive,
5 ... Conductive particles, 6 ... Wiring part, 7 ... Substrate, 8 ... Buffer layer,
A ... Thin film wiring board, B ... Wiring board

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 配線層の下に緩衝層を設けたことを特徴
とする薄膜配線基板。
1. A thin-film wiring board comprising a buffer layer provided below the wiring layer.
JP23121691A 1991-08-17 1991-08-17 Thin-film wiring substrate Pending JPH0548230A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23121691A JPH0548230A (en) 1991-08-17 1991-08-17 Thin-film wiring substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23121691A JPH0548230A (en) 1991-08-17 1991-08-17 Thin-film wiring substrate

Publications (1)

Publication Number Publication Date
JPH0548230A true JPH0548230A (en) 1993-02-26

Family

ID=16920148

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23121691A Pending JPH0548230A (en) 1991-08-17 1991-08-17 Thin-film wiring substrate

Country Status (1)

Country Link
JP (1) JPH0548230A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5839188A (en) * 1996-01-05 1998-11-24 Alliedsignal Inc. Method of manufacturing a printed circuit assembly
US6147870A (en) * 1996-01-05 2000-11-14 Honeywell International Inc. Printed circuit assembly having locally enhanced wiring density
JP2015106596A (en) * 2013-11-29 2015-06-08 株式会社トクヤマ Light extraction device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5839188A (en) * 1996-01-05 1998-11-24 Alliedsignal Inc. Method of manufacturing a printed circuit assembly
US6147870A (en) * 1996-01-05 2000-11-14 Honeywell International Inc. Printed circuit assembly having locally enhanced wiring density
US6246014B1 (en) 1996-01-05 2001-06-12 Honeywell International Inc. Printed circuit assembly and method of manufacture therefor
JP2015106596A (en) * 2013-11-29 2015-06-08 株式会社トクヤマ Light extraction device

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