JPH0547938A - Semiconductor device and its manufacture - Google Patents

Abstract

PURPOSE:To provide a wiring connection part of an integrated circuit capable of reducing the area of a connection part and manufacturing cost. CONSTITUTION:A first poly silicon film 26 is connected with an n<+> type diffusion layer 23, via a second poly silicon film 31 formed in the inside of an aperture 29 formed so as to penetrate the first poly silicon film 26. Thereby necessary area can be reduced. Since the aperture 29 and an aperture 28 which connects a second poly silicon film 30 with an n<+> type diffusion layer 24 can be formed by using the same photo mask, manufacturing process can be simplified.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a novel structure of an interconnection connecting portion of an integrated circuit having a multilayer interconnection structure and a manufacturing method thereof.

[0002]

2. Description of the Related Art Various methods are known for the structure of a conventional wiring connecting portion of an integrated circuit having multi-layered wiring. Here, two typical examples will be described with reference to FIGS.

The wiring connection portion of the conventional structure shown in FIG.
-Type silicon substrate 1 n ⁺ -type diffusion layer 3 and 4 separated by formed field oxide film 2 on a first CVD oxide film 5 formed thereon, the n ⁺ -type diffusion layer 3 of First
A first opening 6 formed in the CVD oxide film 5, a first polysilicon film 7 formed on and in the first CVD oxide film 5, and a first polysilicon film 7. A second CVD oxide film 8 formed on the silicon film 7 and the first CVD oxide film 5, and a first CVD film formed on the n ⁺ -type diffusion layer 4.
Openings 9 in the oxide film 5 and the second CVD oxide film 8
And a second polysilicon film 10 formed on the first CVD oxide film 8 and in the second opening 9. N ⁺ -type diffusion layer 3 and the first polysilicon film 7 through the first opening 6, as can be seen from FIG. 3, also through the second opening 9 n ⁺
The type diffusion layer 4 and the second polysilicon film 10 are electrically connected.

Next, in the wiring connection portion of the conventional structure shown in FIG. 4, n ⁺ type diffusion layers 3 and 4 separated by a field oxide film 2 formed on a P type silicon substrate 1, and on the n ⁺ type diffusion layers 3 and 4 are formed. The formed first CVD oxide film 5, the first polysilicon film 7 formed on the first CVD oxide film 5, the first polysilicon film 7 and the first CVD oxide film 5. Of the second CVD oxide film 8 formed on the n ⁺ -type diffusion layers 3 and 4 and the openings 11 and 9 formed on the second CVD oxide film 8 and the second CVD oxide film 8 on the n ⁺ type diffusion layers 3 and 4, and The opening 12 formed in the second CVD oxide film 8 on the first polysilicon oxide film 7 and the second CVD oxide film 8 and the openings 9, 1
The second polysilicon films 10 and 13 are formed in the first and the second polysilicon films 12, respectively. In FIG. 4, the n ⁺ type diffusion layer 4 and the second polysilicon film 10 are electrically connected through the opening 9. The first polysilicon film 7 has openings 12,
N ⁺ through the second polysilicon film 13 and the opening 11
It is electrically connected to the mold diffusion layer 3.

[0005]

In the structure of the conventional wiring connecting portion shown in FIG. 3, two photomasks are required to form the first opening 6 and the second opening 9. did. Further, in the structure shown in FIG. 4, the number of photomasks required to form the openings 9, 11 and 12 is one, but the connection between the first polysilicon film 7 and the n ⁺ -type diffusion layer 3 is made. Since it is performed through the second polysilicon film 13, there is a drawback that the area of the connection portion becomes large.

[0006]

The present invention has been made to solve the above problems of the prior art.
A first conductive film, a first insulating film, a second conductive film, and a second insulating film are sequentially stacked on a semiconductor substrate, and then the second insulating film and the second conductive film are formed. In the semiconductor device, an opening penetrating the first insulating film to reach the first conductive film is formed, and a third conductive film is formed inside the opening.

Further, according to the present invention, a first conductive film, a first insulating film, a second conductive film and a second insulating film are sequentially laminated on a semiconductor substrate, and then the second conductive film is formed. From the insulating film to the second
A first opening penetrating the same conductive film and the first insulating film to reach the first conductive film, and penetrating the second insulating film and the first insulating film to reach the first conductive film. A second aperture is formed,
A third conductive film is formed inside the first opening, and a third conductive film is further formed inside the second opening and on the second insulating film. Is.

Further, according to the present invention, the step of forming a first conducting film on a semiconductor substrate, the step of forming a first insulating film on the first conductive film, and the first insulating film. A step of forming a second conductive film thereon, a step of forming a second insulating film on the second conductive film and on the first insulating film, and a step of forming a second photoresist using the first photoresist as a mask. Removing the insulating film, the second conductive film and the first insulating film by etching to form a first opening, and further, using the first photoresist as a mask, the second insulating film and the first insulating film. And removing the insulating film by etching to form a second opening, and forming a third conductive film inside the first opening and inside the second opening and on the second insulating film. And a step of etching the third conductive film using the second photoresist formed on the second opening as a mask. It is a manufacturing method of a semiconductor device having a step of removing Te.

[0009]

According to the semiconductor device of the present invention, when the first conductive film and the second conductive film are electrically connected to each other through the third conductive film, the area of the connecting portion is reduced by the above-mentioned structure. Is possible.

Further, according to the method of manufacturing a semiconductor device of the present invention, the connection between the first conductive film and the second conductive film and the first conductive film are connected.
It is possible to form the openings necessary for connecting the conductive film of No. 3 and the third conductive film with one mask.

Further, according to the method of manufacturing a semiconductor device of the present invention, it is possible to manufacture a wiring connecting portion which can reduce the number of masks and the required area.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail with reference to the sectional view of the principal part shown in FIG. 1 and the sectional view in the order of steps of FIG.

The wiring connection portion of the present invention comprises n ⁺ type diffusion layers 23 and 24 separated by a field oxide film 22 on a P type silicon substrate 21 in FIG. 1, and a first CVD oxide film 25 having a thickness of about 500 nm. , A first polysilicon film 26 formed on the CVD oxide film 25 and having a film thickness of about 300 nm doped with phosphorus at about 10 ²⁰ cm ^−3, and a first polysilicon film 26.
And a film thickness of about 50 formed on the first CVD oxide film 25.
0 nm second CVD oxide film 27, first CVD oxide film 25 on n ⁺ type diffusion layer 24, second opening 28 formed in second CVD oxide film 27, and first CV on n ⁺ type diffusion layer 23.
D oxide film 25, first polysilicon film 26 and second CV
The first opening 29 formed in the D oxide film 27 and the phosphorus having a film thickness of about 400 nm formed on the second opening 28 and the second CVD oxide film 27 are doped by about 10 ²⁰ cm ^-3 . 2 polysilicon film 30.

In FIG. 1, the first polysilicon film 26 and the n ⁺ -type diffusion layer 23 are formed in the first opening 29 as the second polysilicon film 26.
Are electrically connected via the polysilicon film 31. Comparing this with FIG. 4 showing the conventional structure, it is clear that the area required for the connection portion can be reduced by the number of required holes reduced from two to one.

In FIG. 1, the second polysilicon film 30 and n
^{The +} type diffusion layer 24 is electrically connected through the second opening 28. Comparing FIG. 1 with FIG. 3 showing the conventional structure, FIG.
However, the openings 6 and 9 must be formed by different photomasks, but in FIG. 1, the openings 28 and 29 can be formed by the same photomask, so that the number of masks can be reduced by one.

Next, the method for manufacturing the wiring connecting portion of the present invention will be described in detail with reference to FIG. First, as shown in FIG. 2A, after forming a field oxide film 22 having a film thickness of about 500 nm on a P-type silicon substrate 21 by a known selective oxidation method,
Arsenic ions are accelerated by an ion implantation method at an acceleration energy of 40 KeV,
It is implanted into the silicon substrate 1 under the condition that the dose amount is about 5 × 10 ¹⁵ cm ⁻² . Next, the silicon substrate 21 is subjected to thermal annealing at about 900 ° C. to activate and diffuse the implanted element to form the n ⁺ type diffusion layers 23 and 24.

Next, as shown in FIG. 2B, a silicon oxide film 25 having a film pressure of about 500 nm is formed by the well-known atmospheric pressure CVD method, and then a first film of phosphorus of about 10 ²⁰ cm ^-3 with a film pressure of about 300 nm is doped.
The polysilicon film 26 is formed by the well-known LPCVD method.
Next, the first polysilicon film 26 is removed by dry etching using the first photoresist 32 as a mask.

Next, after removing the first photoresist 32 by a well-known technique, as shown in FIG. 2C, a well-known atmospheric pressure CVD method is used to form a BPSG film 27 (boron concentration of about 3 nm) having a film pressure of about 500 nm. Wt%, phosphorus concentration about 6 wt%), forming about 9
Heat treatment at 00 ° C. to fluidize the BPSG film 27,
Flatten the surface. Next, using the photoresist 33 as a mask, the silicon oxide film 25 and the BPSG film 27 on the n ⁺ type diffusion layer 24 are removed by the dry etching method to form the second opening 28, and at the same time, n ⁺ Type diffusion layer 23
The upper BPSG film 27, the first polysilicon film 26 and the silicon oxide film 25 are removed to form a first opening 29.

For dry etching at this time, first, about 50 BPSG film 27 is mixed with a mixed gas of CHF ₃ and O _2.
The first polysilicon film 26 in the opening 29 is exposed by etching to about 0 nm. Next, the first polysilicon film 26 in the openings 29 is completely removed by a mixed gas of chlorine gas and bromine gas. Further, the silicon oxide film 25 (and the rest of the BPSG film 27 in the openings 28) is removed again with a mixed gas of CHF ₃ and O ₂ , and the underlying n ⁺ type diffusion layer 23 is formed in both openings 28 and 29. And expose 24.

Next, after removing the second photoresist 33, as shown in FIG. 2D, a second polysilicon film 30 having a film thickness of about 400 nm and doped with phosphorus of about 10 ²⁰ cm ^{-3 is formed.}
(31) is formed by the well-known LPCVD method. Subsequently, a third photoresist 34 is formed on the opening 28, and the second polysilicon film 30 (31) is removed by etching using the opening as a mask, whereby the wiring connection portion shown in FIG. Complete.

In the present embodiment, the two-layer polysilicon structure has been exemplified, but it goes without saying that the present invention can be applied to other wiring materials such as polycide, tungsten and aluminum alloy. The present invention can naturally be applied to a structure having two or more wiring layers.

[0022]

As is apparent from the above embodiments, according to the present invention, the area of the wiring connecting portion can be reduced, so that the integration degree of the integrated circuit can be increased. Further, since the number of photomasks for forming the openings can be reduced, it is possible to contribute to the shortening of the manufacturing process of the integrated circuit and the cost reduction.

[Brief description of drawings]

FIG. 1 is a cross-sectional view of a main portion showing a wiring connection portion according to an embodiment of the present invention.

2A to 2C are cross-sectional views in order of the processes, for explaining the method for manufacturing the same wiring connection portion.

FIG. 3 is a cross-sectional view of a main part of a conventional wiring connection part.

FIG. 4 is a cross-sectional view of a main part of a wiring connection portion of Conventional Example 2.

[Explanation of symbols]

21 P-type silicon substrate 22 Field oxide film 23, 24 n ⁺ type diffusion layer 25 First CVD oxide film (silicon oxide film) 26 First polysilicon film 27 Second CVD oxide film (BPSG film) 28, 29 Opening holes 30, 31 Second polysilicon film

Claims (3)

[Claims] 1. A first conductive film, a first insulating film, a second conductive film, and a second insulating film are sequentially laminated on a semiconductor substrate, and the second insulating film and the second insulating film are formed on the semiconductor substrate. Conductive film and first
An opening is formed through the insulating film to the first conductive film, and a third conductive film is formed inside the opening. 2. A first conductive film, a first insulating film, a second conductive film, and a second insulating film are sequentially laminated on a semiconductor substrate, and the second insulating film and the second insulating film are formed on the semiconductor substrate. Conductive film and first
A first opening penetrating the second insulating film and reaching the first conductive film, and a second opening penetrating the second insulating film and the first insulating film to the first conductive film. A third conductive film is formed inside the first opening, and a third conductive film is formed inside the second opening and on the second insulating film. Characteristic semiconductor device. 3. A step of forming a first conductive film on a semiconductor substrate, a step of forming a first insulating film on the first conductive film, and a second step on the first insulating film. Forming a conductive film, and forming a second conductive film on the second conductive film and the first insulating film.
The step of forming the insulating film, and the second insulating film, the second conductive film, and the first insulating film are removed by etching using the first photoresist as a mask to form the first opening. And a step of forming the second opening by removing the second insulating film and the first insulating film by etching at the same time as the step, using the first photoresist as a mask. Forming a third conductive film inside the opening, inside the second opening and on the second insulating film; and using the second photoresist formed on the second opening as a mask , The third
And a step of removing the conductive film of 1. by a method of manufacturing a semiconductor device.