JPH0543162B2 - - Google Patents
Info
- Publication number
- JPH0543162B2 JPH0543162B2 JP59238942A JP23894284A JPH0543162B2 JP H0543162 B2 JPH0543162 B2 JP H0543162B2 JP 59238942 A JP59238942 A JP 59238942A JP 23894284 A JP23894284 A JP 23894284A JP H0543162 B2 JPH0543162 B2 JP H0543162B2
- Authority
- JP
- Japan
- Prior art keywords
- electrodes
- plate
- dividing grooves
- shaped substrate
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000004519 manufacturing process Methods 0.000 claims description 18
- 239000000758 substrate Substances 0.000 claims description 11
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 claims description 8
- 238000000034 method Methods 0.000 claims description 6
- 229920005989 resin Polymers 0.000 claims description 5
- 239000011347 resin Substances 0.000 claims description 5
- 238000007650 screen-printing Methods 0.000 claims description 4
- 238000005476 soldering Methods 0.000 claims description 4
- 239000011787 zinc oxide Substances 0.000 claims description 4
- 239000000463 material Substances 0.000 claims 1
- 238000005245 sintering Methods 0.000 description 6
- 238000000465 moulding Methods 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 3
- 230000006866 deterioration Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 239000003822 epoxy resin Substances 0.000 description 2
- 229920000647 polyepoxide Polymers 0.000 description 2
- 238000000926 separation method Methods 0.000 description 2
- 238000010276 construction Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
Landscapes
- Thermistors And Varistors (AREA)
Description
【発明の詳細な説明】
産業上の利用分野
本発明は各種電子機器のサージ保護に用いられ
るチツプバリスタの製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a method for manufacturing a chip varistor used for surge protection of various electronic devices.
従来例の構成とその問題点
従来のチツプバリスタの製造工程は第３図のよ
うに構成されている。Construction of the conventional example and its problems The manufacturing process of the conventional chip varistor is constructed as shown in FIG.
まず、酸化亜鉛を主成分としこれに高抵抗の酸
化物および電導性酸化物を少量添加して成形〔ａ
−１〕、焼結〔ａ−２〕した円柱状の基体を形成
し、この基体をスライスマシーンを用いて適当な
板状基体を形成〔ａ−３〕し、次いでこの板状基
体の表面にダイシングソーを用いて縦横に分割溝
を設け〔ａ−４〕、更に板状基体の両面にスクリ
ーン印刷等の手段で電極を印刷〔ａ−５〕し、ト
ンネル炉で電極焼付〔ａ−６〕をして電極形成を
行い、その後、板状基体の前記分割溝に沿つて単
体に分割〔ａ−７〕し、この単体の電極面上にリ
ード端子板を半田付により取り付け〔ａ−８〕た
後、前記リード端子板の端子部分以外をエポキシ
樹脂でモールド成形〔ａ−９〕してなるものであ
る。 First, zinc oxide is the main component, and a small amount of a high-resistance oxide and a conductive oxide are added to it and molded [a
-1], sintered [a-2] to form a cylindrical base, use a slicing machine to form a suitable plate-like base [a-3], and then apply the surface of this plate-like base to Dividing grooves are formed vertically and horizontally using a dicing saw [a-4], electrodes are printed on both sides of the plate-shaped substrate by screen printing or other means [a-5], and the electrodes are baked in a tunnel furnace [a-6]. After that, the plate-shaped substrate is divided into individual pieces along the dividing groove [a-7], and a lead terminal plate is attached to the electrode surface of this single piece by soldering [a-8]. After that, the parts other than the terminal parts of the lead terminal plate are molded with epoxy resin [a-9].
しかしながら、このような製造方法では〔ａ−
６〕で電極焼付を行つた後に〔ａ−７〕で基板分
割するため、分割された部分に熱的、物性的に不
安定な個所を生じ、樹脂のモールド成形、高温負
荷試験等において電気特性が劣化するという欠点
を有していた。また、焼結後の工程が複雑であり
量産性に問題があつた。 However, in such a manufacturing method, [a-
After electrode baking is performed in step 6], the board is divided in step [a-7], resulting in thermally and physically unstable areas in the separated parts, resulting in poor electrical properties during resin molding, high-temperature load tests, etc. It had the disadvantage that it deteriorated. In addition, the process after sintering was complicated, which caused problems in mass production.
発明の目的
本発明は複数個のチツプバリスタを能率よく、
しかも電気特性の安定しているチツプバリスタを
生産できる製造方法を提供することを目的とす
る。Purpose of the Invention The present invention efficiently operates multiple chip varistors.
Moreover, it is an object of the present invention to provide a manufacturing method that can produce a chip varistor with stable electrical characteristics.
発明の構成
本発明のチツプバリスタの製造方法は、酸化亜
鉛を主成分としこれに高抵抗の酸化物および電導
性酸化物を少量添加して成形ならびに成形体の表
面に縦横に分割溝を設け、次いで焼結して分割溝
を有した適当な板状基体を形成し、この板状基体
の両面にスクリーン印刷等の手段で電極を印刷
し、電極が印刷された板状基体を前記分割溝に沿
つて単体に分割した後に電極焼付をして電極形成
を行い、前記単体の電極面上にリード端子板を半
田付等により取りつけた後、リード端子板の端子
部分以外を樹脂等でモールド成形するものであ
る。Structure of the Invention The method for producing a chip varistor of the present invention includes forming zinc oxide as a main component, adding a small amount of a high-resistance oxide and a conductive oxide thereto, and forming dividing grooves vertically and horizontally on the surface of the formed body. Next, a suitable plate-shaped substrate having dividing grooves is formed by sintering, electrodes are printed on both sides of this plate-shaped substrate by means such as screen printing, and the plate-shaped substrate with the electrodes printed is placed in the dividing grooves. After dividing into individual pieces along the axis, electrodes are formed by baking the electrodes, and after attaching a lead terminal plate to the electrode surface of the single piece by soldering etc., the parts other than the terminal parts of the lead terminal plate are molded with resin etc. It is something.
このように単体への基板分割後に電極焼付を行
うことにより、熱的、物性的に不安定な個所がな
くなり、樹脂のモールド成形、高温負荷試験等に
おいて電気特性の劣化が生じない高信頼性のチツ
プバリスタが得られることになる。また成形体表
面に分割溝を設けるため焼結後の工程が簡略化さ
れ量産性が向上する。 By baking the electrodes after dividing the board into individual pieces in this way, there are no thermally or physically unstable parts, and the result is a highly reliable structure that does not cause deterioration of electrical properties during resin molding, high-temperature load tests, etc. You will get a chip barista. Furthermore, since the dividing grooves are provided on the surface of the compact, the steps after sintering are simplified and mass productivity is improved.
実施例の説明
以下に本発明の実施例におけるチツプバリスタ
の製造工程を説明する。DESCRIPTION OF EMBODIMENTS The manufacturing process of a chip varistor in an embodiment of the present invention will be described below.
第１図は本発明の製造方法のフロー図で、ま
ず、酸化亜鉛を主成分としこれに高抵抗の酸化物
および電導性酸化物を少量添加して成形〔ｂ−
１〕し、その後成形体の表面に縦横に分割溝を設
け〔ｂ−２〕、焼結により分割溝を有した適当な
板状基板を形成〔ａ−３〕し、分割溝を有した板
状基板の両面にスクリーン印刷等の手段で電極を
印刷〔ｂ−４〕し、この板状基体を前記分割溝に
沿つて単体に分割〔ｂ−５〕した後、トンネル炉
で電極焼付をして電極形成〔ｂ−６〕を行い、そ
の後、前記単体の電極面上にリード端子板を半田
付により取り付け〔ｂ−７〕た後、前記リード端
子板の端子部分以外をエポキシ樹脂でモールド成
形〔ｂ−８〕してなるものである。 FIG. 1 is a flowchart of the manufacturing method of the present invention. First, zinc oxide is the main component, and a small amount of a high-resistance oxide and a conductive oxide are added thereto and molded [b-
1], and then provide dividing grooves vertically and horizontally on the surface of the molded body [b-2], and form a suitable plate-like substrate with dividing grooves by sintering [a-3], and form a plate with dividing grooves. After printing electrodes on both sides of the plate-shaped substrate by screen printing or other means [b-4], and dividing the plate-shaped substrate into individual pieces along the dividing grooves [b-5], the electrodes are baked in a tunnel furnace. After that, a lead terminal plate is attached by soldering on the single electrode surface [b-7], and then the parts other than the terminal parts of the lead terminal plate are molded with epoxy resin. [b-8]
上記実施例では〔ｂ−１〕の成形後に〔ｂ−
２〕において分解溝形成を実施したが、分割溝を
〔ｂ−１〕の成形と同時に実行することにより、
一層に工程を簡略化できる。 In the above example, after molding [b-1], [b-
Although the separation groove formation was carried out in [2], by performing the separation groove formation at the same time as the formation of [b-1],
The process can be further simplified.
このように本発明の製造方法では分割〔ｂ−
５〕を電極焼付〔ｂ−６〕に先立つて実行するた
め、熱的、物性的に不安定な個所がなくなる。 In this way, in the manufacturing method of the present invention, the division [b-
Since step 5] is performed prior to electrode baking [b-6], there are no thermally or physically unstable locations.
第２図は本発明の製造方法による製品Ａと従来
の製造方法による製品Ｂとを比較している。この
第２図からわかるように、高温負荷試験において
本発明による製品Ａは従来の製品Ｂよりもバリス
タ電圧の劣化が少なく、また樹脂モールドの成形
において電気特性の劣化が起こるという問題も生
じないものである。 FIG. 2 compares product A manufactured by the manufacturing method of the present invention and product B manufactured by the conventional manufacturing method. As can be seen from Fig. 2, product A according to the present invention shows less deterioration in varistor voltage than conventional product B in the high-temperature load test, and also does not cause the problem of deterioration of electrical characteristics during resin molding. It is.
発明の効果
以上の説明のように本発明のチツプバリスタの
製造方法は電極焼付に先立つて分割を実施するた
め、生産の能率を損うことなくチツプバリスタ特
性を大幅に改善でき、高信頼性のチツプバリスタ
を生産することができる。また、本発明では焼結
前の成形体表面に分割溝を設けるため、焼結後の
工程が簡略化され量産性が向上し、その実用的価
値には大なるものがある。Effects of the Invention As explained above, since the chip varistor manufacturing method of the present invention performs division before electrode baking, the chip varistor characteristics can be significantly improved without impairing production efficiency, and high reliability can be achieved. Chip baristas can be produced. Furthermore, in the present invention, since dividing grooves are provided on the surface of the compact before sintering, the steps after sintering are simplified and mass productivity is improved, which has great practical value.
第１図は本発明の製造方法の工程図、第２図は
従来の製品と本発明の製造方法による製品の高温
負荷特性の比較図、第３図は従来の製造方法の工
程図である。
Ａ……本発明の製造方法による製品、Ｂ……従
来の製品。
FIG. 1 is a process diagram of the manufacturing method of the present invention, FIG. 2 is a comparison diagram of high temperature load characteristics of a conventional product and a product produced by the manufacturing method of the present invention, and FIG. 3 is a process diagram of the conventional manufacturing method. A...Product produced by the manufacturing method of the present invention, B...Conventional product.
Claims (1)
および電導性酸化物を少量添加して成形ならびに
この成形体の表面に縦横に分割溝を設け、次いで
焼結して分割溝を有した適当な板状基体を形成
し、この板状基体の両面にスクリーン印刷等の手
段で電極を印刷し、電極が印刷された板状基体を
前記分割溝に沿つて単体に分割した後に電極焼付
をして電極形成を行い、前記単体の電極面上にリ
ード端子板を半田付等により取り付けた後、リー
ド端子板の端子部分以外を樹脂等でモールド成形
するチツプバリスタの製造方法。1 Zinc oxide is the main component, to which small amounts of high-resistance oxides and conductive oxides are added, molded, and the surface of this molded body is provided with dividing grooves vertically and horizontally, and then sintered to form a suitable material with dividing grooves. A plate-shaped substrate is formed, electrodes are printed on both sides of this plate-shaped substrate by means such as screen printing, and the plate-shaped substrate on which the electrodes are printed is divided into individual pieces along the dividing grooves, and then the electrodes are baked. A method for manufacturing a chip varistor, in which electrodes are formed using the above-mentioned electrodes, a lead terminal plate is attached to the single electrode surface by soldering, etc., and then the parts other than the terminal portions of the lead terminal plate are molded with resin or the like.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59238942A JPS61116802A (en) | 1984-11-13 | 1984-11-13 | Manufacture of chip varistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59238942A JPS61116802A (en) | 1984-11-13 | 1984-11-13 | Manufacture of chip varistor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61116802A JPS61116802A (en) | 1986-06-04 |
| JPH0543162B2 true JPH0543162B2 (en) | 1993-06-30 |
Family
ID=17037566
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59238942A Granted JPS61116802A (en) | 1984-11-13 | 1984-11-13 | Manufacture of chip varistor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61116802A (en) |
-
1984
- 1984-11-13 JP JP59238942A patent/JPS61116802A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS61116802A (en) | 1986-06-04 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4992771A (en) | Chip resistor and method of manufacturing a chip resistor | |
| US2828454A (en) | Ceramic capacitor | |
| JPH0316251Y2 (en) | ||
| JPH0543162B2 (en) | ||
| US3682841A (en) | Voltage dependent resistors in a bulk type | |
| KR0151412B1 (en) | Surge absorber | |
| JP3284873B2 (en) | Manufacturing method of chip type thermistor | |
| JPS61116803A (en) | Manufacture of chip varistor | |
| US3322995A (en) | Electronic component and method of manufacture thereof | |
| JPH10199709A (en) | Multilayer type varistor | |
| JPS60136204A (en) | Method of producing chip varistor | |
| JP2689756B2 (en) | Sudden change thermistor and manufacturing method thereof | |
| JPH01295403A (en) | Chip varister | |
| JPS6092692A (en) | Composite circuit with varistor and method of producing same | |
| JPH0410601A (en) | Thick film resistor and manufacture thereof | |
| JPS62112313A (en) | Penetrating capacitor | |
| JPS607704A (en) | Method of producing chip varistor | |
| JPH0316242Y2 (en) | ||
| JPH02246307A (en) | Compound capacitor and its manufacture | |
| JPS6228740Y2 (en) | ||
| GB1068319A (en) | Ceramic capacitor | |
| JPH0258803A (en) | Chip type thermistor | |
| JPH10270145A (en) | Discharge gap element and surge protection device | |
| JPS6373501A (en) | Resistor | |
| JPH04181702A (en) | Chipthermistor and manufacture thereof |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |