JPH0543019U - Encoder interpolation device - Google Patents

Abstract

(57) [Abstract] [Purpose] To provide an encoder interpolating device that can always obtain a highly accurate detection signal without being affected by noise or the like. According to a counting operation, a storage unit 3 that outputs corresponding phase angle data from prestored phase angle data of polar coordinates as actual phase angle data by an address signal based on signals having different 90 ° phases from an encoder. Based on a comparison between the up / down counter 5 for outputting the sequential phase angle data for interpolation and the interpolation phase angle data from the up / down counter 5 and the actual phase angle data from the storage means 3. Control means 4, 6, 7, and 8 for controlling the counting operation of the up / down counter 5 are provided so that the interpolation phase angle data matches the actual phase angle data, and the up / down counter 5 by this control means. The output of the encoder is interpolated based on the control signal of.

Description

[Detailed description of the device]

[0001]

[Industrial applications]

 The present invention relates to an interpolation device for an encoder.

[0002]

[Prior Art]

 Conventionally, a resistance division method and a phase modulation method are known as interpolation methods for increasing the resolution of an encoder. However, in the resistance division method, there is a problem that the division resistance and the comparator for binarization increase with the high interpolation, and the circuit scale becomes large, and there are variations in the division resistance and the comparator. There is a problem that false detection occurs. Further, in the phase modulation method, since the time from zero-cross to zero-cross of the phase-modulated wave is measured, the real-time property is poor and there is a problem in applying it to high-speed, high-precision control.

As an interpolation method for solving such a problem, for example, in JP-A-2-38814 and JP-A-2-186221, a ROM in which phase angle data corresponding to a sine component and a cosine component are stored in advance is disclosed. It has been proposed that the sine component (A phase) and the cosine component (B phase) having different 90 ° phases from the encoder be used as an address signal to read the corresponding phase angle data from the ROM.

[0004]

[Problems to be solved by the device]

 However, in the interpolation method disclosed in the above publication, if the sine component or cosine component from the encoder has a noise component, the measured object is not actually displaced. However, the noise component causes the address signal to change abruptly, resulting in the output of an incorrect phase angle. Therefore, if the up / down counter is operated based on the phase angle data from the ROM or the A phase and the B phase are created in order to detect the displacement amount and speed of the object to be measured, noise components will be generated. A sudden change in the phase angle makes it impossible to determine the displacement direction of the object to be measured, and the up / down counter and the A-phase and B-phase generation circuits operate abnormally, and an accurate detection signal can be obtained for a while. There is a problem of disappearing.

The present invention has been made in view of such conventional problems, and an encoder configured appropriately so that a highly accurate detection signal can always be obtained without being affected by noise or the like. It is an object of the present invention to provide an interpolating device.

[0006]

[Means for Solving the Problems]

 In order to achieve the above object, the present invention outputs corresponding phase angle data from polar angle phase angle data stored in advance as real phase angle data by an address signal based on signals having different 90 ° phases from an encoder. Storage means, an up / down counter for outputting the interpolating phase angle data sequentially according to the count operation, the interpolating phase angle data from the up / down counter and the real phase from the storing means. Control means for controlling the counting operation of the up / down counter so that the phase angle data for interpolation coincides with the actual phase angle data on the basis of comparison with the angle data. The encoder output is interpolated based on the up / down counter control signal.

[0007]

[Action]

 In such a configuration, the corresponding real phase angle data is read from the storage means by the address signal based on the signals having different 90 ° phases from the encoder, and the real phase angle data is interpolated from the up / down counter. Based on the comparison with the phase angle data, the control means controls the counting operation of the up / down counter so that the interpolation phase angle data matches the actual phase angle data. Therefore, since the interpolation phase angle data follows the actual phase angle data, the change of the interpolation phase angle data, that is, the control signal of the up / down counter by the control means is included in the output of the encoder. It becomes an insertion signal.

[0008]

【Example】

 FIG. 1 shows a first embodiment of the present invention. In this embodiment, analog A-phase and B-phase signals with different 90 ° phases from the encoder are converted into digital signals by A / D converters 1 and 2, respectively, and these A / D converters 1 and 2 are converted. Is supplied to the ROM 3 as an address signal. The ROM 3 stores in advance the phase angle (θ) corresponding to the A-phase and B-phase signals, the vector length, and the data representing the error when the vector length is out of the normal value range, and the A / D converter 1 The corresponding address data is output by the address signals from and.

Of the data output from the ROM 3, phase angle (θ) data, that is, real phase angle data is supplied to one input terminal (A) of the coincidence circuit 4. The output of the up / down counter 5 is supplied to the other input terminal (B) of the coincidence circuit 4 as internal phase angle data (θ '), and the signals supplied to the input terminals A and B are It is determined whether A <B or A> B. When A <B, one of the input terminals of the AND gate 6 is connected. When A> B, one of the input terminals of the AND gate 7 is connected. Provides bell signal.

A clock signal is supplied to the other input terminals of the AND gates 6 and 7, respectively, and the output of the AND gate 6 is used as a down signal, and the output of the AND gate 7 is used as an up signal. 5, and also to an up-down counter and an A-phase and B-phase generation circuit (not shown) for detecting the displacement amount and speed of the object to be measured. In this way, in the matching circuit 4, when A <B, the AND gate 6 outputs a down signal, and when A> B, the AND gate 7 outputs an up signal, whereby the up / down counter 5 outputs. The internal phase angle data (θ ′) is made to follow so as to match the actual phase angle data (θ) output from the ROM 3.

According to this embodiment, while the coincidence circuit 4 compares the actual phase angle data (θ 1) from the ROM 3 with the internal phase angle data (θ ′) from the up / down counter 5, θ ′ Controls the up / down counter 5 so as to follow θ, and the output of the encoder is interpolated by using the change of θ ′. Therefore, the noise of A-phase signal and B-phase signal from the encoder Even if the address signal of ROM3 changes abruptly due to the component, the direction of the change can be easily discriminated, and by making θ ′ follow θ, a kind of filtering effect that cuts high frequency components can be obtained. You can have it. Therefore, the encoder output can be interpolated with high resolution at all times without being affected by abrupt changes in phase angle due to noise components, and the displacement amount and speed of the measured object can always be accurately measured. Can be detected with.

FIG. 2 shows a second embodiment of the present invention. In this embodiment, the actual phase angle data (θ) from the ROM 3 and the internal phase angle data (θ ′) from the up / down counter 5 are used as address signals instead of the coincidence circuit 4 of FIG. The second ROM 8 is used. The magnitude relationship between θ and θ ′ is stored in advance in the ROM 8 in correspondence with the address signal. When θ <θ ′, a high level signal is supplied to one input terminal of the AND gate 6 and the clock signal is used. The up / down counter 5 is counted down, and when θ> θ ′, a high level signal is supplied to one input terminal of the AND gate 7, and the up / down counter 5 is counted up by the clock signal. Other configurations are similar to those of the first embodiment.

Also in this embodiment, the internal phase angle data (θ ′) output from the up / down counter 5 is made to follow the actual phase angle data (θ) output from the ROM 3, and the θ Since the interpolation is performed by using the change of ′, it is almost affected by the sudden change of the phase angle due to the noise component of the A-phase signal and the B-phase signal from the encoder, as in the first embodiment. The output of the encoder can always be accurately interpolated with high resolution.

[0014]

[Effect of the device]

 As described above, according to the present invention, the internal phase angle data follows the actual phase angle data while comparing the actual phase angle data from the storage means with the internal phase angle data from the up / down counter. Since the up / down counter is controlled to interpolate the output of the encoder by utilizing the change of the internal phase angle data, the noise component of the signal from the encoder causes the actual phase angle data from the storage means to be changed. Even if the value changes abruptly, by making the internal phase angle data follow the actual phase angle data, the encoder output is always highly resolved with little influence of the sudden change in the actual phase angle data due to noise components. Since it can be accurately interpolated, the displacement amount and speed of the object to be measured can always be detected with high accuracy. Also, since the actual phase angle data is stored in the storage means, the number of interpolations can be increased by simply changing the storage pattern in the storage means without increasing the circuit scale. At the same time, it is possible to detect the vector length and its abnormality at the same time, which facilitates adjustment and maintenance. Furthermore, since the internal phase angle data is made to follow the actual phase angle data, it is possible to perform interpolation with good real-time characteristics.

[Brief description of drawings]

FIG. 1 is a block diagram showing a first embodiment of the present invention.

FIG. 2 is a block diagram showing a second embodiment of the present invention.

[Explanation of symbols]

 1, 2 A / D converter 3, 8 ROM 4 matching circuit 5 up / down counter 6, 7 AND gate

Claims (1)

[Scope of utility model registration request] 1. Storage means for outputting corresponding phase angle data as real phase angle data from prestored phase angle data of polar coordinates by an address signal based on signals having different 90 ° phases from an encoder, and counting operation. In response to the up / down counter which sequentially outputs the interpolating phase angle data, based on the comparison between the interpolating phase angle data from the up / down counter and the actual phase angle data from the storage means, Control means for controlling the counting operation of the up / down counter so that the interpolating phase angle data coincides with the actual phase angle data, and based on the control signal of the up / down counter by the control means. An encoder interpolation device, characterized in that the encoder output is configured to be interpolated.