JPH054276Y2 - - Google Patents

Description

[Detailed explanation of the idea] [Technical field to which the idea belongs]

The present invention relates to a composite semiconductor device as a switching means in which a main transistor and an auxiliary transistor for driving the transistor are connected to each other in a darlington.In particular, the present invention relates to a composite semiconductor device as a switching means, in which a main transistor and an auxiliary transistor for driving the transistor are connected in a darlington. The present invention relates to a composite semiconductor device in which transient voltage (spike voltage) applied to the composite semiconductor device can be reduced by making it moderate. Note that in the following figures, the same reference numerals indicate the same or corresponding parts.

[Prior art and its problems]

FIG. 5 is a circuit diagram at turn-off of this type of composite semiconductor device, and FIG. 6 is a waveform diagram for explaining the operation of the main part of FIG. 5. In FIG. 5, Q ₂ is a main transistor, Q ₁ is an auxiliary transistor for driving the main transistor Q ₂ , and these two transistors Q ₁ and Q ₂ are connected in a Darlington connection. S _R is a turn-off power supply for turning off this composite semiconductor device, V _R
is a DC power supply in this power supply S _R , R _R is also a series resistance of this DC power supply V _R , and this power supply S _R is a switching means (for example, a transistor) not shown in the figure when turning off transistors Q ₁ and Q ₂ . are connected as shown in this diagram. The diode D1 connected in parallel with the base B1/emitter E1 circuit of the auxiliary transistor _Q1 is
During this turn-off, even after the base B1 and emitter E1 of the auxiliary transistor _Q1 reach a state where reverse base current can be blocked, the reverse base current continues to flow between the base B2 and emitter E2 of the main transistor _Q2 , and the main transistor This is to turn off _Q2 . In FIG. 6, 1 is the main circuit current IC, 2 is the collector current IC1 which is shunted to the auxiliary transistor Q ₁ among the currents forming the main circuit current IC, 3 is the collector current IC2 which is also shunted to the main transistor Q ₂ ,
4 is a base current IB flowing through the base-emitter circuit of transistors Q ₁ and Q ₂ . If a circuit is formed to invert the forward base current IB as shown in FIG. 5 at time t1 in FIG. 4,
As shown in FIG. 4, after the base current flows in the opposite direction from time t1 to time t3 (this period is referred to as turn-off time t off), the base current disappears. From the time t2A just before the extinction of this base current to the time t3
During this period, the main circuit current IC rapidly drops at a falling rate -dIC/dt and disappears. Note that here, the period from time t1 to approximately time t2A is the accumulation time tstg, which is approximately time t2A.
The period from to approximately time t3 is called the descent time tf. In addition, the quantity of electricity _q1 from time t1 to t2 in FIG. amount of electricity
q2 (shaded area at the bottom right) is a storage carrier between the base B2 and emitter 2 of the main transistor _Q2 . Next, the operation shown in FIG. 5 will be explained with reference to FIG. Darlington connected transistor Q ₁ ,
At turn-off, Q ₂ performs high-speed switching operation by extracting excess minority carriers accumulated in the base regions of both transistors Q ₁ and Q ₂ using the DC power supply V _R as a reverse bias power supply between the base and emitter. be exposed. As shown in Fig. 6, the auxiliary transistor Q ₁ in the previous stage
The carrier q1 accumulated in the base region of the main transistor _Q2 is extracted as an inverse base current IB1 during the period (t1, t2).
(equal to
t3) and is extracted as reverse base IB2. Here, the following relationship holds true. IB1＝V _R ／R _R ……(1) IB2＝V _R −V _F ／R _R ……(2) q1＝∫ ^t2 _t1 IB1dt ……(3) q2＝q1＋∫ ^t3 _t2 IB2dt ……(4) However, V _F is the forward voltage drop of the diode D1. In reality, the accumulation carrier is q1∫q2, and (4)
The formula can be replaced with q2≒∫ ^t3 _t2 IB2dt ……(4A). Therefore, as shown in equations (1) to (4) above, the storage time tstg and fall time tf of the Darlington circuit itself consisting of transistors Q ₁ and Q ₂ are determined by the time at which carriers q1 and q2 disappear. That is, the reverse base current IB1
The larger the value of tstg and IB2, the shorter the time tstg and
This means that tf becomes shorter. However, in general, the shorter the accumulation time tstg, the higher the frequency operation of this circuit becomes possible, but if the drop time tf becomes too short, the drop rate of the main circuit current -dIC/dt will also increase, Interacting with the stray inductance of the main circuit wiring, a large spike voltage is generated during this turn-off, which may lead to destruction of the composite semiconductor device.Furthermore, in order to prevent this destruction, a There is a drawback that it is necessary to increase the capacity of a snubber circuit (not shown). Therefore, in order to prevent this, the rate of fall of the main circuit current -
Trying to lower dIC/dt, base reverse current IB1, IB2
If it is attempted to have a small value, the current drop rate -dIC/dt decreases, but the storage time tstg also increases, which has the disadvantage that it becomes impossible to apply this composite semiconductor device to high frequency operation.

[Purpose of invention]

The present invention eliminates the above-mentioned drawbacks and reduces the storage time tstg
It is an object of the present invention to provide a composite semiconductor device for switching in which only the fall time tf can be lengthened, while the time tf is not so long.

[Key points of the invention]

The main point of this invention is that the main transistor (such as Q ₂ )
and an auxiliary transistor (such as Q1) that drives the transistor are connected in a Darlington manner, in which a polar diode ( _Q1 , etc.) is connected in parallel with the base-emitter circuit of the auxiliary transistor to block the base current of the transistor. D1, etc.) and a Zener diode (ZD1, etc.) with a polarity that blocks the forward current of the diode, or a voltage blocking means (diodes D2 to D4) having the same characteristics as the Zener diode.
), and in parallel with the series circuit, at least a capacitor (such as K1) or a series circuit of the capacitor and an impedance (such as resistor R1).

[Example of idea]

Embodiments of the present invention will be described below with reference to FIGS. 1 to 4. 1 to 3 are circuit diagrams of different embodiments of the device of the present invention at turn-off, and correspond to FIG. 5. FIG. 4 is a waveform diagram for explaining the operation of the main part of FIG.
Figure 1 shows the waveform of the main circuit current IC.
FIG. 2 shows the waveform of the base current IB and corresponds to FIG. 6. In Fig. 1, in contrast to Fig. 5, the diode D
1 in series with the base reverse current (i.e. diode D1
polarized zener diode to block the forward current of
A capacitor K1 is provided in parallel with the base B1 and emitter E1 circuit of the auxiliary transistor _Q1 . Next, in FIG. 2, a series circuit of diodes D2 to D4 having the same polarity as the diode D1 is provided in place of the Zener diode ZD1 of FIG. In the circuit of Figure 2, three diodes D2 to D
The sum of the forward voltage drops of 4 is selected to be approximately equal to the Zener voltage of the Zener diode ZD1 in Figure 1, and the forward and reverse base currents in Figures 1 and 2 are
The diagram is an equivalent circuit. Further, in FIG. 3, a resistor R1 is provided in series with the capacitor K1 of FIG. 1, while the resistor R _R in the turn-off power supply S _R is removed. Next, the operations shown in FIGS. 1 to 3 will be explained with reference to FIG. 4. In FIG. 1, as mentioned above, the base B1 and emitter E1 of the auxiliary transistor _Q1
A Zener diode ZD1 is connected in series with a diode D1 that is parallel to the circuit so that its cathode is on the emitter side. As a result, in equation (2) above,
V _F (forward voltage drop of diode D1) is replaced by V _F +V _ZD (however, V _ZD is Zener voltage of Zener diode ZD), and the base reverse current shown in Figure 4
IB20, i.e. the storage carrier q1 in the base region of the auxiliary transistor _Q1 , is extracted from this base B1.
The base reverse current after the emitter E1 circuit recovers its reverse current blocking ability, that is, the steady component of the base reverse current IB2 of the main transistor _Q2 , is the base current IB2 during the period (t2, t3) in Figure 6. It is possible to reduce the current corresponding to , thereby increasing the fall time tf as shown in FIG. 4, thereby reducing the main circuit current fall rate -dIC/dt. However, if this continues, the storage time tstg of the main transistor _Q2 (as mentioned above, the auxiliary transistor
Since the storage carrier q1 in the base region of _Q1 is actually extremely small compared to the storage carrier q2 of the main transistor _Q2 , the storage time tstg of this composite semiconductor device
is determined mostly by the storage time of the main transistor _Q1 . ) becomes long, making it difficult to apply to high-frequency circuits. Therefore, in order to increase the initial base reverse current component of the main transistor Q ₁ , a capacitor K1 is connected in parallel with the base B1/emitter E1 circuit of the auxiliary transistor Q ₁ . insert. This causes the base reverse current of the main transistor _Q2 to
IB2 is the capacitor K1 at the initial point after the storage carrier _q1 of the auxiliary transistor Q1 has been drained.
, and the diode D1 and the Zener diode ZD1 are short-circuited, so the value of the base reverse current IB2 is initially large as shown in FIG. 4, and attenuates with time to reach the above-mentioned current value IB20. In this way, the storage time tstg of the main transistor _Q2 can also be reduced. Next, as described above, the circuit of FIG. 2 is equivalent to the circuit of FIG. 1, and can perform the same turn-off operation as described above. FIG. 3 also shows that at the initial stage when the turn-off power supply S _R is connected to this composite semiconductor device, a part of the base reverse current IB1 that should flow through the base B1/emitter E1 circuit of the auxiliary transistor _Q1 is transferred to the capacitor K1.
In order to prevent the current from flowing through the capacitor K1 by connecting a resistor R1 in series with the capacitor _K1 , in order to prevent the current from flowing through the capacitor K1, in order to prevent the current from flowing through the capacitor K1, in order to prevent the storage time tstg of the auxiliary transistor Q1 from increasing due to the bypass of the net base reverse current. That is.

[Effect of the idea]

According to the present invention, in a composite semiconductor device in which a main transistor Q ₂ and an auxiliary transistor Q ₁ that drives the transistor Q ₂ are connected in Darlington, in parallel with the base B1/emitter E1 circuit of the auxiliary transistor Q ₁ , A diode D1 with a polarity that blocks the base current of the transistor _Q1 , a Zener diode ZD1 with a polarity that blocks the forward current of the diode D1, or diodes D2 to D4 as voltage blocking means having characteristics equivalent to the Zener diode. By connecting a series circuit of , and further connecting in parallel with the series circuit, at least the capacitor K1 or a series circuit of the capacitor K1 and the resistor R1, the following effects can be obtained. A composite semiconductor device having a short accumulation time tstg and a long fall time tf, that is, suitable for high frequency circuits and less likely to generate turn-off spike voltages, can be obtained. Due to the small reverse base current IB20 during the fall time tf, the reverse bias safe operating area RBSOA of the main transistor increases, thus increasing the reliability of the composite semiconductor device. As the main circuit current increases, the accumulated carrier of this composite semiconductor device increases, so the reverse base current becomes relatively small compared to this accumulated carrier, and the fall time tf becomes longer, so the main circuit current increases. The present invention is most effective in the high current region where spike voltage is most desired to be suppressed.

[Brief explanation of drawings]

1 to 3 are circuit diagrams at turn-off as different embodiments of the device of the present invention, and FIG.
The figure is a waveform diagram for explaining the operation of the main parts in Figure 1,
FIG. 5 is a circuit diagram of a conventional device corresponding to FIG. 1, and FIG. 6 is a waveform diagram for explaining the operation of the main part of FIG. 5, which corresponds to FIG. 4. Q ₁ ... Auxiliary transistor, Q ₂ ... Main transistor, D1 to D4 ... Diode, ZD1 ... Zener diode, K1 ... Capacitor, R1,
R _R ...Resistor, S _R ...Turn-off power supply, V _R ...DC voltage.

Claims (1)

[Claims for Utility Model Registration] In a composite semiconductor device comprising a main transistor and an auxiliary transistor for driving the transistor connected in Darlington, the base current of the transistor is blocked in parallel with the base-emitter circuit of the auxiliary transistor. A series circuit is connected between a diode with a polarity of 1 and a Zener diode with a polarity that blocks the forward current of the diode or a voltage blocking means having characteristics equivalent to that of the Zener diode, and at least a capacitor is connected in parallel with the series circuit. Alternatively, a composite semiconductor device characterized in that a series circuit of the capacitor and an impedance is connected.