JPH0542075B2 - - Google Patents

Info

Publication number
JPH0542075B2
JPH0542075B2 JP59092422A JP9242284A JPH0542075B2 JP H0542075 B2 JPH0542075 B2 JP H0542075B2 JP 59092422 A JP59092422 A JP 59092422A JP 9242284 A JP9242284 A JP 9242284A JP H0542075 B2 JPH0542075 B2 JP H0542075B2
Authority
JP
Japan
Prior art keywords
connector
memory
connector terminal
terminals
terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59092422A
Other languages
Japanese (ja)
Other versions
JPS60236183A (en
Inventor
Noryuki Ootsuka
Kimimaro Tamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP59092422A priority Critical patent/JPS60236183A/en
Publication of JPS60236183A publication Critical patent/JPS60236183A/en
Publication of JPH0542075B2 publication Critical patent/JPH0542075B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/143—Detection of memory cassette insertion or removal; Continuity checks of supply or ground lines; Detection of supply variations, interruptions or levels ; Switching between alternative supplies
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R12/00—Structural associations of a plurality of mutually-insulated electrical connecting elements, specially adapted for printed circuits, e.g. printed circuit boards [PCB], flat or ribbon cables, or like generally planar structures, e.g. terminal strips, terminal blocks; Coupling devices specially adapted for printed circuits, flat or ribbon cables, or like generally planar structures; Terminals specially adapted for contact with, or insertion into, printed circuits, flat or ribbon cables, or like generally planar structures
    • H01R12/70—Coupling devices
    • H01R12/7088—Arrangements for power supply

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Details Of Connecting Devices For Male And Female Coupling (AREA)
  • Credit Cards Or The Like (AREA)

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、コンピユータや電子薬器等に利用さ
れるデータ格納を目的としたメモリ−パツクの内
部機能保護用コネクタに関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a connector for protecting the internal functions of a memory pack for storing data used in computers, electronic medicine devices, and the like.

従来例の構成とその問題点 近年、必要な情報をフロツピーデイスク、カセ
ツトテープ、メモリーパツク等に格納して、必要
な時にその情報を用いるという事が不可欠であ
る。中でもメモリーパツクは、パーソナルコンピ
ユータや電子楽器等に重要な機能の一つとして装
備されている。Conventional configurations and their problems In recent years, it has become essential to store necessary information on floppy disks, cassette tapes, memory packs, etc. and use that information when needed. Among them, memory packs are installed as one of the important functions in personal computers, electronic musical instruments, and the like.

従来、このメモリ−パツク装置の内部機能保
護、コネクタ保全には、機構面からいくつかの対
策が行われている。 Conventionally, several mechanical measures have been taken to protect the internal functions and connectors of this memory pack device.

以下に従来のメモリーパツク装置に用いられて
いるコネクタについて説明する。第１図Ａは従来
のメモリーパツクのコネクタ部の平面図、同図Ｂ
は同底面図で、１は電源電圧供給用のコネクタ端
子、２は接地専用のコネクタ端子、３はメモリー
パツク挿入確認用のコネクタ端子、４はデータ書
き込み及び読み出し専用のコネクタ端子、５はメ
モリ−パツク内部のアドレス指定用のコネクタ端
子、６は内部データの破壊を防止するメモリー保
護スイツチ（図示せず）と結線されたコネクタ端
子、７は逆挿入防止用の溝である。前記コネクタ
端子１〜６の長さは、電源電圧供給用のコネクタ
端子１と接地専用のコネクタ端子２とが最も長
く、これらは同じ長さであり、次にメモリーパツ
ク挿入確認用のコネクタ端子３とデータ書き込み
及び読み出し専用のコネクタ端子４とアドレス指
定用のコネクタ端子５とが前記コネクタ端子１，
２よりもやや短かく、これらは同じ長さであり、
メモリー保護スイツチと結線されたコネクタ端子
６は最も短い長さになつている。さらに逆挿入防
止の溝７により、挿入される本体側のコネクタに
逆挿入されない様にされている。 The connectors used in conventional memory pack devices will be explained below. Figure 1A is a plan view of the connector section of a conventional memory pack, and Figure 1A is a plan view of the connector section of a conventional memory pack.
is a bottom view of the same, 1 is a connector terminal for supplying power voltage, 2 is a connector terminal only for grounding, 3 is a connector terminal for checking memory pack insertion, 4 is a connector terminal only for data writing and reading, and 5 is a memory connector terminal. A connector terminal for specifying an address inside the pack, 6 a connector terminal connected to a memory protection switch (not shown) for preventing destruction of internal data, and 7 a groove for preventing reverse insertion. Regarding the lengths of the connector terminals 1 to 6, the connector terminal 1 for power supply voltage supply and the connector terminal 2 only for grounding are the longest, and these are the same length, and the connector terminal 3 for confirming the insertion of the memory pack is the second. , a connector terminal 4 for data writing and reading only, and a connector terminal 5 for address specification are connected to the connector terminal 1,
2, which are the same length,
The connector terminal 6 connected to the memory protection switch has the shortest length. Further, the groove 7 for preventing reverse insertion prevents the connector from being reversely inserted into the connector on the main body side.

上記構成において、正しい方向で挿入された場
合、電源電圧供給用のコネクタ端子１及び接地専
用のコネクタ端子２がまず最初に接触し、次にメ
モリーパツク挿入確認用のコネクタ端子３とデー
タ書き込み読み出し専用のコネクタ端子４とアド
レス指定用のコネクタ端子５とが接触し、これに
よりメモリーパツクは完全に挿入されたものとし
て動作する用意が整えられ、最後にメモリー保護
スイツチと結線されたコネクタ端子６が接触す
る。次にメモリーパツクが抜かれる場合は、上記
の挿入順序と全く逆にコネクタ端子１〜６が長さ
の短い順に離れて行き、電源電圧供給用のコネク
タ端子１及び接地専用のコネクタ端子２が離れて
メモリーパツクは完全に離されることになる。 In the above configuration, when inserted in the correct direction, connector terminal 1 for supplying power supply voltage and connector terminal 2 for grounding only come into contact first, and then connector terminal 3 for confirming memory pack insertion and connector terminal 3 for data writing and reading only make contact. The connector terminal 4 of the memory pack contacts the address connector terminal 5, and the memory pack is ready to operate as if it is fully inserted.Finally, the connector terminal 6 connected to the memory protection switch makes contact. do. Next, when the memory pack is removed, the connector terminals 1 to 6 will be separated in the order of shortest length in the exact opposite order of insertion, and connector terminal 1 for supplying power voltage and connector terminal 2 for grounding will be separated. The memory pack is then completely released.

しかしながら、このような従来のメモリーパツ
クのコネクタ機構は、メモリー内部の機能保護に
関して、電気的な対策をコネクタ形状を改善する
ことによりかなりの成果を上げているが、完全に
データの保護が可能とはいえない。すなわち、以
上の機構を全て備えた場合においても、メモリー
パツの挿入時の状態は数々のケースが考えられ
る。例えば、メモリーパツクのコネクタ部が、接
触面に対し平行ではなく、かなりの角度をもつて
挿入されようとした場合、各コネクタ端子１〜６
接触順位は理想の順位とは異なるケースが発生す
る。特に電源電圧供給用のコネクタ端子１が接触
しており、メモリーパツク挿入確認用のコネクタ
端子３がごくわずかでも接触していれば、接地専
用のコネクタ端子２が接続されずに動作が認めら
れる状態が発生するという問題点は解決されてい
ない。 However, although such conventional memory pack connector mechanisms have achieved considerable success in protecting the functions inside the memory by implementing electrical measures and improving the shape of the connector, it is not possible to completely protect data. No, no. That is, even when all of the above mechanisms are provided, there are many possible situations in which the memory pad may be inserted. For example, if the connector part of the memory pack is inserted not parallel to the contact surface but at a considerable angle, each connector terminal 1 to 6
Cases occur in which the contact ranking differs from the ideal ranking. In particular, if the connector terminal 1 for supplying power voltage is in contact and the connector terminal 3 for confirming memory pack insertion is in even the slightest contact, the connector terminal 2 for grounding is not connected and operation is recognized. The problem of this occurring has not been resolved.

発明の目的 本発明は上記従来の欠点を解消するもので、メ
モリーパツク挿入時及び抜き取り時の内部データ
の破壊を確実に阻止できるメモリーパツク内部機
能保護用コネクタを提供することを目的とする。OBJECTS OF THE INVENTION The present invention solves the above-mentioned conventional drawbacks, and an object of the present invention is to provide a connector for protecting internal functions of a memory pack that can reliably prevent destruction of internal data when a memory pack is inserted or removed.

発明の構成 上記目的を達成するため、本発明のメモリ−パ
ツク内部機能保護用コネクタは、コネクタ本体の
両面に多数設けられたコネクタ端子のうち、電源
電圧供給用のコネクタ端子をコネクタ本体の一端
部の一方の面及び他端部の他方の面にそれぞれ配
置し、接地専用のコネクタ端子をコネクタ本体の
一端部の他方の面及び他端部の一方の面にそれぞ
れ配置した構成である。Structure of the Invention In order to achieve the above object, the memory pack internal function protection connector of the present invention has a connector terminal for supplying power voltage at one end of the connector body among the many connector terminals provided on both sides of the connector body. The connector terminal is arranged on one surface of the connector main body and the other surface of the other end thereof, and the connector terminal for grounding is arranged on the other surface of the one end portion of the connector body and the other surface of the other end thereof.

実施例の説明 以下、本発明の一実施例について、図面に基づ
いて説明する。DESCRIPTION OF EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

第２図Ａは本発明の一実施例におけるメモリ−
パツク内部機能保護用コネクタの平面図、同図Ｂ
は同底面図で、８は電源電圧供給用のコネクタ端
子、９は接地専用のコネクタ端子、１０はメモリ
ーパツク挿入確認用のコネクタ端子、１１はメモ
リー保護スイツチ（図示せず）と結線されたコネ
クタ端子、１２はメモリーパツク内部のアドレス
指定用のコネクタ端子、１３はデータ書き込み及
び読み出し専用のコネクタ端子、１４は逆挿入防
止用の溝、１５はコネクタ本体である。前記コネ
クタ端子８〜１３の長さは、接地専用のコネクタ
端子９が最も長く、次に電源電圧供給用のコネク
タ端子８が長い。これら接地専用のコネクタ端子
９と電源電圧供給用のコネクタ端子８とはコネク
タ部の両面に１組の対となつて配置されている。
しかもコネクタ部の左右両端に配置され、それぞ
れの面に電源電圧供給用のコネクタ端子８と接地
専用のコネクタ端子９との双方がそれぞれ配置さ
れている。さらにメモリーパツク挿入確認用のコ
ネクタ端子１０及びメモリー保護スイツチと結線
されたコネクタ端子１１がそれぞれ対称に、同数
だけ両面に配置されている。 FIG. 2A shows a memory in one embodiment of the present invention.
Plan view of the connector for protecting the internal functions of the pack, figure B
is a bottom view of the same, 8 is a connector terminal for supplying power voltage, 9 is a connector terminal for grounding only, 10 is a connector terminal for checking memory pack insertion, and 11 is a connector connected to a memory protection switch (not shown). Terminals 12 are connector terminals for specifying addresses inside the memory pack, 13 are connector terminals for data writing and reading only, 14 are grooves for preventing reverse insertion, and 15 is the connector body. Regarding the length of the connector terminals 8 to 13, the connector terminal 9 for grounding is the longest, and the connector terminal 8 for supplying power voltage is the second longest. These grounding-only connector terminals 9 and power supply voltage supply connector terminals 8 are arranged as a pair on both sides of the connector portion.
Furthermore, they are arranged at both the left and right ends of the connector section, and both the connector terminal 8 for power supply voltage supply and the connector terminal 9 dedicated to grounding are arranged on each surface. Furthermore, connector terminals 10 for confirming the insertion of a memory pack and connector terminals 11 connected to a memory protection switch are arranged symmetrically and in the same number on both sides.

次に動作を説明する。正しい方向で挿入された
場合、接地専用のコネクタ端子９がまず接触した
後、電源電圧供給用のコネクタ端子８が接触す
る。次にメモリーパツク挿入確認用のコネクタ端
子１０とアドレス指定用のコネクタ端子１２とデ
ータ書き込み及び読み出し用のコネクタ端子１３
とが接触し、これによりメモリーパツクは完全に
挿入されたものとして動作する用意が整えられ、
最後にメモリー保護スイツチと結線されたコネク
タ端子１１が接触する。 Next, the operation will be explained. If inserted in the correct direction, the connector terminal 9 for grounding will first make contact, followed by the connector terminal 8 for power supply voltage supply. Next, a connector terminal 10 for confirming memory pack insertion, a connector terminal 12 for address specification, and a connector terminal 13 for data writing and reading.
The memory pack is now fully inserted and ready to operate.
Finally, the connector terminal 11 connected to the memory protection switch comes into contact.

メモリーパツクが抜かれる場合は、上記挿入順
序と全く逆に、コネクタ端子の長さが短いものか
ら離れて行き、接地専用のコネクタ端子９が離れ
てメモリーパツクは完全に離されたことになる。 When the memory pack is removed, the connector terminals with the shortest length move away from each other in the exact opposite order of insertion, and the connector terminal 9 dedicated to grounding separates, so that the memory pack is completely separated.

本実施例によれば、従来のメモリーパツク装置
のコネクタ部が斜挿入や不完全挿入に対して内部
機能の保護に関して完全とはいえなかつた部分を
次の様に解決出来る。 According to this embodiment, the problem that the connector section of the conventional memory pack device was not perfect in terms of protecting internal functions against oblique insertion or incomplete insertion can be solved as follows.

まず第１に、どのような角度で挿入されても、
電源電圧供給用のコネクタ端子８と接地専用のコ
ネクタ端子９とは対になつてまず接触され、さら
に接地専用のコネクタ端子９が電源電圧供給用の
コネクタ端子８よりも接触順位は早いため、必ず
接地状態が維持されているので、電気的に安全で
ある。これらコネクタ端子８，９は左右両側に表
裏一体で対に配置され、それぞれ反転しているた
め、挿入時に左右上下どの様な角度からも上記の
事は保障される。次にメモリーパツク挿入確認用
のコネクタ端子１０がやはり片面ずつ対称にある
ため、正しい方向及び角度で挿入されなければ、
挿入されるコネクタを持つ本体側が、メモリーパ
ツクが完全に挿入されたと判断しない。 First of all, no matter what angle it is inserted,
The connector terminal 8 for power voltage supply and the connector terminal 9 for grounding are connected first as a pair, and the connector terminal 9 for grounding is contacted earlier than the connector terminal 8 for supplying power voltage, so it is necessary to It is electrically safe because the grounded state is maintained. These connector terminals 8 and 9 are arranged in pairs on both the left and right sides, front and back, and are each reversed, so that the above is guaranteed from any angle from the left, right, top, or bottom when inserted. Next, the connector terminals 10 for confirming memory pack insertion are symmetrical on each side, so if they are not inserted in the correct direction and angle,
The main unit that has the connector to be inserted does not judge that the memory pack is completely inserted.

このように、コネクタ端子の長さ及び配置を、
本実施例のようにする事により、従来の内部機能
の保護機構と合わせて完全なデータ保護が実現出
来る。 In this way, the length and arrangement of the connector terminals can be
By doing as in this embodiment, complete data protection can be realized in combination with the conventional internal function protection mechanism.

なお上記実施例においては、電源電圧供給用の
コネクタ端子８と接地専用のコネクタ端子９とが
両端に、またメモリーパツク挿入確認用のコネク
タ端子１０及びメモリー保護スイツチと結線され
たコネクタ端子１１が前記コネクタ端子８，９の
内側に隣接してそれぞれ配置したが、コネクタ端
子８，９は両端部にあればよく、必ずしも最も外
側に位置させる必要はない。 In the above embodiment, the connector terminal 8 for power supply voltage supply and the connector terminal 9 for grounding are provided at both ends, and the connector terminal 10 for confirming the insertion of the memory pack and the connector terminal 11 connected to the memory protection switch are provided at both ends. Although the connector terminals 8 and 9 are arranged adjacent to each other inside, the connector terminals 8 and 9 may be located at both ends, and do not necessarily need to be located at the outermost position.

また、メモリーパツク挿入確認用のコネクタ端
子１０とメモリー保護スイツチと結線されたコネ
クタ端子１１との長さが同じであつても、さらに
はアドレス指定用のコネクタ端子１２とデータ書
き込み及び読み出し専用のコネクタ端子１３との
配置が入れ換わつても、要するに電源電圧供給用
のコネクタ端子８をコネクタ本体１５の一端部の
一方の面及び他端部の他方の面にそれぞれ配置
し、接地専用のコネクタ端子９をコネクタ本体１
５の一端部の他方の面及び他端部の一方の面にそ
れぞれ配置した構成でさえあれば、電源のみが接
続されてアースが接続されないというような事態
を防止できる。 Furthermore, even if the length of the connector terminal 10 for confirming the insertion of the memory pack is the same as that of the connector terminal 11 connected to the memory protection switch, the connector terminal 12 for address specification may be the same as the connector terminal 12 for data writing and reading only. Even if the arrangement with the terminal 13 is interchanged, in short, the connector terminal 8 for supplying power voltage is arranged on one side of one end of the connector body 15 and the other side of the other end, and the connector terminal 8 is used as a grounding-only connector terminal. 9 to connector body 1
As long as they are arranged on the other side of one end and on one side of the other end of 5, it is possible to prevent a situation where only the power source is connected and the ground is not connected.

発明の効果 以上説明したように本発明によれば、いかなる
角度より挿入され、あるいは抜き取られても、内
部のデータ保護及び機能保護を保障でき、この結
果、メモリーパツク使用に際して常に使用者のい
かんを問わず、内部に格納されたデータを確実
に、安全な状態で書き込み及び読み出しすること
ができる。Effects of the Invention As explained above, according to the present invention, internal data and function protection can be ensured even when the memory pack is inserted or removed from any angle, and as a result, the user's safety is always maintained when using the memory pack. Regardless of the situation, the data stored inside can be reliably written and read in a safe state.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図Ａは従来のメモリーパツクのコネクタの
平面図、同図Ｂは同底面図、第２図Ａは本発明の
一実施例におけるメモリ−パツク内部機能保護用
コネクタの平面図、同図Ｂは同底面図である。 ８……電源電圧供給用のコネクタ端子、９……
接地専用のコネクタ端子、１０………メモリーパ
ツク挿入確認用のコネクタ端子、１１……メモリ
ー保護スイツチに結線されたコネクタ端子、１２
……アドレス指定用のコネクタ端子、１３……デ
ータ書き込み及び読み出し専用のコネクタ端子、
１５……コネクタ本体。 FIG. 1A is a plan view of a conventional memory pack connector, FIG. 2B is a bottom view, FIG. is a bottom view of the same. 8... Connector terminal for supplying power voltage, 9...
Connector terminal for grounding only, 10... Connector terminal for checking memory pack insertion, 11... Connector terminal connected to memory protection switch, 12
... Connector terminal for address specification, 13 ... Connector terminal for data writing and reading only,
15...Connector body.

Claims (1)

【特許請求の範囲】 １ コネクタ本体の両面に多数設けられたコネク
タ端子のうち、電源電圧供給用のコネクタ端子を
コネクタ本体の一端部の一方の面及び他端部の他
方の面にそれぞれ配置し、接地専用のコネクタ端
子をコネクタ本体の一端部の他方の面及び他端部
の一方の面にそれぞれ配置したメモリ−パツク内
部機能保護用コネクタ。 ２ コネクタ端子のうち、接地専用のコネクタ端
子が最も長い長さを有する構成とした特許請求の
範囲第１項記載のメモリ−パツク内部機能保護用
コネクタ。 ３ コネクタ端子のうち、電源電圧供給用のコネ
クタ端子が接地専用のコネクタ端子と同等以下の
長さを有する構成とした特許請求の範囲第２項記
載のメモリ−パツク内部機能保護用コネクタ。 ４ コネクタ端子のうち、メモリ−保護スイツチ
に結線されたコネクタ端子が電源電圧供給用のコ
ネクタ端子よりも短い長さを有する構成とした特
許請求の範囲第３項記載のメモリ−パツク内部機
能保護用コネクタ。 ５ コネクタ端子のうち、アドレス指定用のコネ
クタ端子が、電源電圧用のコネクタ端子と同等以
下の長さを有し、かつメモリー保護スイツチに結
線されたコネクタ端子と同等以上の長さを有する
構成とした特許請求の範囲第４項記載のメモリ−
パツク内部機能保護用コネクタ。 ６ コネクタ端子のうち、データ書き込み及び読
み出し専用のコネクタ端子が、電源電圧供給用の
コネクタ端子と同等以下の長さを有し、かつメモ
リー保護スイツチに結線されたコネクタ端子と同
等以上の長さを有する構成とした特許請求の範囲
第４項記載のメモリ−パツク内部機能保護用コネ
クタ。 ７ コネクタ端子のうち、メモリー保護スイツチ
に結線されたコネクタ端子が、コネクタ本体の両
面にそれぞれ配置されている構成とした特許請求
の範囲第４項記載のメモリ−パツク内部機能保護
用コネクタ。 ８ コネクタ端子のうち、メモリー保護スイツチ
に結線されたコネクタ端子が、コネクタ本体の一
方の面に互いに隣接することなく配置されている
構成とした特許請求の範囲第４項記載のメモリ−
パツク内部機能保護用コネクタ。 ９ コネクタ端子のうち、メモリ−パツク挿入確
認用のコネクタ端子が電源電圧供給用のコネクタ
端子よりも短い長さを有する構成とした特許請求
の範囲第３項記載のメモリ−パツク内部機能保護
用コネクタ。 １０ コネクタ端子のうち、アドレス指定用のコ
ネクタ端子が、電源電圧供給用のコネクタ端子と
同等以下の長さを有し、かつメモリ−パツク挿入
確認用のコネクタ端子と同等以上の長さを有する
構成とした特許請求の範囲第９項記載のメモリ−
パツク内部機能保護用コネクタ。 １１ コネクタ端子のうち、データ書き込み及び
読み出し専用のコネクタ端子が、電源電圧供給用
のコネクタ端子と同等以下の長さを有し、かつメ
モリ−パツク挿入確認用のコネクタ端子と同等以
上の長さを有する構成とした特許請求の範囲第９
項記載のメモリ−パツク内部機能保護用コネク
タ。 １２ コネクタ端子のうち、メモリーパツク挿入
確認用のコネクタ端子は、コネクタ本体の両面に
それぞれ配置されている構成とした特許請求の範
囲第９項記載のメモリ−パツク内部機能保護用コ
ネクタ。 １３ コネクタ端子のうち、メモリーパツク挿入
確認用のコネクタ端子は、コネクタ本体の一方の
面に互いに隣接することなく配置されている構成
とした特許請求の範囲第９項記載のメモリ−パツ
ク内部機能保護用コネクタ。[Scope of Claims] 1. Among the many connector terminals provided on both sides of the connector body, connector terminals for supplying power voltage are arranged on one side of one end of the connector body and on the other side of the other end. A connector for protecting internal functions of a memory pack, in which a connector terminal dedicated to grounding is arranged on the other side of one end of the connector body and on one side of the other end. 2. The connector for protecting internal functions of a memory pack according to claim 1, wherein the connector terminal for grounding has the longest length among the connector terminals. 3. The connector for protecting internal functions of a memory pack according to claim 2, wherein among the connector terminals, the connector terminal for power supply voltage supply has a length equal to or less than the length of the connector terminal exclusively for grounding. 4. Memory pack internal function protection according to claim 3, wherein among the connector terminals, the connector terminal connected to the memory protection switch has a shorter length than the connector terminal for power supply voltage supply. connector. 5 Among the connector terminals, the connector terminal for addressing has a length equal to or less than the connector terminal for power supply voltage, and has a length equal to or longer than the connector terminal connected to the memory protection switch. The memory according to claim 4
Connector for protecting internal functions of the pack. 6 Among the connector terminals, the connector terminals used only for data writing and reading shall have a length equal to or less than the connector terminals for supplying power voltage, and shall have a length equal to or longer than the connector terminals connected to the memory protection switch. A connector for protecting internal functions of a memory pack according to claim 4, wherein the connector has the following structure. 7. The memory pack internal function protection connector according to claim 4, wherein among the connector terminals, the connector terminals connected to the memory protection switch are respectively arranged on both sides of the connector body. 8. The memory according to claim 4, wherein among the connector terminals, the connector terminals connected to the memory protection switch are arranged on one surface of the connector body without being adjacent to each other.
Connector for protecting internal functions of the pack. 9. The memory pack internal function protection connector according to claim 3, wherein among the connector terminals, the connector terminal for confirming the insertion of the memory pack has a shorter length than the connector terminal for supplying power voltage. . 10 Among the connector terminals, the connector terminal for address specification has a length equal to or less than the connector terminal for supplying power voltage, and has a length equal to or longer than the connector terminal for confirming memory pack insertion. The memory according to claim 9
Connector for protecting internal functions of the pack. 11 Among the connector terminals, the connector terminal for data writing and reading only has a length equal to or less than that of the connector terminal for power supply voltage supply, and has a length equal to or longer than the connector terminal for confirming memory pack insertion. Claim 9 has the structure of
Connector for protecting the internal functions of the memory pack as described in . 12. The connector for protecting internal functions of a memory pack according to claim 9, wherein among the connector terminals, connector terminals for confirming insertion of the memory pack are arranged on both sides of the connector body. 13. Memory pack internal function protection according to claim 9, wherein among the connector terminals, the connector terminals for confirming the insertion of the memory pack are arranged on one surface of the connector body without being adjacent to each other. Connector for
JP59092422A 1984-05-08 1984-05-08 Connector for protecting internal function of memory pack Granted JPS60236183A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59092422A JPS60236183A (en) 1984-05-08 1984-05-08 Connector for protecting internal function of memory pack

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59092422A JPS60236183A (en) 1984-05-08 1984-05-08 Connector for protecting internal function of memory pack

Publications (2)

Publication Number Publication Date
JPS60236183A JPS60236183A (en) 1985-11-22
JPH0542075B2 true JPH0542075B2 (en) 1993-06-25

Family

ID=14053981

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59092422A Granted JPS60236183A (en) 1984-05-08 1984-05-08 Connector for protecting internal function of memory pack

Country Status (1)

Country Link
JP (1) JPS60236183A (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62154873U (en) * 1986-03-19 1987-10-01
JPH0690872B2 (en) * 1986-08-18 1994-11-14 東京電気株式会社 Memory card device
JPS6348684A (en) * 1986-08-18 1988-03-01 Tokyo Electric Co Ltd Memory card
JP2590989B2 (en) * 1987-12-14 1997-03-19 セイコーエプソン株式会社 External connection terminal arrangement method for liquid crystal display device
JPH03184281A (en) * 1989-12-13 1991-08-12 Fuji Photo Optical Co Ltd Connector
US5403196A (en) * 1993-11-09 1995-04-04 Berg Technology Connector assembly

Also Published As

Publication number Publication date
JPS60236183A (en) 1985-11-22

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