JPH0541871A - Video signal multiplex demutiplex system - Google Patents

Abstract

PURPOSE:To reduce a difference from a transmission delay time among a luminance signal and two kinds of color difference signals with respect to the video signal multiplex demultiplex system in a line connector for high definition picture. CONSTITUTION:The system is provided with synchronizing signal detection means 100 detecting three consecutive samples of a prescribed signal level or below from a multiplex signal M1 resulting from multiplexing a digital coding luminance signal DY and two kinds of color difference signals DPB and DPR and with a video signal demultiplexing means 200 demultiplexing a luminance signal and each color difference signal based on the detected synchronizing signal, with a special code generating means 300 generating a special code S different from the luminance signal and each color difference signal, a multiplexer means 400 multiplexing the luminance signal and each color difference signal and the special code in a prescribed order and outputting the multiplexed signal, with a special code detection means 500 detecting a special code from a received multiplex signal M2 and a video signal demultiplexer means 600 demultiplexing the luminance signal and each color difference signal based on the detected specific code.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video signal demultiplexing system in a line connection device for high definition images.

[0002]

2. Description of the Related Art FIG. 10 is a diagram showing an example of a high-definition image response system to which the present invention is applied, and FIG. 11 is a diagram showing an example of a conventional line connection device.

In FIG. 10, reference numeral 1 is an image file for outputting a video signal V composed of a luminance signal Y and two kinds of color difference signals P _B and P _R (hereinafter referred to as Y signal, P _B signal and P _R signal). Reference numeral 2 is an audio file for outputting the audio signal A, 3 is an image terminal for outputting and displaying the image output from the image file 1 and audio output from the audio file 2, and 4 is an image for output and displaying on the corresponding image terminal 3. And a control terminal (KP) 5 for designating a voice, a video signal V output from the image file 1 and a voice signal A output from a voice file 2 are used for a video signal V designated by the control terminal (KP) 4, A line connection device that transmits the audio signal A to the corresponding image terminal 3, and a main control device 6 that controls the entire high-definition image response system.

In FIG. 11, the Y signal, the P _B signal, and the P _R signal output from the image file 1 are digitally encoded by the corresponding analog-to-digital converter (ADC) 51, and the D _Y signal and the D _PB signal are obtained. And D _PR signals, and the corresponding frame memories 5
Stored in 2.

The video switch 53 has a D _Y signal,
D _PB signal and D _PR signal is provided three sets corresponding to each corresponding D _Y signal, and three sets of frame memory 52 for storing the D _PB signal and D _PR signal, the D _Y signal, D _PB Signals and _DPR signal requesting three sets of digital-analog converters (DAC) 5 corresponding to the image terminal 3.
Connect with 4.

As a result, three sets of frame memories 52 are stored.
Corresponding D paid_YSignal, D _PBSignal and D_PRBelief
No. of the corresponding three sets through the three sets of video switches 53.
It is transmitted to the digital-analog converter (DAC) 54,
In the digital-analog converter (DAC) 54, the original
Analog Y signal, P_BSignal and P_RDecode to signal
And is transmitted to the corresponding image terminal 3.

[0007]

[Problems to be Solved by the Invention]
In the conventional line connection device,
Y signal output from rule 1, P_BSignal and P_RSignal
Stored in the frame memory 52 independently and again
A digital analog camera is provided via each independent video switch 53.
Since it was transmitted to the converter unit (DAC) 54, D_Ysignal,
D_PBSignal and D _PRIncreased transmission delay time difference between signals
However, a large amount of labor is required to adjust the transmission delay time difference.
was there.

It is an object of the present invention to reduce the transmission delay time difference between a luminance signal and two types of color difference signals as much as possible.

[0009]

FIG. 1 is a diagram showing the principle of the present invention, FIG. 1 (a) is a diagram showing the principle of the present invention (claim 1), and FIG. 1 (b) is the diagram. It is a figure which shows the principle of invention (Claim 2).

The present invention multiplexes a digitally encoded luminance signal D _Y and two types of color difference signals D _PB and D _PR having a sampling period three times as long as the luminance signal, and after exchanging and connecting the original signals. The high-definition image line connection device for separating the digitally encoded luminance signal D _Y and the two types of color difference signals D _PB and D _PR is targeted.

In FIG. 1, D _Y , D _PB and D _PR are a digitally encoded luminance signal and two kinds of color difference signals, and M ₁ and M ₂ are multiple signals. 100 is
The synchronization signal detecting means is provided by the present invention (claim 1).

Reference numeral 200 is a video signal separating means provided by the present invention (claim 1). 300 is a special code generating means provided by the present invention (claim 2). Four
00 is a multiplexing means provided by the present invention (claim 2).

Reference numeral 500 is a special code detecting means provided by the present invention (claim 2). Reference numeral 600 is a video signal separating means provided by the present invention (claim 2).

[0014]

The synchronizing signal detecting means 100 includes a digitally encoded luminance signal D _Y and two types of color difference signals D _PB and D _PR.
When three samples in succession are detected from the multiplex signal M ₁ obtained by multiplexing the signal of the predetermined level, it is determined to be the synchronizing signal of the digitally encoded luminance signal D _Y.

The video signal separating means 200 uses the sync signal detected by the sync signal detecting means 100 as a reference to generate a digitally encoded luminance signal D _Y and two types of color difference signals D _PB and D _PR from the multiplexed signal M _1. To separate.

The special code generation means 300 includes a digitally encoded luminance signal D _Y and two types of color difference signals D _PB ,
A special code S different from D _PR is generated. Multiplex means 400
Is a multiplexed signal M obtained by multiplexing the digitally encoded luminance signal D _Y and the two types of color difference signals D _PB and D _PR and the special code S generated by the special code generation means 300 in a predetermined order.
Output as ₂ .

The special code detecting means 500 is a multiplexing means 40.
The multiplex signal M ₂ output by 0 is received, and the special code S is detected. The video signal separating means 600 includes the special code detecting means 5
00 is used as a reference, the digitally encoded luminance signal D _Y and two types of color difference signals D _PB ,
Separate D _PR .

Therefore, according to the present invention (claims 1 and 2), it is possible to easily separate the luminance signal and the two kinds of color difference signals from the multiplexed signal, so that the luminance signal and the two kinds of color difference signals are multiplexed. It becomes possible to transmit the signal in the line connection device by making it possible to eliminate the difference in transmission delay time between the luminance signal and the two types of color difference signals, and to reduce the great labor required for adjusting the difference in transmission delay time.

[0019]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. 2 is a diagram showing a line connection device according to one embodiment of the present invention, FIG. 3 is a diagram showing a separation circuit according to one embodiment of the present invention (claim 1), and FIG. 4 is a target of the present invention. FIG. 2A is a diagram showing an example of a video signal, in which FIG.
(b) is a diagram showing the P _B signal and the P _R signal respectively, and FIG. 5 is a diagram showing an example of the quantized value of the video signal,
FIG. 6 is a diagram showing a multiplexed signal according to an embodiment of the present invention (Claim 1), FIG. 7 is a diagram showing a multiplexed circuit according to an embodiment of the present invention (Claim 2), and FIG. It is a figure which shows the separation circuit by one Example of invention (Claim 2), and FIG. 9 is a figure which shows the multiple signal by one Example of this invention (Claim 2). The same reference numerals denote the same objects throughout the drawings. The target high-definition image response system is as shown in FIG.

First, a video signal demultiplexing system according to an embodiment of the present invention (claim 1) will be described with reference to FIGS. In the line connection device according to one embodiment of the present invention (Claim 1), the separation circuit 58 is as shown in FIG.

In FIG. 3, the synchronization signal in FIG.
Signal detection means 100 and video signal separation means 200
The five-sample continuous detection unit 581, the synchronization detection unit 582, and the Y signal
No. detection timing creation unit 583_Y, P_BSignal detection timing
Ring making unit 583_PB, P_RSignal detection timing creation unit 5
83_PR, Y signal detector 584_Y, P_BSignal detector 584
_PBAnd P_RSignal detector 584_PRIs provided.

In FIG. 2, the Y signal, the P _B signal, and the P _R signal output from the image file 1 are digitally encoded by the corresponding analog-to-digital converter (ADC) 51, and the D _Y signal and the D _PB signal are obtained. And D _PR signal.

The Y signal has a band of 20 MHz and, as illustrated in FIG. 4 (a), a horizontal synchronizing signal having a pair of negative and positive pulses having peak values of -300 millivolt and +300 millivolt. , The analog-to-digital converter (ADC) 51, since it is composed of the video signal itself showing a non-negative waveform having a peak value of +700 millivolts.
Samples at a frequency of 44.55 MHz and quantizes each sampled value with 8 bits.

The P _B signal and the P _R signal have a band of 7 MHz, and as shown in FIG. 4 (b), a synchronization signal similar to the Y signal and a peak value of +350 millivolts and -350 millivolts. Since it is composed of a video signal itself showing a positive / negative waveform having
C) 51 has a frequency of 14.85 which is exactly one third of the Y signal.
Sampling in megahertz and quantizing each sampled value with 8 bits.

As a result, as illustrated in FIG. 5, the Y signals of -300 millivolts, 0 millivolts, +300 millivolts and +700 millivolts are quantized values "4", "65", "126" and "251", respectively. (However, "X" is an 8-bit binary number in decimal notation), and the P _B and P _R signals are -350 millivolts and -3.
00 millivolts, 0 millivolts, +300 millivolts, and +350 millivolts are quantized values of "4",
It becomes "41", "128", "215" and "251".

The multiplexing circuit 55 outputs the D _Y signal, the D _PB signal, and the D _PR signal output from each analog-digital conversion unit (ADC) 51 to 74.
The data is multiplexed into an 8-bit parallel multiplexed signal M ₁ of 25 megabytes and output.

The multiplexed signal M ₁ output from the multiplexing circuit 55
Is stored in the frame memory 56 commonly provided for the multiplex signal M ₁ and then transmitted to the separation circuit 58 via the video switch 57.

In the multiple signal M ₁ illustrated in FIG. 6, the sample values of the D _Y signal, D _PB signal and D _PR signal are
Since they are regularly arranged at the ratio of the sampling frequency with each sync signal as a reference, there is no risk of a transmission delay time difference between the D _Y signal, the D _PB signal and the D _PR signal.

The multiple signal M₁, The sample value is three
Indicating "4" in succession is D _YFor signal synchronization signal
The limitation is apparent from FIGS. 4 to 6. Minute
In the separation circuit 58, the five-sample continuous detection unit 581 is
From the memory 53 via the video switch 57.
Multiple signal M₁5 consecutive sample values are sequentially extracted from
Then, it is transmitted to the synchronization detection unit 582.

The synchronization detector 582 is a five-sample continuous detector 5
In order to discriminate whether or not the first three sets out of the continuous five sets of sample values transmitted from 81 show the sample value “4”, each sample and a predetermined threshold value (eg, “15”) The values are compared, and when the first three sets are smaller than the threshold value and the latter two sets are larger than the threshold value, the first three sets are the synchronizing signals of the D _Y signal and the latter two sets are the P _B signal and the P _B signal, respectively. It is determined that the sync signal is the P _R signal, and the detection time of each sync signal is the reference time T _Y ,
As T _PB and T _PR , the Y signal detection timing creation unit 5
83 _Y, respectively transmitted to P _B signal detecting timing generating unit 583 _PB and P _R signal detection timing generating unit 583 _PR.

The Y signal detection timing generation unit 583 _Y
The detection timing signal ST _Y of the Y signal having a frequency of 44.55 MHz is generated in synchronization with the reference time point T _Y transmitted from the synchronization detection unit 582, and the Y signal detection unit 584 _Y is generated.
Communicate to.

Similarly, the P _B signal detection timing creation unit 58
The 3 _PB and P _R signal detection timing creation unit 583 _PR also
The reference time point T _PB transmitted from the synchronization detection unit 582, respectively.
And T _PR to synchronize, respectively to create a detection timing signal ST _PB and SP _PR of P _B signals and P _R signals having a frequency 14.85 MHz, respectively P _B signal detector 584 _PB and P _R signal detection unit 584 Communicate to _PR .

Y signal detector 584_Y, P_BSignal detector 5
84_PBAnd P_RSignal detector 584 _PRThe frame memo
Multiplex signal transmitted from the printer 53 via the image switch 57
Issue M ₁From the detection timing signal ST_Y, ST
_PBAnd ST_PRIn sync with D _YSignal, D_PBSignal and D
_PROnly the signal is detected and output.

As is apparent from the above description, according to the embodiment shown in FIGS. 2 to 6, the Y signal, the P _B signal and the P _R signal output from the image file 1 are digitally encoded, respectively. , The multiplexing circuit 55 multiplexes the multiplexed signal M ₁ and the demultiplexing circuit 58 easily demultiplexes, so that the transmission delay time difference between each Y signal, P _B signal and P _R signal is eliminated.

Next, a video signal demultiplexing system according to an embodiment of the present invention (claim 2) will be described with reference to FIGS. 2, 4, 5 and 7 to 9. The target line connection device is as shown in FIG. 2, and the target video signal is as shown in FIGS. 4 and 5.

In the line connection device according to one embodiment of the present invention (claim 2), the multiplexing circuit 55 is as shown in FIG. 7 and the separating circuit 58 is as shown in FIG. 7, a special code generation unit 551, a multiplexing unit 552, a counter 553, and a read-only memory 554 are provided as the special code generation unit 300 and the multiplexing unit 400 in FIG. 1B, and in FIG. ,
As the special code detecting means 500 and the video signal separating means 600 in FIG. 1B, a shift register 585, a separating section 586, a counter 587 and a read-only memory 588 are provided.
Is provided.

In FIG. 2, the Y signal, the P _B signal and the P _R signal output from the image file 1 respectively correspond to the corresponding analog-to-digital converters (as in the first embodiment of the present invention (claim 1)). The ADC 51 samples the signals at frequencies of 44.55 MHz and 14.85 MHz, quantizes them with 8 bits, digitally encodes the D _Y signal, the D _PB signal, and the D _PR signal, and outputs the signals.

Each analog-digital converter (ADC) 5
The D _Y signal, the D _PB signal, and the D _PR signal output from 1 are transmitted to the multiplexing circuit 55. In the multiplexing circuit 55 according to one embodiment of the present invention (claim 2), the special code generation unit 551 has a predetermined special code S (for example, 8 bits, which does not appear in the D _Y signal, the D _PB signal and the D _PR signal). A code composed of all logic “0”) is created and transmitted to the multiplexing unit 552.

The counter 553 is a hexadecimal counter that counts a clock signal of 89.1 MHz, and transmits the count output to the read-only memory 554. Read-only memory 5
54 receives the count output transmitted from the counter 553 as a read address, outputs a selection signal as described below, and transmits it to the multiplexing unit 552.

The multiplexer 552 receives the D _Y signal, the D _PB signal, and the D _PR signal transmitted from each analog-digital converter (ADC) 51, and the special code S transmitted from the special code generator 551. Read-only memory 5
According to the selection signal transmitted from 54, the D _Y signal, the D _PB signal, the D _Y signal, the D _PR signal, the D _Y signal and the special code S are selected in this order, and as shown in FIG. 9, 89.1 megabytes per second. It is output as an 8-bit parallel multiplexed signal M ₂ .

As described above, in the multiplexed signal M ₂ , three sets of sample values of the D _Y signal, one set of sample values of the D _PB signal and D _PR signal, and one set of the special code S are provided, and they are periodically arranged in a predetermined order. Therefore, as in the case of the multiplexed signal M ₁ illustrated in FIG. 6, there is no possibility that a transmission delay time difference will occur between the D _Y signal, the D _PB signal, and the D _PR signal.

The multiplexed signal M ₂ output from the multiplexing circuit 55
Is stored in the frame memory 56 commonly provided for the multiplex signal M ₂ , and then transmitted to the separation circuit 58 via the video switch 57.

In the separation circuit 58, the multiplex signal M arriving from the frame memory 56 via the video switch 57 is transmitted.
₂ is transmitted to the gate 585 and the separating unit 586.
In the gate 585, the special code S arrives as the multiplexed signal M ₂ , and all the input eight bits b _{0 to} b ₇ are logical “0”.
Then, the logic "1" is output and input to the initial setting terminal CLR of the counter 587.

The counter 587 is a hexadecimal counter which counts the 89.1 MHz clock signal input to the clock terminal CK when it is initialized each time a logic "1" is input to the initialization terminal CLR. The count output is transmitted to the read-only memory 588.

The read-only memory 588 has a counter 587.
The count output transmitted from the receiver is received as a read address, a distribution signal as described below is output, and the separation unit 58
6.

The separating unit 586 sequentially distributes the D _Y signal, the D _PB signal, the D _Y signal, the D _PR signal, and the D _Y signal from the multiplexed signal M _{2 according} to the distribution signal transmitted from the read-only memory 588. Output. The special code S is absorbed by the initial setting of the counter 587 and is not output to the outside.

As is clear from the above description, according to the embodiment shown in FIGS. 2, 4, 5 and 7 to 9, the Y signal, P _B signal and P _R output from the image file 1 are output. Each signal is digitally encoded, then multiplexed in a multiplexing circuit 55 into a multiplexed signal M ₂ containing a special code S, and easily separated in a separating circuit 58 with the special code S as a reference. The transmission delay time difference between the P _B signal and the P _R signal is eliminated.

2 to 9 are merely embodiments of the present invention, and the configurations of the high-definition image response system and the line connection device 5 which are the objects of the present invention are limited to those shown in the drawings. Of course, many other variations are considered,
In any case, the effect of the present invention does not change.

[0049]

As described above, according to the present invention (Claims 1 and 2), the luminance signal and the two kinds of color difference signals can be easily separated from the multiplex signal, so that the luminance signal and the two kinds of color difference signals can be easily separated. Can be multiplexed and transmitted in the line connection device, the difference in transmission delay time between the luminance signal and the two types of color difference signals can be removed, and the great effort required for adjusting the difference in transmission delay time can be reduced.

[Brief description of drawings]

FIG. 1 is a diagram showing the principle of the present invention, wherein FIG. 1 (a) shows the principle of the present invention (claim 1), and FIG. 1 (b) shows the principle of the present invention (claim 2).

FIG. 2 is a diagram showing a line connection device according to an embodiment of the present invention.

FIG. 3 is a diagram showing a separation circuit according to an embodiment of the present invention (claim 1).

FIG. 4 is a diagram showing an example of a video signal to which the present invention is applied. FIG. 4 (a) shows a Y signal, and FIG. 4 (b) shows a P _B signal and a P signal.
Indicates _R signal

FIG. 5 is a diagram showing an example of a quantized value of a video signal.

FIG. 6 is a diagram showing a multiplexed signal according to an embodiment of the present invention (claim 1).

FIG. 7 is a diagram showing a multiplex circuit according to an embodiment of the present invention (claim 2).

FIG. 8: Separation circuit according to one embodiment of the present invention (claim 2)

FIG. 9 is a diagram showing a multiplexed signal according to an embodiment of the present invention (claim 2).

FIG. 10 is a diagram showing an example of a high-definition image response system to which the present invention is applied.

FIG. 11 is a diagram showing an example of a conventional line connection device.

[Explanation of symbols]

1 Image File 2 Audio File 3 Image Terminal 4 Control Terminal (KP) 5 Line Connection Device 6 Main Control Device 51 Analog-to-Digital Converter (ADC) 52, 56 Frame Memory 53, 57 Video Switch 54 Digital-Analog Converter (DAC) 55 Multiplexing circuit 58 Separation circuit 100 Synchronous signal detecting means 200, 600 Video signal separating means 300 Special code generating means 400 Multiplexing means 500 Special code detecting means 551 Special code generating section 552 Multiplexing section 553,587 Counter 554,588 Read only memory 581 5 Sample continuous detection unit 582 Synchronization detection unit 583 _Y Y signal detection timing generation unit 583 _PB P _B signal detection timing generation unit 583 _PR P _R signal detection timing generation unit 584 _Y Y signal detection unit 584 _PB P _B signal detection unit 584 _PR P _R signal detector 58 5 Gate 586 Separation part

Claims (2)

[Claims] 1. A digitally encoded luminance signal
(D_Y) And a sampling period that is three times the sampling period of the luminance signal.
Color difference signal (D_PB, D_PR) And multiplex and exchange connection
The original digitally encoded luminance signal (D_Y)
And two color difference signals (D_PB, D_PR) High precision
In a fine image line connection device, the digitally encoded luminance signal (D_Y) And two
Color difference signal (D_PB, D_PR) Multiplexed signal
(M₁) From the signal level below the predetermined signal level
When the samples are continuously detected, the digitally encoded
Luminance signal (D _Y) Sync signal detection
The output means (100) and the synchronization signal detected by the synchronization signal detection means (100).
As a reference, the multiple signal (M₁) From the digital
Coded luminance signal (D_Y) And two types of color difference signals
(D_PB, D_PRSignal separating means (200)
And a video signal demultiplexing system characterized by being provided. 2. A digitally encoded luminance signal (D _Y ) and two types of color difference signals (D _PB , D _PR ) having a sampling period three times as long as the luminance signal are multiplexed and exchange-connected. The original digitally encoded luminance signal (D _Y ) later
And a high-definition image line connection device for separating into two types of color difference signals (D _PB , D _PR ) the digitally encoded luminance signal (D _Y ) and two types of color difference signals (D _PB , D _PR ). Special code (S) different from
Is generated by the special code generation means (300), the digitally encoded luminance signal (D _Y ) and two types of color difference signals ( _DPB , _DPR ), and the special code generation means (300). Multiplexing means (400) for multiplexing (M ₂ ) and outputting the special code (S) in a predetermined order
A special code detecting means (500) for detecting the special code (S) by receiving the multiplexed signal (M ₂ ) output by the multiplexing means (400), and a special code detecting means (500) for detecting the special code (S). With the special code (S) as a reference, the digitally encoded luminance signal (D _Y ) and two kinds of color difference signals (D _PB , D _PR )
And a video signal separation means (600) for separating the video signal.