JPH0537514A - Binary base band transmitter - Google Patents

Abstract

PURPOSE:To reduce the scale of a signal processing. CONSTITUTION:The pause signal insertion circuit 11 of a transmission section T segments an input data signal S11 to convert its speed to be twice or over and gives a signal S12 with a clock signal synchronously with a data and a pause signal inserted thereto and subjected to multiplex to a waveform conversion circuit 12, in which the signal is converted into an analog base band signal S13 and it is sent to a transmission line W. The waveform shaping circuit 13 of a reception section R converts the analog base band signal S13 into a binary digital signal S14 and a pause signal detection circuit 14 detects a pause signal in the data. A data clock demultiplexer circuit 15 extracts only a clock signal from a multiplex signal according to the result of detection of the pause signal S15 and the predetermined system, delays the clock signal so as to be coincident with the phase of a data signal and supplies the signal S16 to a data processing circuit 16, in which the processing of speed conversion or the like is implemented based on the clock signal synchronously with the input data signal S11 to obtain an output data signal S17.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a binary baseband transmission device for transmitting binary baseband transmission information to a partner device via a wired transmission path or the like.

[0002]

2. Description of the Related Art Conventionally, data communication is roughly classified into a modulation system and a non-modulation system. Unmodulated waveform transmission such as the baseband transmission method requires signal processing such as waveform shaping and waveform equalization as compared with the modulation method, but does not require the modulation processing. Therefore, there is an advantage that the device configuration can be simplified, and it is widely used for recent digital communication.

A transmission signal in the baseband transmission system is composed of an information bit part and a housekeeping bit used for communication operation between transmission devices.

In the receiving device for receiving this transmission signal, the binary digital signal on the transmitting side is demodulated by the waveform shaping process and sent to the terminal. In the signal processing in this case, a frequency component is extracted from the transmission signal and a clock for performing the synchronization signal processing is generated.
A bandpass filter (BPF) is commonly used. An analog circuit such as an LC filter or a mechanical filter is used for the band pass filter.

FIG. 4 shows the structure of such a conventional receiving apparatus.

The transmitter T receives the input data from the waveform conversion circuit 1
It is converted into an analog baseband signal by and is sent to the waveform shaping circuit 2 of the receiving section R through the transmission path W. The waveform-shaped binary digital signal from here is supplied to the data processing circuit 4 as a data input.

On the other hand, the data processing circuit 4 is supplied with the clock from the clock recovery circuit 3. The clock recovery circuit 3 extracts a frequency component from the input analog data with a bandpass filter, and further outputs a digital clock signal with a voltage comparator.

[0008]

By the way, the band-pass filter composed of the above-mentioned conventional analog circuit has a drawback that the signal processing is complicated and the signal processing scale is increased. Therefore, the recent digitization of LSI
There is a problem that it is difficult to reduce the size, reduce the size, and reduce the price.

An object of the present invention is to provide a binary baseband transmission device capable of reducing the signal processing scale.

[0010]

In order to achieve this object, a binary baseband transmission apparatus of the present invention is a binary baseband transmission apparatus for transmitting binary baseband transmission information through a transmission line. In the binary baseband transmission information, the data signal and the clock signal composed of the frequency component of the data signal are in any one of three units of a bit unit, a word unit and a block unit alternately arranged corresponding to text in data communication. It is characterized by being.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a binary baseband transmission device of the present invention will be described below with reference to the drawings.

First, the basic configuration and operation of the embodiment will be described.

In the binary baseband transmission apparatus of this example, since the data signal and the clock signal are transmitted on the transmission line, the clock recovery unit for analog signal processing, which is required for the conventional receiving unit in the receiving unit, is provided. Although unnecessary, transmission efficiency is likely to deteriorate. That is, since both the data signal and the clock signal are transmitted, the transmission efficiency is half that of the conventional one.
It becomes the following. In this embodiment, the transmission line communication speed is doubled or more, and the speed conversion (higher speed) in the transmission unit and the speed conversion (lower speed) in the reception unit are performed by recent digital processing.

Further, the receiving section in this system simply performs waveform shaping of the data signal from the transmission line and returns it to a binary digital signal by simple processing, and recognizes and separates the data signal and the clock signal. There is a need. When the data signal and the clock signal are transmitted, the data signal and the clock signal are alternately transmitted with a periodicity in a fixed time unit. In this embodiment, however, the transmission code pause section is provided for each period during the transmission. (Insertion of pause signal) is provided, and by determining this pause signal on the receiving side, the contents of the next incoming signal (data signal, clock signal) are identified, and separation is possible.

In the case of transmitting the data signal and the clock signal, there is an example in which the data signal and the clock signal are alternately arranged and transmitted in bit units in view of the periodicity. In this case, the insertion interval of the pause signal is arranged in bit units (1 bit of data and 1 bit of clock), so that the transmission efficiency is deteriorated, but there is an advantage that the device scale is reduced. In addition, there is an example in which words are alternately arranged and transmitted in units of words (consisting of several bits). Further, there is an example in which blocks (corresponding to text in data communication) are alternately arranged and transmitted. In this example, since the pause signal insertion interval is in block units, there is a drawback that the device scale is increased although the transmission efficiency is relatively long and good.

The specific structure and operation will be described below.

FIG. 1 shows the configuration of the embodiment.

In FIG. 1, a transmission section T performs speed conversion of an input data signal S11, and a pause signal insertion circuit 11 for inserting a synchronous clock and a pause signal, and a signal S12 from the pause signal insertion circuit 11 into an analog baseband signal S13. The waveform conversion circuit 12 is included.

The receiving section R converts the analog baseband signal S13 from the transmission line W into a binary digital signal S14 and a pause signal S15 (for example, a binary "0" signal) in the data. Pause signal detection circuit 14 for detecting
And a data clock separation circuit 15. The data clock separation circuit 15 extracts a clock from the multiplexed signal according to the detection result of the pause signal S15 and a predetermined method (value), and further, the clock signal so that the clock signal matches the phase of the data signal. Delay the signal S16
Is output. Further, the receiving section R receives the input data signal S11
And the output data signal S17 by performing speed conversion (speed reduction) processing based on the clock signal synchronized with the input data signal S11.
And a data processing circuit 16 for outputting

Next, the operation of this configuration will be described.
FIG. 2 shows signal processing waveforms and timings when this operation is made up of 1 word and 8 bits.

In the transmission section T, the pause signal insertion circuit 11 divides the input data signal S11 by a value of a predetermined method (bit unit, word unit, block unit) to convert it into a speed more than double, and further converts it into data. The synchronized clock signal and pause signal S15 are inserted. Then, the waveform conversion circuit 1
The signal S12 obtained by multiplexing the input data signal S11 with the clock signal and the pause signal S15 is converted into the analog baseband signal S13 from the input signal S11 and sent to the transmission line W.

In the receiver R, the analog baseband signal S13 from the transmission line W is converted into a binary digital signal S14 by the waveform shaping circuit 13, and the pause signal detecting circuit 14 pauses the signal S15 (for example, 2) in the data. A "0" signal) is detected and sent to the data clock separation circuit 15 as a pause signal S15. The data clock separation circuit 15 extracts only the clock signal from the multiplexed signal according to the detection result of the pause signal S15 and the predetermined method (value), and further, the clock signal matches the phase of the data signal, The signal S16 is output after delaying the clock signal. The data processing circuit 16 performs processing such as speed conversion (speed reduction) on the basis of the clock signal synchronized with the input data signal S11 and outputs the output data signal S17 to the transmission line.

Next, signal processing in bit units and block units for the word unit shown in FIG. 2 will be described.

FIG. 3 shows the timing of signal processing in bit units and block units.

The bit unit and the block unit are basically the same as the word unit. The binary digital signals S14 and S16 of FIG.
(Bit unit) and 224, 226 (block unit)
Show as.

In FIG. 3, X, Y, and Z respectively represent a clock signal, a data signal, and a pause signal, and Δt represents a delay amount for matching the phase of the data signal with the phase of the clock signal.

In the three methods of word, bit and block, the transmission efficiency is good in the order of block, word and bit in view of the time ratio of the X, Y and Z data signals. Also,
Seen from the delay amount (hardware amount) of Δt, bits, words, and blocks are excellent in this order.

As described above, the data signal and the clock signal composed of the frequency component of the data signal are any one of the three units of the bit unit, the word unit and the block unit alternately arranged corresponding to the text in the data communication. ,
The clock regenerating unit for analog signal processing, which is conventionally required in the receiving unit, becomes unnecessary, and the signal processing scale can be reduced. Therefore, it is possible to easily achieve miniaturization and cost reduction of LSI by recent digitalization.

[0029]

As is apparent from the above description, in the binary baseband transmission apparatus of the present invention, the binary baseband transmission information on the transmission line is composed of the data signal and the clock signal composed of the frequency component of the data signal. , A bit unit, a word unit, or a block unit alternately arranged corresponding to text in data communication, the clock recovery unit for analog signal processing, which is conventionally required in the receiving unit, is not required, and the signal processing scale is reduced. Has the effect of being reduced.

[Brief description of drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of a binary baseband transmission apparatus of the present invention according to the present invention.

FIG. 2 is a signal processing waveform and timing chart in the case where the operation in the embodiment is configured by 1 word and 8 bits.

FIG. 3 is a timing chart of signal processing in bit units and block units.

FIG. 4 is a block diagram showing a configuration of a conventional binary baseband transmission device.

[Explanation of symbols]

 11 Pause signal insertion circuit 12 Waveform conversion circuit 13 Waveform shaping circuit 14 Pause signal detection circuit 15 Data clock separation circuit 16 Data processing circuit R Receiver S11 Input data signal S13 Analog baseband signal S17 Output data signal T Transmitter W Transmission line

Claims (1)

[Claims] 1. A binary baseband transmission device for transmitting binary baseband transmission information through a transmission line, wherein the binary baseband transmission information on the transmission line is a data signal and a clock signal composed of frequency components of the data signal. Is a bit base, a word unit, or a block unit alternately arranged corresponding to text in data communication, and is a binary baseband transmission device.