JPH0535433B2 - - Google Patents

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Publication number
JPH0535433B2
JPH0535433B2 JP58219813A JP21981383A JPH0535433B2 JP H0535433 B2 JPH0535433 B2 JP H0535433B2 JP 58219813 A JP58219813 A JP 58219813A JP 21981383 A JP21981383 A JP 21981383A JP H0535433 B2 JPH0535433 B2 JP H0535433B2
Authority
JP
Japan
Prior art keywords
electrode
transparent insulating
insulating substrate
photosensitive resin
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58219813A
Other languages
Japanese (ja)
Other versions
JPS60112089A (en
Inventor
Kyohiro Kawasaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP58219813A priority Critical patent/JPS60112089A/en
Publication of JPS60112089A publication Critical patent/JPS60112089A/en
Publication of JPH0535433B2 publication Critical patent/JPH0535433B2/ja
Granted legal-status Critical Current

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  • Liquid Crystal (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Description

【発明の詳細な説明】 産業上の利用分野 本発明は液晶と組み合わせることによつて構成
される画像表示装置に関するものである。
DETAILED DESCRIPTION OF THE INVENTION FIELD OF INDUSTRIAL APPLICATION The present invention relates to an image display device configured in combination with a liquid crystal.

従来例の構成とその問題点 液晶表示装置において、液晶セルの静的動作を
可能とし、多重化を実現するためにはトランジス
タやダイオードなどの非線形素子と液晶セルより
なる単位絵素を2次元のマトリクスに配列する必
要がある。
Conventional configurations and their problems In liquid crystal display devices, in order to enable static operation of liquid crystal cells and to realize multiplexing, unit pixels consisting of nonlinear elements such as transistors and diodes and liquid crystal cells are made into two-dimensional structures. Must be arranged in a matrix.

第1図は非線形素子としてMIS(絶縁ゲート)
トランジスタ1を用いた場合の等価回路を示す。
走査線3にゲートパルスが印加されると横方向の
トランジスタは一斉にON状態になるので、ゲー
トパルスが印加されている期間中に信号線4より
一斉にあるいは順次にy1,y2…yj画像信号を液晶
セル2に電気的に書き込む。ゲートパルスを縦方
向x1,x2…xiに順次走査することによつて全画面
の書き込みが完了し、再びゲートパルスを縦方向
に走査することによつて多重化が容易に達成され
る。液晶セル2に書き込まれた信号電圧はトラン
ジスタ1のOFF抵抗と液晶セル2の抵抗分を通
して放電していくが、通常これらの抵抗は十分高
くて液晶セル2両端の電位差の変化は画像表示に
は支障をきたさないように設計的手法が考慮され
る。液晶セル2の一方の電極5は共通電極として
全絵素共通に構成され、適当な電位に保持され
る。
Figure 1 shows MIS (insulated gate) as a nonlinear element.
An equivalent circuit using transistor 1 is shown.
When a gate pulse is applied to the scanning line 3, the horizontal transistors are turned on all at once, so during the period when the gate pulse is applied, y 1 , y 2 ...y are transmitted from the signal line 4 all at once or sequentially. j Electrically write the image signal to the liquid crystal cell 2. Writing of the entire screen is completed by sequentially scanning the gate pulse in the vertical direction x 1 , x 2 . . . x i , and multiplexing is easily achieved by scanning the gate pulse in the vertical direction again. . The signal voltage written to the liquid crystal cell 2 is discharged through the OFF resistance of the transistor 1 and the resistance of the liquid crystal cell 2, but normally these resistances are sufficiently high that changes in the potential difference between both ends of the liquid crystal cell 2 are not enough to display an image. Design methods will be taken into consideration to avoid any problems. One electrode 5 of the liquid crystal cell 2 is configured as a common electrode for all picture elements, and is maintained at an appropriate potential.

トランジスタ1のOFF抵抗あるいは液晶セル
2の抵抗が低いかまたは階調を重視する場合には
補助容量を液晶セル2に並列に加えるが、トラン
ジスタ1と液晶セル2との接続点と接地点との間
に加える手法が知られている。
If the OFF resistance of transistor 1 or the resistance of liquid crystal cell 2 is low, or if gradation is important, an auxiliary capacitor is added in parallel to liquid crystal cell 2. A method of adding in between is known.

第2図は上記画像表示装置を集積化した場合の
集積化基板の平面図であり、第3図は第2図のA
−A′線上の要部断面図を示す。
FIG. 2 is a plan view of an integrated substrate in which the above image display device is integrated, and FIG.
A sectional view of the main part along the line -A' is shown.

ここではMISトランジスタ1としてa−Siを半
導体材料に用いた場合について説明しよう。トラ
ンジスタ1は、走査線3も兼ね例えばMoよりな
るゲート電極と、信号線4も兼ね例えばAより
なるドレイン(またはソース)電極と、負荷であ
る液晶セル2に接続されるソース(またはドレイ
ン)電極6からなり、液晶セル2は例えばITOよ
りなる絵素電極7、および同じくITOよりなる共
通透明電極5と液晶を封止するために透明性絶縁
基板例えばガラス板9,10ではさまれた空間を
充填する液晶8とからなる。11はa−Siを島状
に形成したものであり、12は例えばSi3N4より
なるゲート絶縁膜であつて、いずれもトランジス
タ1の構成要素である。
Here, we will explain the case where a-Si is used as the semiconductor material for the MIS transistor 1. The transistor 1 has a gate electrode made of, for example, Mo, which also serves as the scanning line 3, a drain (or source) electrode, made of, for example, A, which also serves as the signal line 4, and a source (or drain) electrode connected to the liquid crystal cell 2, which is a load. The liquid crystal cell 2 includes a pixel electrode 7 made of, for example, ITO, a common transparent electrode 5 also made of ITO, and a space sandwiched between transparent insulating substrates, such as glass plates 9 and 10, to seal the liquid crystal. It consists of a liquid crystal 8 to be filled. Reference numeral 11 denotes an island formed of a-Si, and reference numeral 12 denotes a gate insulating film made of, for example, Si 3 N 4 , both of which are constituent elements of the transistor 1 .

a−SiのMISトランジスタの製法および特性に
ついては各種の文献が公開されており、要はガス
板10−透明電極5−液晶8−透明電極7−(透
明絶縁層12)−ガラス板9よりなる光学系を電
気的に制御する機能と手段が必要なのである。第
3図の構成に加えて偏光板や反射板の導入によ
り、第3図の画像表示装置は透過型としても反射
型としても対応でき、光源あるいは液晶材料によ
つてその選択は決定される。
Various documents have been published regarding the manufacturing method and characteristics of a-Si MIS transistors, which basically consist of a gas plate 10, a transparent electrode 5, a liquid crystal 8, a transparent electrode 7, a transparent insulating layer 12, and a glass plate 9. A function and means to electrically control the optical system are required. By introducing a polarizing plate and a reflecting plate in addition to the configuration shown in FIG. 3, the image display device shown in FIG. 3 can be used as either a transmissive type or a reflective type, and the selection is determined by the light source or liquid crystal material.

上記画像表示装置においては絵素電極7は第2
図に示したように単位絵素内および隣り合つた単
位絵素間で写真食刻工程の合せ精度に対応した距
離だけ走査線3および信号線4より離れて小さ
目に設定する必要がある。例えば第3図の構成で
絵素電極7と信号線4とが重なつて形成されると
トランジスタ1の制御作用が失われてしまうこと
は明白であろうし、また信号線4の表面に絶縁層
の導入を行なつて電気的短絡を阻止したところで
第4図に示したように余分な寄生容量13が発生
することは避けられない。同様に絵素電極7と走
査線3が重なつてしまうと寄生容量14が生じて
しまう。
In the above image display device, the picture element electrode 7 is the second
As shown in the figure, it is necessary to set the distance within a unit picture element and between adjacent unit picture elements to be smaller than the scanning line 3 and signal line 4 by a distance corresponding to the alignment accuracy of the photo-etching process. For example, in the configuration shown in FIG. 3, if the pixel electrode 7 and the signal line 4 are formed to overlap, it is obvious that the control effect of the transistor 1 will be lost. Even if the electrical short circuit is prevented by introducing the parasitic capacitance 13, it is inevitable that an extra parasitic capacitance 13 will be generated as shown in FIG. Similarly, if the picture element electrode 7 and the scanning line 3 overlap, a parasitic capacitance 14 will occur.

寄生容量13は信号線4の負荷容量を増すの
で、画像表示装置を駆動するための映像信号増幅
器は液晶セル2を充電するために必要な能力以上
の駆動能力が必要となる。すなわち駆動電力の増
大と出力インピーダンスの低減は避けられない。
同様に寄生容量14は走査線3の負荷容量を増す
ので走査信号増幅器も余分な駆動能力が必要とな
る。ただし、走査信号を転送するためのクロツク
周波数は低いので消費電力の増加は少なくてす
る。
Since the parasitic capacitance 13 increases the load capacitance of the signal line 4, the video signal amplifier for driving the image display device needs to have a driving capacity higher than that required for charging the liquid crystal cell 2. That is, an increase in drive power and a decrease in output impedance are unavoidable.
Similarly, since the parasitic capacitance 14 increases the load capacitance of the scanning line 3, the scanning signal amplifier also requires extra driving capability. However, since the clock frequency for transferring the scanning signal is low, the increase in power consumption is small.

寄生容量14の最も大きな悪影響は走査信号が
トランジスタ1と液晶セル2の接続点15へ静電
結合して重畳されることにある。この重畳による
接続点15の電位の変動の大きさΔVは、走査信
号の振幅をVとし、寄生容量をC14、液晶セル2
の容量をCLCとすると ΔV=V×C14/CLC+C14 で与えられ、接続点15の電位は走査(ゲート)
パルスに立上り、立下り時にΔVだけの変動を受
ける。この結果、液晶セル2を交流駆動しようと
した場合には蓄積期間であるにもかかわらずトラ
ンジスタ1がon状態となることもあり、映像信
号の利用効率が低下し、画像のコントラスト比の
低下は避けられない。したがつて液晶セル2に十
分な書き込みを与えるためには、(1)、より大きな
映像信号を供給する、(2)、走査信号の0(ゼロ)
レベルを負方向(nチヤネル動作の場合)にまで
拡張する、(3)、より大きな走査信号を供給する、
などの対策を必要とし、いずれの場合にも画像表
示装置を駆動するための電力消費が増加する。
The most significant adverse effect of the parasitic capacitance 14 is that the scanning signal is capacitively coupled to and superimposed on the connection point 15 between the transistor 1 and the liquid crystal cell 2. The magnitude of the change in potential at the connection point 15 due to this superimposition ΔV is determined by where the amplitude of the scanning signal is V, the parasitic capacitance is C 14 , and the liquid crystal cell 2
If the capacitance of is C LC , it is given by ΔV=V×C 14 /C LC +C 14 , and the potential of connection point 15 is scanning (gate)
It undergoes a fluctuation of ΔV at the rise and fall of the pulse. As a result, when trying to drive the liquid crystal cell 2 with alternating current, the transistor 1 may be turned on even during the storage period, reducing the efficiency of using the video signal and reducing the contrast ratio of the image. Inevitable. Therefore, in order to provide sufficient writing to the liquid crystal cell 2, (1) supply a larger video signal, and (2) reduce the scanning signal to 0 (zero).
Extending the level in the negative direction (for n-channel operation); (3) providing a larger scanning signal;
In either case, power consumption for driving the image display device increases.

一方、接続点15と接地点との間、あるいは液
晶セル2に並列に寄生容量C14および液晶セル容
量CLCよりも十分大きな値の補助容量Cを付加す
ると変動の大きさは ΔV=V×C14/C14+CLC+C0 となつて上記した問題点は回避できる。
On the other hand, if an auxiliary capacitance C with a value sufficiently larger than the parasitic capacitance C14 and the liquid crystal cell capacitance CLC is added between the connection point 15 and the ground point or in parallel with the liquid crystal cell 2, the magnitude of the fluctuation will be ΔV=V× C 14 /C 14 +C LC +C0, and the above-mentioned problems can be avoided.

ところがトランジスタ1の負荷が増大するの
で、所定の書き込み期間内に補助容量Cを充電で
きるかどうかが新たな問題点として発生する。も
しトランジスタ1が負荷容量の増大に対処できな
ければ、(イ)、相互コンダクタンスを上げるために
走査信号を大きくする、(ロ)、トランジスタ1の平
面的なサイズを大きくする、などの対策が必要と
なる。要はトランジスタ1で代表される非線形素
子の材質で決まる電流を流す能力が十分でなけれ
ば、プロセス技術、デバイス構造、回路設計のい
ずれかにかなり厳しい仕様の変更が要求される。
例えば上記(ロ)においては必然的に開口率の低下に
結びつき、画像表示装置の本質にかかわる重要な
問題である。
However, since the load on the transistor 1 increases, a new problem arises as to whether the auxiliary capacitor C can be charged within a predetermined write period. If transistor 1 cannot cope with the increase in load capacitance, measures such as (a) increasing the scanning signal to increase the mutual conductance, and (b) increasing the planar size of transistor 1 are required. becomes. In short, if the ability to flow a current determined by the material of the nonlinear element represented by the transistor 1 is not sufficient, changes in the process technology, device structure, or circuit design will be required to have fairly severe specifications.
For example, the above (b) inevitably leads to a decrease in the aperture ratio, which is an important problem concerning the essence of the image display device.

発明の目的 本発明は上記した現状に鑑みなされたもので、
工程の増加や回路設計上の仕様変更を伴なわずに
開口率を上げることを目的とする。
Purpose of the Invention The present invention has been made in view of the above-mentioned current situation.
The purpose is to increase the aperture ratio without increasing the number of processes or changing specifications in circuit design.

発明の構成 本発明においては、絵素電極以外の電極材が紫
外線に対してほとんど不透明であることを利用し
て透明基板上に自己整合的に絵素電極を形成する
ことが構成の要点であり、第5図以下の図面とと
もに本発明の実施例について説明する。
Structure of the Invention In the present invention, the key point of the structure is to form the pixel electrodes in a self-aligned manner on the transparent substrate by utilizing the fact that the electrode materials other than the pixel electrodes are almost opaque to ultraviolet rays. , and embodiments of the present invention will be described with reference to the drawings from FIG.

実施例の説明 第5図は本発明の一実施例にかかる画像表示装
の単位絵素の平面図であり、B−B′線上の断面
図が第6〜8図に示されている。なお、第6〜8
図は基板9部分のみの構造を示す。
DESCRIPTION OF THE EMBODIMENTS FIG. 5 is a plan view of a unit picture element of an image display device according to an embodiment of the present invention, and sectional views taken along the line B-B' are shown in FIGS. 6-8. In addition, 6th to 8th
The figure shows the structure of only 9 portions of the substrate.

本発明による画像表示装置は絵素電極の形成に
先立ち、非線形素子と走査線および信号線の形成
が成される。多くの場合非線形素子は半導体材料
が使用され、走査線や信号線には抵抗値を下げる
ために金属薄膜が用いられる。これらの材料は通
常用いられる厚み(0.1〜1μm)では紫外線に対
してほぼ不透明である。そこで第6図に示したよ
うに走査線3、信号線4、および非線形素子であ
るトランジスタを例えばガラス板9の一主面上に
形成した後に、全面に例えばITOよりなる透明導
電層16を形成し、引き続きネガ型の感光性樹脂
17を塗布する。そしてガラス板9の他の主面上
より紫外線19を照射する。ガラス板9および透
明導電層16は波長が短かくなるにつれて紫外線
の透過率が低下するが波長300〜350nmにおいて
は概ね30%以上の透過率を有するので、露光時間
を数倍長くすればガラス板9の裏側からの紫外線
照射によつて感光性樹脂17は感光する。前述し
たように例えばMoよりなる走査線3、例えばA
よりなる信号線4および接続電極6と、2000〜
5000Åの厚みを有するa−Siの島11は紫外線を
殆んど通さないのでネガ型の感光性樹脂17は上
記不透明物質上を除いて選択的に感光される。
In the image display device according to the present invention, nonlinear elements, scanning lines, and signal lines are formed prior to forming picture element electrodes. In many cases, semiconductor materials are used for nonlinear elements, and metal thin films are used for scanning lines and signal lines to lower resistance values. These materials are nearly opaque to ultraviolet light at the thicknesses commonly used (0.1-1 μm). Therefore, as shown in FIG. 6, after forming a scanning line 3, a signal line 4, and a transistor, which is a nonlinear element, on one main surface of a glass plate 9, for example, a transparent conductive layer 16 made of, for example, ITO is formed on the entire surface. Then, a negative photosensitive resin 17 is applied. Then, ultraviolet rays 19 are irradiated onto the other main surface of the glass plate 9. The transmittance of ultraviolet rays decreases as the wavelength of the glass plate 9 and the transparent conductive layer 16 becomes shorter, but the transmittance of ultraviolet rays is approximately 30% or more in the wavelength range of 300 to 350 nm, so if the exposure time is several times longer, the glass plate The photosensitive resin 17 is exposed to ultraviolet rays from the back side of the photosensitive resin 9 . As mentioned above, the scanning line 3 made of, for example, Mo, for example, A
A signal line 4 and a connection electrode 6 consisting of 2000~
Since the a-Si islands 11 having a thickness of 5000 Å hardly transmit ultraviolet rays, the negative type photosensitive resin 17 is selectively exposed to light except on the opaque material.

このままで非線形素子であるトランジスタとの
接続電極6上の感光性樹脂が感光しないので、ガ
ラスマスク18と紫外線19′によつてガラス板
9上から通常の露光を行ない、透明導電層16の
一部と接続電極6との一部がつながるようにす
る。
Since the photosensitive resin on the connection electrode 6 with the transistor, which is a nonlinear element, is not exposed to light in this state, normal exposure is performed from above the glass plate 9 using the glass mask 18 and ultraviolet rays 19', and a part of the transparent conductive layer 16 is exposed. and the connecting electrode 6 are partially connected to each other.

そして現像後、第7図に示したようにガラス板
9上に、すなわち、接続電極6および後述の工程
により形成される絵素電極20の上に選択的に感
光性樹脂パターン17′を得る。既に述べたごと
く前記不透明物質の端部と感光性樹脂パターン1
7′との端部は同一線上で揃うので、感光性樹脂
パターン17′をマスクとして透明導電層の食刻
を行ない絵素電極20を得る。なお、この時わず
かぱかりの過食刻を施すと絵素電極20が露出し
ている信号線4′と短絡する現象を避けることが
でき、本発明がより確実なものとなる。
After development, as shown in FIG. 7, a photosensitive resin pattern 17' is selectively formed on the glass plate 9, that is, on the connection electrode 6 and the picture element electrode 20 formed in the process described later. As already mentioned, the edges of the opaque material and the photosensitive resin pattern 1
Since the end portions with 7' are aligned on the same line, the transparent conductive layer is etched using the photosensitive resin pattern 17' as a mask to obtain the picture element electrode 20. Incidentally, if a slight over-etching is performed at this time, it is possible to avoid a short circuit between the picture element electrode 20 and the exposed signal line 4', thereby making the present invention more reliable.

第8図は本発明の他の実施例を示す断面図で、
上述したように不透明材質よりなる非線形素子、
走査線、信号線の形成後全面に透明絶縁層21
(例えばSiO2,Si3N4などの無機材質でもよいし、
透明ポリイミド系樹脂、東レ製SP−910などの有
機材質でもよい)を被着形成し、開口部22を設
けて非線形素子あるいは接続電極6の一部を露出
する。しかる後、上述したようにネガ型感光性樹
脂を用い、ガラス板の両面からの露光で絵素電極
20を自己整合的に形成する。当然のことながら
この場合過食刻は不要である。
FIG. 8 is a sectional view showing another embodiment of the present invention,
As mentioned above, a nonlinear element made of an opaque material,
After forming the scanning lines and signal lines, a transparent insulating layer 21 is applied to the entire surface.
(For example, it may be an inorganic material such as SiO 2 or Si 3 N 4 ,
A transparent polyimide resin or an organic material such as SP-910 manufactured by Toray Industries may be deposited thereon, and an opening 22 is provided to expose a part of the nonlinear element or connection electrode 6. Thereafter, as described above, using a negative photosensitive resin, the picture element electrodes 20 are formed in a self-aligned manner by exposing the glass plate from both sides. Naturally, in this case, overeating is unnecessary.

絵素電極の形成にポジ型レジストを用いること
も可能で、特許請求の範囲第5項、第6項はポジ
型感光性樹脂を用いた場合の実施例である。この
場合には絵素電極の形成は、膜厚1μm以上のポジ
型感光性樹脂のパターニングの終了後に膜厚
0.1μm程度の透明導電層を被着し、ポジ型感光性
樹脂の除去とともにポジ型感光性樹脂上の透明導
電層をも除去してしまう。言わゆるリフトオフを
行なうわけであるが、膜厚差が十分大きいので何
ら支障はない。なお第5項の実施例において絵素
電極と不透明材質とが短絡する現象を避けるため
にはガラス板の裏側からの露光量を少し減少させ
るとよいことは言うまでもない。
It is also possible to use a positive resist to form the picture element electrodes, and claims 5 and 6 are examples in which a positive photosensitive resin is used. In this case, the pixel electrodes are formed after patterning the positive photosensitive resin with a film thickness of 1 μm or more.
A transparent conductive layer of about 0.1 μm is deposited, and when the positive photosensitive resin is removed, the transparent conductive layer on the positive photosensitive resin is also removed. Although so-called lift-off is performed, there is no problem because the difference in film thickness is sufficiently large. In the embodiment described in Section 5, it goes without saying that in order to avoid short-circuiting between the picture element electrode and the opaque material, it is better to slightly reduce the amount of exposure from the back side of the glass plate.

非線形素子と絵素電極との間に介在する接続電
極6は本発明の必須要件ではなく、要は非線形素
子と絵素電極との間の電気抵抗が画像表示装置と
しての動作に支障をきたさなれらばその材質は問
わず、また接続電極を省略して直接絵素電極と非
線形素子が接続されてよいことは明白である。
The connection electrode 6 interposed between the nonlinear element and the picture element electrode is not an essential requirement of the present invention, and the point is that the electrical resistance between the nonlinear element and the picture element electrode does not interfere with the operation of the image display device. It is clear that the material of the frame does not matter, and the picture element electrode and the nonlinear element may be directly connected by omitting the connection electrode.

さらに特許請求の範囲第5項および第6項によ
れば絵素電極を金属材料で形成することも可能で
あり、反射型画像表示装置も容易に得られる。
Furthermore, according to claims 5 and 6, the picture element electrodes can be formed of a metal material, and a reflective image display device can also be easily obtained.

発明の効果 本発明による画像表示装置においては、単位絵
素内において走査線、信号線および非線形素子を
除いた全ての領域を絵素電極とすることが可能
で、有効開口率はほぼ100%となり、明るい画像
が得られることは言うまでもない。この効果は写
真食刻工程の合せ精度が低下する大画面の画像表
示装置において特に顕著となる。
Effects of the Invention In the image display device according to the present invention, it is possible to use all areas within a unit picture element except for scanning lines, signal lines, and nonlinear elements as picture element electrodes, and the effective aperture ratio is approximately 100%. Needless to say, a bright image can be obtained. This effect is particularly noticeable in large-screen image display devices where the alignment accuracy of the photolithography process is reduced.

さらに透過型でノーマリホワイトの画像表示装
置においては、画像がブラツクの状態では画像表
示装置裏側よりの光源光が完全に遮断されるため
にコントラスト比が従来の画像表示装置の10倍程
度工場するという著しい効果が得られる。
Furthermore, in transmissive normally white image display devices, when the image is black, the light source from the back side of the image display device is completely blocked, so the contrast ratio is about 10 times that of conventional image display devices. A remarkable effect can be obtained.

また絵素電極と走査線あるいは信号線との平面
的な重なりはほとんどなく、したがつて駆動にあ
たつて余分な消費電力の増大もなく、また絵素電
極と走査線との間の浮遊容量の増大に伴なうコン
トラスト比の低下が発生する恐れも皆無である。
In addition, there is almost no planar overlap between the pixel electrode and the scanning line or signal line, so there is no increase in power consumption during driving, and there is no stray capacitance between the pixel electrode and the scanning line. There is no fear that the contrast ratio will decrease due to an increase in the contrast ratio.

以上の説明からも明らかなように、走査線と信
号線が光遮断性材質で構成され、また非線形素子
が光遮断性材質からなる層を有していれば、非線
形素子はMISトランジスタに限定されるものでは
なく、ダイオードやバリスタあるいはMIMなど
の素子に対しても本発明は有効であり、また走査
線や信号線も紫外線を透過させにくい多結晶ある
いは非晶質シリコンなどを用いることは可能であ
る。
As is clear from the above explanation, if the scanning line and the signal line are made of a light blocking material and the nonlinear element has a layer made of a light blocking material, the nonlinear element is limited to an MIS transistor. The present invention is also effective for elements such as diodes, varistors, and MIMs, and it is also possible to use polycrystalline or amorphous silicon, which is difficult to transmit ultraviolet rays, for scanning lines and signal lines. be.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は液晶とMISトランジスタとの組み合わ
せによつて構成される画像表示装置の等価回路
図、第2図は同装置の単位絵素の平面図、第3図
は第2図のA−A′線要部断面図、第4図は寄生
容量が発生した場合の画像表示装置の等価回路
図、第5図は本発明によつ画像表示装置の単位絵
素の平面図、第6図〜第8図は同装置のB−
B′線部分の要部断面図である。
Figure 1 is an equivalent circuit diagram of an image display device composed of a combination of liquid crystal and MIS transistors, Figure 2 is a plan view of a unit pixel of the device, and Figure 3 is A-A in Figure 2. 4 is an equivalent circuit diagram of the image display device when parasitic capacitance occurs, FIG. 5 is a plan view of a unit pixel of the image display device according to the present invention, and FIGS. Figure 8 shows B- of the same device.
FIG. 3 is a cross-sectional view of the main part taken along line B'.

Claims (1)

【特許請求の範囲】 1 一主面上に光遮断性材質からなる層を有する
非線形素子と前記非線形素子の一つの電極に接続
された透明導電性の絵素電極とからなる単位絵素
が2次元のマトリクスに配列された第1の透明性
絶縁基板と一主面上に透明導電層が形成された第
2の透明性絶縁基板との間に液晶を充填してなる
画像表示装置において、前記単位絵素を相互接続
する走査線および信号線が光遮断性材質で構成さ
れるとともに、前記絵素電極は第1の透明性絶縁
基板の裏面からの自己整合ホトエツチング工程に
より形成され、前記絵素電極と前記非線形素子の
一つの電極との接続部は第1の透明性絶縁基板の
表面からのホトエツチング工程により形成されて
いることを特徴とする画像表示装置。 2 非線形素子、走査線および信号線の上に透明
性絶縁層が形成されており、前記非線形素子の一
つの電極上の透明性絶縁層に形成された開口部を
含んで透明導電性の絵素電極が形成されているこ
とを特徴とする特許請求の範囲第1項記載の画像
表示装置。 3 第1の透明性絶縁基板の一主面上に光遮断性
材質からなる層を有する走査線、信号線および非
線形素子を形成する工程と、第1の透明性絶縁基
板上に透明導電層を形成する工程と、前記透明導
電層上にネガ型感光性樹脂を塗布する工程と、第
1の透明性絶縁基板の他の主面側から紫外線を照
射し絵素電極となる領域の感光性樹脂を露光する
工程と、第1の透明性絶縁基板の一主面側からフ
オトマスクを用いて紫外線を照射し絵素電極と非
線形素子の一つの電極とを含む領域の感光性樹脂
を露光する工程と、現像後に選択的に残された感
光性樹脂をマスクとして透明導電層をエツチング
する工程と、第1の透明性絶縁基板と全面に透明
導電層が形成された第2の絶縁性基板とを間隙を
設けて貼り合わせた後前記間隙に液晶を注入する
工程とを有する画像表示装置の製造方法。 4 第1の透明性絶縁基板の上に透明導電層を形
成する工程の前に、全面に透明性絶縁層を形成す
る工程と、非線形素子の一つの電極上の透明性絶
縁層に開口を形成する工程が付加されていること
を特徴とする特許請求の範囲第3項記載の画像表
示装置の製造方法。 5 第1の透明性絶縁基板の一主面上に光遮断性
材質からなる層を有する走査線、信号線および非
線形素子を形成する工程と、ポジ型感光性樹脂を
塗布する工程と、第1の透明性絶縁基板の他の主
面側から紫外線を照射し絵素電極となる領域のポ
ジ型感光性樹脂を露光する工程と、第1の透明性
絶縁基板の一主面側からフオトマスクを用いて紫
外線を照射し絵素電極と非線形素子の一つの電極
とを接続する接続部のポジ型感光性樹脂を露光す
る工程と、現像により前記接続部と絵素電極以外
の領域にポジ型感光性樹脂を残す工程と、全面に
透明導電層を形成する工程と、前記ポジ型感光性
樹脂の除去によつて透明導電層を選択的に除去す
る工程と、第1の透明性絶縁基板と全面に透明導
電層が形成された第2の絶縁性基板とを間隙を設
けて貼り合わせた後前記間隙に液晶を注入する工
程とを有する画像表示装置の製造方法。 6 全面に透明導電層を形成する工程の前に、全
面に透明性絶縁層を形成する工程と、非線形素子
の一つの電極上の透明性絶縁層に開口を形成する
工程が付加されていることを特徴とする特許請求
の範囲第5項記載の画像表示装置の製造方法。
[Claims] 1. A unit picture element consisting of a nonlinear element having a layer made of a light blocking material on one principal surface and a transparent conductive picture element electrode connected to one electrode of the nonlinear element. In the image display device, a liquid crystal is filled between a first transparent insulating substrate arranged in a dimensional matrix and a second transparent insulating substrate having a transparent conductive layer formed on one main surface. The scanning lines and signal lines interconnecting the unit picture elements are made of a light-blocking material, and the picture element electrodes are formed by a self-aligned photoetching process from the back side of the first transparent insulating substrate, An image display device characterized in that a connection portion between an electrode and one electrode of the nonlinear element is formed by a photoetching process from the surface of the first transparent insulating substrate. 2. A transparent insulating layer is formed on the nonlinear element, the scanning line, and the signal line, and the transparent conductive picture element includes an opening formed in the transparent insulating layer on one electrode of the nonlinear element. The image display device according to claim 1, further comprising an electrode. 3. Forming a scanning line, a signal line, and a nonlinear element having a layer made of a light blocking material on one main surface of the first transparent insulating substrate, and forming a transparent conductive layer on the first transparent insulating substrate. forming a negative photosensitive resin on the transparent conductive layer, and applying ultraviolet rays from the other main surface side of the first transparent insulating substrate to form a photosensitive resin in an area that will become a pixel electrode. and a step of exposing the photosensitive resin in a region including the picture element electrode and one electrode of the nonlinear element by irradiating ultraviolet rays from one main surface side of the first transparent insulating substrate using a photomask. , etching the transparent conductive layer using the photosensitive resin selectively left after development as a mask, and etching the first transparent insulating substrate and the second insulating substrate on which the transparent conductive layer is formed on the entire surface with a gap between them. A method for manufacturing an image display device, comprising the steps of: providing and bonding, and then injecting liquid crystal into the gap. 4. Before the step of forming a transparent conductive layer on the first transparent insulating substrate, a step of forming a transparent insulating layer on the entire surface and forming an opening in the transparent insulating layer on one electrode of the nonlinear element. 4. The method of manufacturing an image display device according to claim 3, further comprising the step of: 5. A step of forming a scanning line, a signal line, and a nonlinear element having a layer made of a light blocking material on one main surface of the first transparent insulating substrate, a step of applying a positive photosensitive resin, and a step of applying a positive photosensitive resin. A step of irradiating ultraviolet rays from the other main surface side of the first transparent insulating substrate to expose the positive photosensitive resin in the area that will become the picture element electrode, and using a photomask from the first main surface side of the first transparent insulating substrate. A step of exposing the positive photosensitive resin at the connection part connecting the picture element electrode and one electrode of the nonlinear element by irradiating ultraviolet rays, and developing it to form a positive photosensitive resin in the area other than the connection part and the picture element electrode. a step of leaving a resin; a step of forming a transparent conductive layer on the entire surface; a step of selectively removing the transparent conductive layer by removing the positive photosensitive resin; A method for manufacturing an image display device, comprising the steps of bonding a second insulating substrate on which a transparent conductive layer is formed with a gap therebetween, and then injecting liquid crystal into the gap. 6. Before the step of forming a transparent conductive layer on the entire surface, a step of forming a transparent insulating layer on the entire surface and a step of forming an opening in the transparent insulating layer on one electrode of the nonlinear element are added. A method for manufacturing an image display device according to claim 5, characterized in that:
JP58219813A 1983-11-22 1983-11-22 Image display unit and manufacture thereof Granted JPS60112089A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58219813A JPS60112089A (en) 1983-11-22 1983-11-22 Image display unit and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58219813A JPS60112089A (en) 1983-11-22 1983-11-22 Image display unit and manufacture thereof

Publications (2)

Publication Number Publication Date
JPS60112089A JPS60112089A (en) 1985-06-18
JPH0535433B2 true JPH0535433B2 (en) 1993-05-26

Family

ID=16741429

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58219813A Granted JPS60112089A (en) 1983-11-22 1983-11-22 Image display unit and manufacture thereof

Country Status (1)

Country Link
JP (1) JPS60112089A (en)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2549840B2 (en) * 1986-03-25 1996-10-30 セイコーエプソン株式会社 LCD panel
DE3712335A1 (en) * 1987-04-11 1988-10-20 Vdo Schindling METHOD FOR PRODUCING A STRUCTURE
JP2620240B2 (en) 1987-06-10 1997-06-11 株式会社日立製作所 Liquid crystal display
JPS63313132A (en) * 1987-06-16 1988-12-21 Matsushita Electric Ind Co Ltd Reflection type liquid crystal display device
JP2604386B2 (en) * 1987-09-09 1997-04-30 カシオ計算機株式会社 Thin film transistor panel
JP2594971B2 (en) * 1987-09-09 1997-03-26 カシオ計算機株式会社 Thin film transistor panel
JP2592463B2 (en) * 1987-09-17 1997-03-19 カシオ計算機株式会社 Thin film transistor panel
JPH01214823A (en) * 1988-02-23 1989-08-29 Nippon Telegr & Teleph Corp <Ntt> Active matrix substrate and its manufacture
JP2590360B2 (en) * 1988-03-31 1997-03-12 カシオ計算機株式会社 Method of manufacturing thin film transistor panel
JP2804063B2 (en) * 1989-02-15 1998-09-24 株式会社日立製作所 Thin film transistor, active matrix circuit substrate using the transistor, and image display device
JPH03211526A (en) * 1990-01-17 1991-09-17 Matsushita Electric Ind Co Ltd Active matrix substrate and liquid crystal display device
JP2791435B2 (en) * 1996-12-24 1998-08-27 株式会社日立製作所 Liquid crystal display device
KR20000076864A (en) 1999-03-16 2000-12-26 마츠시타 덴끼 산교 가부시키가이샤 Method for manufacturing an active element array substrate

Citations (1)

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Publication number Priority date Publication date Assignee Title
JPS599635A (en) * 1982-07-07 1984-01-19 Seiko Epson Corp Electrooptic device

Patent Citations (1)

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Publication number Priority date Publication date Assignee Title
JPS599635A (en) * 1982-07-07 1984-01-19 Seiko Epson Corp Electrooptic device

Also Published As

Publication number Publication date
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