JPH05335620A - Semiconductor light-emitting device and its manufacture - Google Patents

Semiconductor light-emitting device and its manufacture

Info

Publication number
JPH05335620A
JPH05335620A JP16377392A JP16377392A JPH05335620A JP H05335620 A JPH05335620 A JP H05335620A JP 16377392 A JP16377392 A JP 16377392A JP 16377392 A JP16377392 A JP 16377392A JP H05335620 A JPH05335620 A JP H05335620A
Authority
JP
Japan
Prior art keywords
compound semiconductor
light emitting
junction
light
emitting device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16377392A
Other languages
Japanese (ja)
Inventor
Masashi Yoshimura
雅司 吉村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Victor Company of Japan Ltd
Original Assignee
Victor Company of Japan Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Victor Company of Japan Ltd filed Critical Victor Company of Japan Ltd
Priority to JP16377392A priority Critical patent/JPH05335620A/en
Publication of JPH05335620A publication Critical patent/JPH05335620A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To reduce the fluctuation of light emitting outputs from each light emitting section. CONSTITUTION:An epitaxial layer 12 is provided on an n-type compound semiconductor substrate 11 and, in the layer 12, the central p-n junction surface of each light emitting section is projected in the direction opposite to the light- emitting surface and a p-type diffusion area 13 which is nearly parallel to the surface of the substrate 11 is provided at the p-n junction surface around the central p-n junction surface, with each area 13 being separated from another by means of a groove 14. The surface of the layer 12 is coated with a surface protective film 15 and the film 15 gets into the grooves 14. In addition, p-type electrodes 16 are vapor deposited on the light emitting surfaces of the areas 13 and an n-type electrode 17 is vapor-deposited on the rear surface of the substrate 11.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、モノリシック発光ダイ
オードアレイなどの半導体発光装置とその製造方法に関
するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor light emitting device such as a monolithic light emitting diode array and a method for manufacturing the same.

【0002】[0002]

【従来の技術】従来より、発光ダイオードアレイは、デ
ィスプレイ装置に用いられたり、光源としてLEDプリ
ンタ装置に使用されるなど各種装置に使用されている。
そして、単結晶基板上にエピタキシャル成長させた各層
からなる化合物半導体の表面に複数の発光部分(発光ダ
イオード部)を列状に形成したモノリシック発光ダイオ
ードアレイでは、それぞれの発光部分が、選択拡散法や
メサ型エッチング法などによって各々分離されている。
そして、例えば、GaAs基板上にGaAsP層をエピ
タキシャル成長させた化合物半導体の発光部分の分離を
選択拡散法によって行う場合は、エピタキシャル成長さ
れたGaAsP層の各発光部分の境界部分にZn(亜
鉛)を拡散するものであり、プレーナ型素子を製造する
のに好適な方法として多く採られている。
2. Description of the Related Art Conventionally, a light emitting diode array has been used in various devices such as a display device and an LED printer device as a light source.
Then, in a monolithic light-emitting diode array in which a plurality of light-emitting portions (light-emitting diode portions) are formed in rows on the surface of a compound semiconductor made of each layer epitaxially grown on a single crystal substrate, each light-emitting portion has a selective diffusion method or mesa. They are separated by a mold etching method or the like.
Then, for example, when the light emitting portion of the compound semiconductor in which the GaAsP layer is epitaxially grown on the GaAs substrate is separated by the selective diffusion method, Zn (zinc) is diffused to the boundary portion of each light emitting portion of the epitaxially grown GaAsP layer. However, it is often adopted as a suitable method for manufacturing a planar element.

【0003】この選択拡散法を用いた発光ダイオードア
レイの製造方法を図5(A)〜(C)に示す工程図を用
いて説明する。まず、同図(A)に示すように、n型G
aAs基板1上にn型GaAsP層2を気相成長法など
によりエピタキシャル成長させる。そして、このGaA
sP層2上に、発光部分となる各位置に窓部3aを設け
たSiN等の選択拡散マスク3を設け、後工程において
数百度以上の高温下で行われる拡散時に、GaAsP層
2からAsやPが蒸発して基板表面が荒れるのを防止す
るために、この選択拡散マスク3上にSiO2 等のスル
ー拡散膜4を設ける。その後、例えば封管法と呼ばれる
拡散方法によりZnを拡散すると、Znはスルー拡散膜
4を透過して、選択拡散マスク3の窓部3a下のGaA
sP層2内にp型拡散領域5を形成する。最後に、同図
(B)に示すように、スルー拡散膜4を除去した後、そ
れぞれのp型拡散領域5上にp型電極6を設け、n型G
aAs基板1の裏面にn型電極7を蒸着することによ
り、発光ダイオードアレイを製造することができる。
A method of manufacturing a light emitting diode array using this selective diffusion method will be described with reference to the process charts shown in FIGS. First, as shown in FIG.
An n-type GaAsP layer 2 is epitaxially grown on the aAs substrate 1 by a vapor phase growth method or the like. And this GaA
On the sP layer 2, a selective diffusion mask 3 made of SiN or the like having windows 3a provided at respective positions serving as a light emitting portion is provided, and when the diffusion process is performed at a high temperature of several hundreds of degrees or more in a subsequent process, the GaAsP layer 2 is changed to As or As. In order to prevent the evaporation of P and the roughening of the substrate surface, a through diffusion film 4 such as SiO 2 is provided on the selective diffusion mask 3. After that, when Zn is diffused by a diffusion method called, for example, a sealed tube method, the Zn penetrates through the through diffusion film 4 and GaA under the window 3a of the selective diffusion mask 3 is exposed.
A p-type diffusion region 5 is formed in the sP layer 2. Finally, as shown in FIG. 6B, after removing the through diffusion film 4, p-type electrodes 6 are provided on the respective p-type diffusion regions 5, and n-type G
A light emitting diode array can be manufactured by depositing the n-type electrode 7 on the back surface of the aAs substrate 1.

【0004】[0004]

【発明が解決しようとする課題】上記した従来の選択拡
散方法により、図5(B)のような拡散領域5を持つ発
光ダイオードアレイが製造できれば理想的だが、実際に
は、選択拡散マスク3とGaAsP層2表面との整合性
が悪いため、その界面8にZnが素早く拡散し、図3
(C)のように繋がったp型拡散領域9となりやすい。
そして、この様な形状のp型拡散領域9では、各発光部
分が電気的に接続されてしまうので、個別に発光させる
ことができないという不都合が生じていた。そこで、Z
n拡散後、p型拡散領域9の接続部分10を分離するこ
とが行われているが、この接続部分10をエッチング除
去しても、Znの界面8への拡散量が場所によって異な
っているので、エッチング後のp型拡散領域9の形状が
揃わず、各発光部分間で発光光量のばらつきが生じる結
果となっていた。
Ideally, it would be ideal if a light emitting diode array having a diffusion region 5 as shown in FIG. 5B could be manufactured by the above-mentioned conventional selective diffusion method. Since the compatibility with the surface of the GaAsP layer 2 is poor, Zn diffuses quickly into the interface 8, and
The connected p-type diffusion region 9 is likely to be formed as in (C).
Further, in the p-type diffusion region 9 having such a shape, since the respective light emitting portions are electrically connected, there is a disadvantage that individual light emission cannot be performed. So Z
After the n-diffusion, the connection portion 10 of the p-type diffusion region 9 is separated, but even if the connection portion 10 is removed by etching, the diffusion amount of Zn to the interface 8 is different depending on the location. However, the shapes of the p-type diffusion regions 9 after etching are not uniform, and the amount of emitted light varies among the light emitting portions.

【0005】また、特開昭59−195886号公報に
は、接続部分10にS(イオウ)やTe(テルル)など
のn型不純物10aを拡散させて、分離させる方法が開
示されているが、製造工程が複雑になるばかりでなく、
n型不純物10aを拡散させる時の温度は、Znの拡散
温度と比較して200〜300℃程度高いので、先に拡
散したZnがさらに拡散し、p型拡散領域9の不純物濃
度分布(プロファイル)制御が困難となる。さらに、Z
nの拡散温度よりも高温にするため、スルー拡散膜4を
使用しても基板の表面荒れを防止することができなかっ
た。そこで本発明は、上記した課題を解決し、各発光部
分における発光出力のばらつきが少ない半導体発光装置
及びその製造方法を提供することを目的とする。
Further, Japanese Patent Laid-Open No. 195886/1984 discloses a method of diffusing and separating n-type impurities 10a such as S (sulfur) and Te (tellurium) in the connection portion 10. Not only is the manufacturing process complicated,
Since the temperature at which the n-type impurity 10a is diffused is higher than the diffusion temperature of Zn by about 200 to 300 ° C., the Zn diffused earlier is further diffused, and the impurity concentration distribution (profile) of the p-type diffusion region 9 is obtained. It becomes difficult to control. Furthermore, Z
Since the temperature is higher than the diffusion temperature of n, the surface roughness of the substrate could not be prevented even if the through diffusion film 4 was used. Therefore, it is an object of the present invention to solve the above problems and provide a semiconductor light emitting device in which variations in light emission output in each light emitting portion are small, and a manufacturing method thereof.

【0006】[0006]

【課題を解決するための手段】上記目的を達成するため
の手段として、pn接合を有する化合物半導体に列状に
形成された複数の発光部分を有する半導体発光装置にお
いて、前記各発光部分の中央部の前記pn接合面は光り
取出し面と逆方向の凸型形状の面であり、この凸型形状
の周辺部分の前記pn接合面は基板表面とほぼ平行の面
であり、前記各発光部分は前記周辺部分の前記pn接合
面よりも深い溝によって分離されていることを特徴とす
る半導体発光装置、及び、pn接合を有する化合物半導
体の表面に複数の発光部分を列状に形成する半導体発光
装置の製造方法であって、第1の化合物半導体基板上に
第2の化合物半導体の層を結晶成長させる工程と、この
第2の化合物半導体の層を選択エッチングして前記複数
の発光部分となる位置に窓部を形成する工程と、前記第
1の化合物半導体基板と異なる導電性を有する不純物を
前記第2の化合物半導体の層の厚さよりも浅く拡散し
て、pn接合面が前記第2の化合物半導体の層から前記
第1の化合物半導体基板にかけてまたがるようにして拡
散領域を形成する工程と、前記第2の化合物半導体の層
を除去することにより、前記拡散領域を分離する工程と
を含むことを特徴とする半導体発光装置の製造方法、ま
たは、pn接合を有する化合物半導体の表面に複数の発
光部分を列状に形成する半導体発光装置の製造方法であ
って、pn接合を有する化合物半導体の表面に複数の発
光部分を列状に形成する半導体発光装置の製造方法であ
って、第1の化合物半導体基板上に第2の化合物半導体
の層を結晶成長させる工程と、この第2の化合物半導体
の層を選択エッチングして前記複数の発光部分となる位
置に窓部を形成する工程と、前記第1の化合物半導体基
板と異なる導電性を有する不純物を全てのpn接合面が
前記第1の化合物半導体基板に達するように前記第2の
化合物半導体の層の厚さよりも深く拡散して、前記窓部
の下の前記pn接合面が前記第1の化合物半導体基板表
面と逆方向に凸型形状をした拡散領域を形成する工程
と、前記第2の化合物半導体の層を除去する工程と、前
記拡散領域のそれぞれの前記凸型形状部分の間をエッチ
ングして、前記pn接合面よりも深い溝を形成すること
により、前記拡散領域を分離する工程とを含むことを特
徴とする半導体発光装置の製造方法を提供しようとする
ものである。
As means for achieving the above object, in a semiconductor light emitting device having a plurality of light emitting portions formed in a row in a compound semiconductor having a pn junction, a central portion of each light emitting portion is provided. Is a convex surface in the direction opposite to the light extraction surface, the pn junction surface in the peripheral portion of the convex shape is substantially parallel to the substrate surface, and each light emitting portion is A semiconductor light emitting device characterized by being separated by a groove deeper than the pn junction surface of a peripheral portion, and a semiconductor light emitting device having a plurality of light emitting portions formed in rows on a surface of a compound semiconductor having a pn junction. A method of manufacturing, comprising a step of crystal-growing a second compound semiconductor layer on a first compound semiconductor substrate, and selectively etching the second compound semiconductor layer to form the plurality of light emitting portions. A window portion is formed on the first compound semiconductor substrate, and an impurity having a conductivity different from that of the first compound semiconductor substrate is diffused so as to be shallower than the thickness of the layer of the second compound semiconductor so that the pn junction surface has the second layer. A step of forming a diffusion region so as to extend from a compound semiconductor layer to the first compound semiconductor substrate, and a step of separating the diffusion region by removing the second compound semiconductor layer. A method for manufacturing a semiconductor light emitting device, or a method for manufacturing a semiconductor light emitting device in which a plurality of light emitting portions are formed in rows on a surface of a compound semiconductor having a pn junction, the surface of the compound semiconductor having a pn junction 1. A method of manufacturing a semiconductor light emitting device, comprising: forming a plurality of light emitting portions in a row on a substrate, comprising a step of crystal-growing a second compound semiconductor layer on a first compound semiconductor substrate; Selectively etching the compound semiconductor layer to form windows at positions that will become the plurality of light emitting portions, and impurities having a conductivity different from that of the first compound semiconductor substrate to all the pn junction surfaces. The first compound semiconductor substrate is diffused deeper than the thickness of the second compound semiconductor layer so that the pn junction surface under the window is convex in the direction opposite to the first compound semiconductor substrate surface. A step of forming a diffusion region having a mold shape, a step of removing the layer of the second compound semiconductor, and an etching between the convex-shaped portions of each of the diffusion regions are performed so as to be closer to the pn junction surface. And a step of separating the diffusion region by forming a deep groove, to provide a method for manufacturing a semiconductor light emitting device.

【0007】[0007]

【実施例】本発明の半導体発光装置の第1の実施例とし
て発光ダイオードアレイを図1に示し以下に説明する。
同図に示す発光ダイオードアレイは、n型の化合物半導
体基板11上にエピタキシャル層12が設けられ、この
エピタキシャル層12内に図のようなp型拡散領域13
が各々設けられており、エピタキシャル層12の表面は
表面保護膜15によって覆われている。そして、p型拡
散領域13の光を取り出す面には、p型電極16が蒸着
され、n型の化合物半導体基板11の裏面には、n型電
極17が蒸着されている。この発光ダイオードアレイの
各々のp型拡散領域13は、完全に分離されており、そ
の形状も一定形状となっている。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS As a first embodiment of the semiconductor light emitting device of the present invention, a light emitting diode array is shown in FIG. 1 and will be described below.
In the light emitting diode array shown in the figure, an epitaxial layer 12 is provided on an n-type compound semiconductor substrate 11, and a p-type diffusion region 13 as shown in the figure is provided in the epitaxial layer 12.
Are provided, and the surface of the epitaxial layer 12 is covered with a surface protective film 15. A p-type electrode 16 is vapor-deposited on the light-extracting surface of the p-type diffusion region 13, and an n-type electrode 17 is vapor-deposited on the back surface of the n-type compound semiconductor substrate 11. Each p-type diffusion region 13 of this light emitting diode array is completely separated, and its shape is also constant.

【0008】この様な発光ダイオードアレイの製造方法
を図3(A)〜(F)と共に説明する。まず、同図
(A)に示すように、GaAs等のn型の化合物半導体
基板11上にMOCVD法(有機金属気相成長法)によ
り、GaAsP等の化合物半導体からなるエピタキシャ
ル層12を成長させ、このエピタキシャル層12上にM
OCVD法によりAlGaAs等のエピタキシャル層1
2とは異なる化合物半導体からなる結晶成長層(第2の
化合物半導体の層)18を形成し、さらにその上にプラ
ズマCVD法により、SiNの保護膜19を形成する。
そして、この保護膜19の発光部分の形成されるところ
にリソグラフィー工程とCF4 によるドライエッチング
を用いて同図(B),(C)に示すような窓部19aを
開け、この窓部19aの下の部分の結晶成長層18を塩
酸を使用した選択エッチングによって除去する。なお、
同図(D)では、結晶成長層18のエッチング面が逆メ
サ型となっているが、順メサ型にエッチングしても効果
は変わらない。
A method of manufacturing such a light emitting diode array will be described with reference to FIGS. First, as shown in FIG. 1A, an epitaxial layer 12 made of a compound semiconductor such as GaAsP is grown on an n-type compound semiconductor substrate 11 such as GaAs by MOCVD (metal organic chemical vapor deposition). M on this epitaxial layer 12
Epitaxial layer 1 such as AlGaAs by OCVD method
A crystal growth layer (second compound semiconductor layer) 18 made of a compound semiconductor different from 2 is formed, and a SiN protective film 19 is further formed thereon by a plasma CVD method.
Then, a window portion 19a as shown in FIGS. 9B and 9C is opened by using a lithography process and dry etching with CF 4 at the place where the light emitting portion of the protective film 19 is formed. The crystal growth layer 18 in the lower portion is removed by selective etching using hydrochloric acid. In addition,
In FIG. 3D, the etching surface of the crystal growth layer 18 is an inverted mesa type, but the effect does not change even if it is etched into a normal mesa type.

【0009】その後、残った保護膜19をCF4 による
ドライエッチングによって除去してから、塗布法により
SiO2 のスルー拡散膜20を同図(D)のように基板
全面に塗布する。そして、封管法により、700℃の温
度下でZn等のp型不純物を結晶成長層18の途中まで
拡散すると、Znの拡散は表面全体で行われるので、同
図(E)に示すように結晶成長層18がエッチングされ
てエピタキシャル層12の表面が露出したところだけエ
ピタキシャル層12内にp型拡散領域13ができ、この
ときp型拡散領域13とn型化合物半導体との境界面で
あるpn接合面13aは結晶成長層18からエピタキシ
ャル層12にかけてまたがったものとなる。このとき、
エピタキシャル層12と結晶成長層18とは共に化合物
半導体であるので、界面での整合性が良く、この界面に
p型不純物が拡散してp型拡散領域13が不規則な形状
となったり、pn接合面13aがエピタキシャル層12
内だけでつながったりすることはない。
After that, the remaining protective film 19 is removed by dry etching with CF 4, and then a through diffusion film 20 of SiO 2 is applied to the entire surface of the substrate by a coating method as shown in FIG. Then, when a p-type impurity such as Zn is diffused into the crystal growth layer 18 at a temperature of 700 ° C. by the sealed tube method, Zn is diffused over the entire surface. Therefore, as shown in FIG. The p-type diffusion region 13 is formed in the epitaxial layer 12 only when the surface of the epitaxial layer 12 is exposed by etching the crystal growth layer 18. At this time, pn which is a boundary surface between the p-type diffusion region 13 and the n-type compound semiconductor is formed. The bonding surface 13a extends from the crystal growth layer 18 to the epitaxial layer 12. At this time,
Since the epitaxial layer 12 and the crystal growth layer 18 are both compound semiconductors, they have good matching at the interface, and the p-type impurities are diffused into this interface to cause the p-type diffusion region 13 to have an irregular shape. The bonding surface 13a is the epitaxial layer 12
There is no connection within itself.

【0010】さらに、結晶成長層18及びスルー拡散膜
20をエッチングして除去すると、同図(F)のよう
に、各拡散領域13は綺麗に分離される。そして、Si
Nの表面保護膜15を取り付けた後、Alを蒸着してp
型電極16を形成し、n型の化合物半導体基板11の裏
面を研磨して薄くした後、AuGeNi合金のn型電極
17を蒸着すると、図1に示した発光ダイオードアレイ
が得られる。このようにして製造された半導体発光装置
は、各発光部分の拡散領域が完全に分離しており、ま
た、その形状も一定であるので、各発光部分間での電流
−光出力特性がほとんどばらつかない。
Further, when the crystal growth layer 18 and the through diffusion film 20 are removed by etching, the respective diffusion regions 13 are finely separated as shown in FIG. And Si
After attaching the N surface protective film 15, Al is vapor-deposited to p
After forming the mold electrode 16 and polishing and thinning the back surface of the n-type compound semiconductor substrate 11, the n-type electrode 17 of AuGeNi alloy is vapor-deposited to obtain the light emitting diode array shown in FIG. In the semiconductor light emitting device manufactured in this manner, the diffusion regions of the respective light emitting portions are completely separated and the shape thereof is also constant, so that the current-light output characteristics between the respective light emitting portions are almost different. Not stick.

【0011】本発明の半導体発光装置の第2の実施例と
して第1の実施例とは異なる構成の発光ダイオードアレ
イを図2に示し以下に説明する。同図に示す発光ダイオ
ードアレイは、n型の化合物半導体基板11上にエピタ
キシャル層12が設けられ、このエピタキシャル層12
内には、図のように各発光部分の中央部のpn接合面が
光り取出し面と逆方向に凸型形状で、その周辺部分のp
n接合面は基板表面とほぼ平行の面であるp型拡散領域
13が各々設けられており、各p型拡散領域13は平行
のpn接合面よりも深い溝14によって分離されてい
る。そして、エピタキシャル層12の表面は表面保護膜
15によって覆われており、この表面保護膜15は溝1
4にも入り込んでいる。また、p型拡散領域13の光を
取り出す面には、p型電極16が蒸着され、n型の化合
物半導体基板11の裏面には、n型電極17が蒸着され
ている。
As a second embodiment of the semiconductor light emitting device of the present invention, a light emitting diode array having a structure different from that of the first embodiment is shown in FIG. 2 and described below. The light emitting diode array shown in the figure has an epitaxial layer 12 provided on an n-type compound semiconductor substrate 11.
As shown in the figure, the pn junction surface at the center of each light emitting portion has a convex shape in the direction opposite to the light extraction surface, and the p
The n-junction surface is provided with p-type diffusion regions 13 that are substantially parallel to the substrate surface, and each p-type diffusion region 13 is separated by a groove 14 deeper than the parallel pn-junction surface. The surface of the epitaxial layer 12 is covered with the surface protective film 15, and the surface protective film 15 is formed in the groove 1.
It is also getting into 4. A p-type electrode 16 is vapor-deposited on the light-extracting surface of the p-type diffusion region 13, and an n-type electrode 17 is vapor-deposited on the back surface of the n-type compound semiconductor substrate 11.

【0012】この様な発光ダイオードアレイの製造方法
を図3(A)〜(D)及び図4(A),(B)と共に説
明する。まず、図3(D)に示すSiO2 のスルー拡散
膜20を基板全面に塗布する工程まで、上記した第1の
実施例と同様の方法を行う。次に、封管法により、70
0℃の温度下でZn等のp型不純物を結晶成長層18の
厚さよりも深くまで拡散すると、Znの拡散は表面全体
で行われるので、同図(E)に示すように結晶成長層1
8がエッチングされてエピタキシャル層12の表面が露
出したところは深く拡散して凸型形状になり、結晶成長
層18のあるところでは、エピタキシャル層12内の浅
いところまで拡散してエピタキシャル層12表面とほぼ
平行に拡散して、図4(A)に示すようなエピタキシャ
ル層12表面と逆方向に凸型形状をしたp型拡散領域1
3を形成する。このときp型拡散領域13とn型化合物
半導体との境界面であるpn接合面13aは全てエピタ
キシャル層12内に存在する。なお、このときも、エピ
タキシャル層12と結晶成長層18とは共に化合物半導
体であるので、界面での整合性が良く、この界面にp型
不純物が拡散してp型拡散領域13が不規則な形状とな
ることはない。
A method of manufacturing such a light emitting diode array will be described with reference to FIGS. 3A to 3D and FIGS. 4A and 4B. First, the same method as in the first embodiment described above is performed until the step of coating the through diffusion film 20 of SiO2 shown in FIG. Next, by the sealed tube method, 70
When a p-type impurity such as Zn is diffused to a depth deeper than the thickness of the crystal growth layer 18 at a temperature of 0 ° C., Zn is diffused over the entire surface, so that as shown in FIG.
8 is etched to expose the surface of the epitaxial layer 12 so that it is deeply diffused into a convex shape, and where the crystal growth layer 18 is present, it is diffused to a shallow position in the epitaxial layer 12 to form a surface with the epitaxial layer 12. The p-type diffusion region 1 diffuses substantially in parallel and has a convex shape in the direction opposite to the surface of the epitaxial layer 12 as shown in FIG.
3 is formed. At this time, the pn junction surface 13 a, which is the boundary surface between the p-type diffusion region 13 and the n-type compound semiconductor, is entirely present in the epitaxial layer 12. Also at this time, since the epitaxial layer 12 and the crystal growth layer 18 are both compound semiconductors, the matching at the interface is good, and the p-type impurity diffuses into this interface to make the p-type diffusion region 13 irregular. It never takes shape.

【0013】さらに、結晶成長層18及びスルー拡散膜
20をエッチングして除去してから、再びプラズマCV
D法によりSiNを付けて、発光部分の間となるとこ
ろ、即ち、p型不純物が浅く拡散されたところに各発光
部分を分離するような窓をこのSiNに形成し、このS
iNをエッチングマスクとして、この部分の拡散領域1
3よりも深い位置までリン酸過水によるウエットエッチ
ングを行って、図4(B)に示すような溝14を形成し
て各発光部分を分離した後SiNを除去する。その後、
SiNの表面保護膜15を取り付けた後、Alを蒸着し
てp型電極16を形成し、n型の化合物半導体基板11
の裏面を研磨して薄くした後、AuGeNi合金のn型
電極17を蒸着すると、図1に示した発光ダイオードア
レイが得られる。
Further, after removing the crystal growth layer 18 and the through diffusion film 20 by etching, the plasma CV is again used.
By adding SiN by the D method, a window for separating each light emitting portion is formed in this SiN at a position between the light emitting portions, that is, a portion where the p-type impurity is shallowly diffused, and this SN is formed.
Using iN as an etching mask, the diffusion region 1 in this portion
Wet etching with phosphoric acid / hydrogen peroxide is performed to a position deeper than 3 to form a groove 14 as shown in FIG. 4 (B) to separate each light emitting portion and then remove SiN. afterwards,
After attaching the surface protective film 15 of SiN, Al is vapor-deposited to form the p-type electrode 16, and the n-type compound semiconductor substrate 11 is formed.
After polishing and thinning the back surface of n, the n-type electrode 17 of AuGeNi alloy is vapor-deposited to obtain the light emitting diode array shown in FIG.

【0014】このようにして製造された半導体発光装置
は、各発光部分の拡散領域が溝14によって完全に分離
されており、また、その形状も一定であるので、各発光
部分間での電流−光出力特性がほとんどばらつかない。
そして、拡散領域を大きくしても、確実に分離すること
ができる。また、上記した各実施例とも各発光部分の拡
散領域を完全に分離することができるので、発光部分を
小さくしてもそれぞれの発光部分を独立して発光させる
ことができ、2000dpi以上の発光ドットを良好に
製造することができる。
In the semiconductor light emitting device manufactured as described above, the diffusion regions of the respective light emitting portions are completely separated by the groove 14, and the shape thereof is also constant, so that the current flowing between the respective light emitting portions is − Almost no variation in light output characteristics.
Then, even if the diffusion region is enlarged, the separation can be surely performed. Further, in each of the above-described embodiments, the diffusion region of each light emitting portion can be completely separated, so that each light emitting portion can independently emit light even if the light emitting portion is made small, and a light emitting dot of 2000 dpi or more is emitted. Can be manufactured satisfactorily.

【0015】[0015]

【発明の効果】本発明の半導体発光装置は、各発光部分
の拡散領域が溝によって分離され、それぞれの拡散領域
も一定形状をしているので、各発光部分での電流−光出
力特性のばらつきが少なく、良好な出力が得られる。ま
た、本発明の半導体発光装置の製造方法は、化合物半導
体をマスクとして不純物拡散を行っているので、一定形
状の拡散領域を得ることができ、発光部分を小さくして
も、良好かつ安定に分離することができ、各発光部分で
の電流−光出力特性のばらつきをほとんどなくすことが
できる。さらに、溝によって拡散領域を分離した場合に
は、より確実に拡散領域を分離することができるという
効果がある。
According to the semiconductor light emitting device of the present invention, the diffusion regions of the respective light emitting portions are separated by the grooves, and the respective diffusion regions also have a constant shape. Therefore, the variation of the current-light output characteristics in the respective light emitting portions. And good output can be obtained. Further, in the method for manufacturing the semiconductor light emitting device of the present invention, since the impurity diffusion is performed using the compound semiconductor as a mask, a diffusion region having a constant shape can be obtained, and even if the light emitting portion is made small, good and stable separation can be achieved. Therefore, it is possible to almost eliminate the variation in the current-light output characteristics in each light emitting portion. Furthermore, when the diffusion regions are separated by the grooves, there is an effect that the diffusion regions can be separated more reliably.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の半導体発光装置の第1の実施例を示す
断面図である。
FIG. 1 is a cross-sectional view showing a first embodiment of a semiconductor light emitting device of the present invention.

【図2】本発明の半導体発光装置の第2の実施例を示す
断面図である。
FIG. 2 is a sectional view showing a second embodiment of the semiconductor light emitting device of the present invention.

【図3】(A)〜(F)は本発明の第1の実施例の製造
方法を示す工程図である。
3A to 3F are process diagrams showing a manufacturing method according to the first embodiment of the present invention.

【図4】(A),(B)は本発明の第2の実施例の製造
方法を示す工程図である。
4A and 4B are process diagrams showing a manufacturing method according to a second embodiment of the present invention.

【図5】(A)〜(C)は従来例の製造方法を示す工程
図である。
5A to 5C are process diagrams showing a conventional manufacturing method.

【符号の説明】[Explanation of symbols]

1 n型GaAs基板 2 GaAsP層 3 選択拡散マスク 3a 窓部 4,20 スルー拡散膜 5,9,13 p型拡散領域 6,16 p型電極 7,17 n型電極 8 界面 10 接続部分 10a n型不純物 11 n型の化合物半導体基板 12 エピタキシャル層 14 溝 15 表面保護膜 18 結晶成長層(第2の化合物半導体の層) 19 保護膜 1 n-type GaAs substrate 2 GaAsP layer 3 selective diffusion mask 3a window part 4,20 through diffusion film 5,9,13 p-type diffusion region 6,16 p-type electrode 7,17 n-type electrode 8 interface 10 connection part 10a n-type Impurity 11 n-type compound semiconductor substrate 12 epitaxial layer 14 groove 15 surface protective film 18 crystal growth layer (second compound semiconductor layer) 19 protective film

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】pn接合を有する化合物半導体に列状に形
成された複数の発光部分を有する半導体発光装置におい
て、 前記各発光部分の中央部の前記pn接合面は光り取出し
面と逆方向の凸型形状の面であり、この凸型形状の周辺
部分の前記pn接合面は基板表面とほぼ平行の面であ
り、前記各発光部分は前記周辺部分の前記pn接合面よ
りも深い溝によって分離されていることを特徴とする半
導体発光装置。
1. A semiconductor light emitting device having a plurality of light emitting portions formed in a row in a compound semiconductor having a pn junction, wherein the pn junction surface at the center of each light emitting portion is convex in the direction opposite to the light extraction surface. This is a mold-shaped surface, the pn junction surface of the peripheral portion of the convex shape is a surface substantially parallel to the substrate surface, and each light emitting portion is separated by a groove deeper than the pn junction surface of the peripheral portion. A semiconductor light-emitting device characterized in that.
【請求項2】pn接合を有する化合物半導体の表面に複
数の発光部分を列状に形成する半導体発光装置の製造方
法であって、 第1の化合物半導体基板上に第2の化合物半導体の層を
結晶成長させる工程と、 この第2の化合物半導体の層を選択エッチングして前記
複数の発光部分となる位置に窓部を形成する工程と、 前記第1の化合物半導体基板と異なる導電性を有する不
純物を前記第2の化合物半導体の層の厚さよりも浅く拡
散して、pn接合面が前記第2の化合物半導体の層から
前記第1の化合物半導体基板にかけてまたがるようにし
て拡散領域を形成する工程と、 前記第2の化合物半導体の層を除去することにより、前
記拡散領域を分離する工程とを含むことを特徴とする半
導体発光装置の製造方法。
2. A method of manufacturing a semiconductor light-emitting device, comprising forming a plurality of light-emitting portions in rows on a surface of a compound semiconductor having a pn junction, the method comprising: forming a second compound semiconductor layer on a first compound semiconductor substrate. A step of growing a crystal, a step of selectively etching the second compound semiconductor layer to form a window portion at a position which becomes the plurality of light emitting portions, and an impurity having a conductivity different from that of the first compound semiconductor substrate. To form a diffusion region so that the pn junction surface extends from the second compound semiconductor layer to the first compound semiconductor substrate such that the diffusion region is diffused shallower than the thickness of the second compound semiconductor layer. And a step of separating the diffusion region by removing the second compound semiconductor layer.
【請求項3】pn接合を有する化合物半導体の表面に複
数の発光部分を列状に形成する半導体発光装置の製造方
法であって、 pn接合を有する化合物半導体の表面に複数の発光部分
を列状に形成する半導体発光装置の製造方法であって、 第1の化合物半導体基板上に第2の化合物半導体の層を
結晶成長させる工程と、 この第2の化合物半導体の層を選択エッチングして前記
複数の発光部分となる位置に窓部を形成する工程と、 前記第1の化合物半導体基板と異なる導電性を有する不
純物を全てのpn接合面が前記第1の化合物半導体基板
に達するように前記第2の化合物半導体の層の厚さより
も深く拡散して、前記窓部の下の前記pn接合面が前記
第1の化合物半導体基板表面と逆方向に凸型形状をした
拡散領域を形成する工程と、 前記第2の化合物半導体の層を除去する工程と、 前記拡散領域のそれぞれの前記凸型形状部分の間をエッ
チングして、前記pn接合面よりも深い溝を形成するこ
とにより、前記拡散領域を分離する工程とを含むことを
特徴とする半導体発光装置の製造方法。
3. A method for manufacturing a semiconductor light-emitting device, comprising forming a plurality of light emitting portions in rows on a surface of a compound semiconductor having a pn junction, wherein a plurality of light emitting portions are arranged in rows on a surface of a compound semiconductor having a pn junction. A method of manufacturing a semiconductor light-emitting device, the method comprising: crystallizing a second compound semiconductor layer on a first compound semiconductor substrate; and selectively etching the second compound semiconductor layer to form the plurality of layers. Forming a window portion at a position which becomes a light emitting portion of the second compound semiconductor substrate, and forming the window so that all pn junction surfaces reach the first compound semiconductor substrate with impurities having conductivity different from that of the first compound semiconductor substrate. Diffusing deeper than the thickness of the compound semiconductor layer to form a diffusion region in which the pn junction surface under the window has a convex shape in a direction opposite to the surface of the first compound semiconductor substrate, The above 2. The step of removing the compound semiconductor layer and the step of etching between the convex-shaped portions of the diffusion regions to form trenches deeper than the pn junction surface, thereby separating the diffusion regions. The manufacturing method of the semiconductor light-emitting device characterized by including the process.
JP16377392A 1992-05-29 1992-05-29 Semiconductor light-emitting device and its manufacture Pending JPH05335620A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16377392A JPH05335620A (en) 1992-05-29 1992-05-29 Semiconductor light-emitting device and its manufacture

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16377392A JPH05335620A (en) 1992-05-29 1992-05-29 Semiconductor light-emitting device and its manufacture

Publications (1)

Publication Number Publication Date
JPH05335620A true JPH05335620A (en) 1993-12-17

Family

ID=15780448

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16377392A Pending JPH05335620A (en) 1992-05-29 1992-05-29 Semiconductor light-emitting device and its manufacture

Country Status (1)

Country Link
JP (1) JPH05335620A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008135793A (en) * 2008-02-28 2008-06-12 Oki Electric Ind Co Ltd Semiconductor light-emitting apparatus and led array

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008135793A (en) * 2008-02-28 2008-06-12 Oki Electric Ind Co Ltd Semiconductor light-emitting apparatus and led array

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