JPH05335598A - Semiconductor device - Google Patents

Abstract

PURPOSE:To provide a diode which can reduce a rise voltage to almost 0V for a forward bias and has an inverse dielectric strength characteristic with less leak for an inverse bias. CONSTITUTION:A structure of MOS transistor is formed on a semiconductor substrate, a gate electrode 6 is connected with a source electrode 7 or a drain electrode 8, a channel region 4 is set to conductive or non-conductive state depending on a voltage applied to the gate electrode 6 considering the semiconductor substrate 1 as an independent substrate electrode 10, and a diode effect is generated between the source electrode 7 and drain electrode 8.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device. More specifically, the present invention relates to a semiconductor device having a MOS diode structure in which a diode alone or a diode included in an IC has a MOS diode structure to reduce a voltage drop in forward bias.

[0002]

2. Description of the Related Art A conventional semiconductor diode is mainly of a bipolar type using a pn junction, and its structure is basically as shown in FIG. That is, in FIG. 10, the n-type epitaxial layer 42 is formed on the n ⁺ -type semiconductor substrate 41, the p ⁺ -type region 43 is formed, and the n ⁺ -type region for preventing the surface inversion of the n-type epitaxial layer 42 is formed.
44 is formed, a contact hole is formed in the insulating film 45 on the surface, and one electrode 47 is formed by the aluminum film,
By forming the other electrode 46 on the back surface of the semiconductor substrate 41, a forward bias is applied when a positive voltage is applied to the p ⁺ region 43 side, that is, the electrode 47 side, and a reverse bias is applied when a negative voltage is applied to the diode. Operate.

Further, in the D-MOS, a diode having a MOS structure may be used by short-circuiting the source and the gate. This structural diagram is shown in FIG. In FIG. 11, p-type regions 48 and 49 serving as gate regions and n-type regions 50 and 51 serving as source regions are formed in the n-type epitaxial layer 42, respectively, and the source regions 50 and 51 and the p-type regions 48 and 49 are formed. P ⁺ type regions 52 and 53 are formed for short-circuiting
A contact hole is formed in the insulating film 45 formed on the surface,
Electrodes 54, 55, 56 and 57 are formed in each source region and gate region, and these are connected to form one electrode of the diode, and the n ⁺ type semiconductor substrate 41 is used as the other electrode 58 of the diode to form the diode. However, even in this structure, with respect to the forward bias, the current crosses the pn junction surface, and a voltage drop of the rising voltage (built-in voltage) V _F occurs in the diode.

[0004]

The conventional diode is
Whether it is a bipolar type or a type using a MOS transistor, in principle, the current is such that it crosses the pn junction surface, and the rising voltage V _F (about 0.6 V) is always applied to the forward bias. A voltage drop occurs.

Therefore, this voltage is lost, which is an obstacle to low voltage driving of recent electronic equipment.

Although a Schottky diode is used as a diode having a low rising voltage V _F , this type of diode also has a rising voltage V _F of 0.3 to 0.4.
There is V, and the loss is still large. Further, in terms of reverse breakdown voltage, there is a problem that the leak is relatively large.

The present invention solves such problems and provides a semiconductor device having a reverse breakdown voltage characteristic with little leakage and a diode structure in which a rising voltage V _F is almost 0 V with respect to a forward bias. To aim.

[0008]

In a semiconductor device according to the present invention, a second conductivity type source region and a drain region are formed in a first conductivity type semiconductor layer through a channel region, and gate insulation is provided on the channel region. The gate electrode formed through the film is connected to one of the source electrode or the drain electrode to serve as one terminal of the diode, and the other source electrode or drain electrode serves as the other terminal of the diode, and the first conductive The type semiconductor layer has a MOS type diode having a structure capable of being set to a potential independent of the source region and the drain region.

This MOS type diode is formed together with other functional elements on the same semiconductor substrate to form a monolithic integrated circuit device.

Further, the hybrid integrated circuit device according to the present invention is
The MOS type diode having the above-mentioned structure is assembled in a complex manner with other functional elements.

Further, in the semiconductor device for power supply backup of the present invention, the MOS type diode and the pn junction type diode are formed in one chip, and the cathode side of the two diodes is connected to serve as a terminal to the load, The anode side of the MOS diode is used as a terminal for a normal power source, and the pn
The anode side of the junction diode is used as a backup power supply terminal.

[0012]

According to the present invention, the gate electrode formed on the channel region of the MOS transistor via the gate insulating film is connected to the source electrode or the drain electrode to serve as one terminal of the diode, and at the same time, to the channel region. Since an independent potential is applied and the threshold voltage can be dealt with, the channel region can be switched between conducting and non-conducting by applying a positive or negative voltage to the gate electrode. To act.

In addition, when conducting, if the source is an n-channel, the source-drain is connected in the n-type region, and p
In the case of a channel, since it is connected in the p-type region, a current does not flow through the pn junction, a forward bias occurs without a rising voltage of the pn junction, and a loss corresponding to a negligible channel resistance occurs. Further, in the case of reverse bias, since the channel region is OFF, a reverse bias of the pn junction is formed, and the reverse bias of a normal pn junction diode operates exactly.

If the MOS type diode of the present invention is used in a monolithic IC, a hybrid IC, or a power supply backup circuit as an example, the circuit can be operated without loss due to the above described diode action.

[0015]

The present invention will be described below with reference to the drawings. FIG. 1 is a diagram showing an n-channel MOS type diode portion which is an embodiment of the present invention, wherein (a) is a sectional view of a semiconductor structure and (b) is an equivalent circuit diagram thereof.

In FIG. 1A, a source region 2 and a drain region 3 of an n ⁺ type region are formed on a p-type semiconductor substrate 1, and a thin gate insulating film is formed on the surface of the semiconductor substrate 1 in a channel region 4 sandwiched between them. A gate electrode 6 is formed via the electrode 5, and is connected to the source electrode 7 to serve as one terminal A of the diode, and the drain electrode 8 formed in the drain region 3 serves as the other terminal B of the diode. An independent electrode 10 is formed on the p-type semiconductor substrate 1 via a p ⁺ -type region 9 for ohmic contact and is grounded. A protective film 11 is formed on the surface of the semiconductor substrate 1.

In this structure, when a positive voltage is applied to the terminal A, the semiconductor substrate 1 is connected to the ground, so that a positive voltage is applied to the terminal A, that is, the gate electrode 6, so that the gate electrode 6 If the voltage is higher than the threshold voltage, the channel region 4 becomes conductive and the region between AB becomes conductive. At this time, since the channel region 4 is an n-type inversion region, the current path between the terminals A and B does not cross the pn junction, and if the channel resistance is ignored, the forward bias voltage drop is 0. Become.

When a positive voltage is applied to the terminal B with the terminal A at 0 potential, the voltage of 0 is applied to the gate electrode 6, and the channel region is not turned on.
The terminals A and B are in a non-conducting state and a reverse bias is applied so that no current flows. In this case, the action is the same as the reverse bias of the normal pn junction.

This relationship is represented by an equivalent circuit in FIG. 1 (b).
Then, the terminals A and B function as a diode by incorporating the two terminals into the circuit system.

In the above-mentioned example, since the semiconductor substrate 1 is connected to the ground, the channel region cannot be turned ON unless a voltage higher than the threshold voltage of the channel region is applied to the gate electrode (terminal A). Therefore, depending on the applied voltage, the threshold voltage should be as low as possible (in manufacturing conditions,
It is necessary to adjust the voltage in the range of 0.5 to 3 V) or to apply the potential of the semiconductor substrate lower than the gate electrode by the threshold voltage (the same applies to the following embodiments).

FIG. 2 is a view showing another embodiment of the n-channel MOS type diode, (a) is a sectional view of a semiconductor structure,
(B) is the equivalent circuit diagram. In this embodiment, the electrode 10 for ground connection from the p-type semiconductor substrate 1 is the n ⁺ -type region 12
Therefore, the substrate 1 side is grounded via the anode diode D ₁ .
Therefore, the threshold voltage at which the channel region 4 becomes conductive becomes higher by V _{F of the} diode D ₁ , and the negative voltage can be completely cut off when an alternating current is applied.

FIG. 3 shows still another embodiment of the n-channel MOS type diode. 3A is a sectional view of a semiconductor structure, and FIG. 3B is an equivalent circuit diagram thereof. In this embodiment, the ground terminal C is formed on the ground electrode 10 via the polysilicon film 13 having a higher resistance. As shown in the equivalent circuit of FIG. Connected to earth via. With such a configuration, it is possible to prevent current breakdown when an alternating current is applied.

Next, the p-channel MOS type diode will be described. FIG. 4 is an explanatory diagram showing a semiconductor structure of an example of a p-channel MOS type diode. This p-channel embodiment is different from the n-channel structure described above in that the semiconductor substrate 1 is n-type and the source region 2 and the drain region 3 are p ⁺ -type. Therefore, the gate electrode 6 is connected to the drain electrode 8 to form the terminal B, and the terminal A
A forward bias is applied when a positive voltage is applied to, and a reverse bias is applied when a voltage of 0 is applied to the terminal A. At this time, the electrode 10 of the semiconductor substrate 1 is connected to a potential higher than the terminal B connected to the gate electrode by a threshold voltage.

As a result, the terminal A which constitutes the diode,
When a voltage such that the terminal A is positive is applied between B, a voltage of 0 is applied to the gate electrode (terminal B), holes are induced in the channel region 4 to be in a conductive state, and conversely to the terminal A. 0
When the voltage is applied, the gate electrode (terminal B) becomes a positive voltage, and the channel region becomes non-conductive and reverse biased.

The potential V _{cc of} this substrate is set to a voltage higher by the threshold voltage so that the channel region 4 is turned on when the terminal B is 0 V, but the voltage applied to the gate electrode on the terminal B side is The reference voltage may be set higher by the threshold voltage.

5 to 6 are views of a semiconductor structure showing another embodiment of the p-channel MOS type diode, in which the substrate electrode is taken out through the diode as in the case of the n-channel (FIG. 5). And an example in which a substrate power supply Vcc is connected to the substrate electrode via a resistor (FIG. 6).

In all of the above explanations, the voltage applied to the diode is positive and 0, but the higher voltage is positive and the lower voltage is 0.
Absolute values do not have to be positive and zero (eg 15V and 10
V). In this case, the potential applied to the semiconductor substrate electrode is set lower (in the case of n channel) or higher (in the case of p channel) with respect to the reference potential on the gate electrode side of the voltage applied to the diode. Ai) Set.

FIG. 7 is a diagram showing an example in which the diode structure of the present invention is applied to a power supply backup circuit.
Is a cross-sectional explanatory view of the semiconductor structure, and (b) is an equivalent circuit diagram thereof.

As shown in FIG. 9, the power supply backup circuit applies a voltage from the normal power supply 16 (about 5 V) to the memory RAM 17 through the diode D ₂ , and when the normal power supply 16 is abnormal. In order to supply the voltage from the backup power supply 18 when it occurs, the power supply (about 3 V) lower than the normal power supply 16 can supply power to the memory RAM 17 through the diode D ₃ . Therefore, the diodes D ₂ and D ₃ are connected as shown in FIG. 9, and the power is supplied from the normal power supply 16 via the diode D ₂ , and the voltage drop corresponding to the built-in voltage by the diode D _{2 is} generated. There is a voltage loss. Therefore, in order to reduce the voltage loss as much as possible,
Although a Schottky diode with a low built-in voltage is used, there is a problem that a built-in voltage of about 0.4 V still occurs.

FIG. 7 shows an example in which two diode portions of this backup power supply are integrated into one chip according to the present invention. The diode D ₂ on the normal power supply side is formed by the n-channel MOS type diode D ₄ of the present invention, and the backup power supply is provided. The diode D ₃ on the side is an example constituted by a normal pn junction diode D ₅ , but this diode can also be constituted by a MOS type diode according to the present invention.

In FIG. 7 (a), n is formed on the p ⁺ type semiconductor substrate 21.
Type epitaxial layer 22 is formed, p well 23 is further formed in n type epitaxial layer 22, and n ⁺ is formed in p well 23.
A channel region 26 is formed between the source region 24 and the drain region 25 of the mold, a p ⁺ type region 27 for taking out the electrode of the p well 23 is formed, and a gate electrode 29 is formed via a gate insulating film 28. ing. A contact hole is formed in the insulating film 30 formed on the substrate surface, a source electrode 31, a drain electrode 32, and a substrate electrode 33 are formed, and an n-type epitaxial layer is formed.
Isolation p-type diffusion regions 35 and 36 are formed in the p-type diffusion region 36, and an n ⁺ -type region 37 and a p ⁺ -type region 38 for extracting an electrode are further formed in the p-type diffusion region 36 to form a normal pn junction diode. Are formed. In this n ⁺ type region 37, an n type electrode
39 is formed, and the p ⁺ type region 38 and the n ⁺ type region 34 on the MOS type diode side are connected by an aluminum film 40 in order to prevent the parasitic effect of pnp. In this structure, the source electrode 31 and the gate electrode 29 are connected by aluminum wiring or the like to form one terminal A of the diode, and the drain electrode 32 and the n-type electrode 39 of the pn junction diode D ₅ are connected by aluminum wiring or the like. It is connected to serve as the connection terminal B to the RAM 17, the substrate electrode 33 is connected to the ground as the terminal C, and pn is applied from the rear surface of the substrate 21.
The terminal E is formed as the p-type electrode of the junction diode D ₅ , and the diode portion of the backup power supply 18 is configured. The terminals A, B, C, and E are shown in correspondence with the equivalent circuit diagram of FIG. 7B, and the portion surrounded by the dotted line of FIG. 7B is the circuit portion formed of FIG. 7A. is there.

Although the above description has been given by taking an example of an n-channel MOS type diode, a power supply backup circuit can be similarly formed by a p-channel MOS type diode as shown in the equivalent circuit diagram of FIG. In this case, the diodes D ₄ and D ₅ are connected to the negative side of the power source.

Since the semiconductor diode according to the present invention can be formed in the semiconductor substrate in the same process as that for forming a normal MOSIC, it can be formed at the same time as a normal IC circuit, and the diode according to the present invention can be formed into a p-channel or an n-channel depending on the semiconductor circuit. The semiconductor device built in can be formed monolithically. Further, the characteristics of the diode of the present invention can be exhibited even if the MOS type diode according to the present invention is individually manufactured and assembled as a hybrid IC together with other functional elements.

[0034]

According to the present invention, it is possible to obtain a diode having a reverse breakdown voltage characteristic in which the forward voltage in the forward direction can be made almost zero, and moreover, there is little leakage with respect to the reverse bias. On the other hand, there is no voltage loss of the rising voltage, and it is possible to obtain a highly efficient diode.

Further, by using it for the backup circuit of the power source, the normal operating power source can be lowered to operate, and the life of the battery can be greatly extended.

Further, according to the present invention, since the loss of the rising voltage is eliminated, it is possible to meet the recent needs for low voltage driving of electronic equipment, and by using it as a part of a monolithic or hybrid IC circuit, a new product can be obtained. The development field expands, and low-voltage drive electronic devices can be realized.

[Brief description of drawings]

FIG. 1 is an example of an n-channel MOS type diode which is an embodiment of the present invention, in which FIG.
(B) is an equivalent circuit diagram.

FIG. 2 is an example of an n-channel MOS type diode according to another embodiment of the present invention, in which (a) is a sectional view of the semiconductor structure,
(B) is an equivalent circuit diagram.

FIG. 3 is an n-channel M according to still another embodiment of the present invention.
In the example of the OS type diode, (a) is a sectional view of the semiconductor structure and (b) is an equivalent circuit diagram.

FIG. 4 is a p-channel M according to still another embodiment of the present invention.
It is a semiconductor structure sectional view of an OS type diode.

FIG. 5 is a p-channel M according to still another embodiment of the present invention.
It is a semiconductor structure sectional view of an OS type diode.

FIG. 6 is a p-channel M according to still another embodiment of the present invention.
It is a semiconductor structure sectional view of an OS type diode.

FIG. 7 is an example of a power supply backup circuit using a diode of the present invention, (a) is a semiconductor structure sectional view, and (b) is an equivalent circuit diagram.

FIG. 8 is an equivalent circuit diagram when a p-channel MOS diode is used in another example of the power supply backup circuit using the diode of the present invention.

FIG. 9 is a circuit diagram of a conventional power backup circuit.

FIG. 10 is a sectional view of a semiconductor structure of a conventional diode.

FIG. 11 is a sectional view of a semiconductor structure showing an example of a diode configuration using a conventional MOS transistor.

[Explanation of symbols]

1 semiconductor substrate 2 source region 3 drain region 4 channel region 5 gate insulating film 6 gate electrode 7 source electrode 8 drain electrode 16 normal power supply 18 backup power supply D ₄ MOS type diode D ₅ pn junction diode

Claims (4)

[Claims] 1. A first-conductivity-type semiconductor layer is formed with a second-conductivity-type source region and a drain region via a channel region, and a gate electrode formed on the channel region via a gate insulating film is the source. One of the electrodes or the drain electrode is connected to form one terminal of the diode, the other source electrode or drain electrode is formed to the other terminal of the diode, and the semiconductor layer of the first conductivity type is connected to the source region and the drain region. M of the structure that can be set to an independent potential from
A semiconductor device having an OS diode. 2. A monolithic integrated circuit device in which the MOS type diode is formed on the same semiconductor substrate together with other functional elements. 3. A hybrid integrated circuit device in which the MOS type diode is formed independently and is compositely assembled with other functional elements. 4. The MOS type diode and a pn junction type diode are formed in one chip, and the cathode side of the two diodes are connected to serve as a terminal to a load.
A semiconductor device for power backup, wherein the anode side of the S-type diode is a terminal for normal power supply, and the anode side of the pn junction diode is a terminal for backup power supply.