JPH0532934B2 - - Google Patents
Info
- Publication number
- JPH0532934B2 JPH0532934B2 JP58100942A JP10094283A JPH0532934B2 JP H0532934 B2 JPH0532934 B2 JP H0532934B2 JP 58100942 A JP58100942 A JP 58100942A JP 10094283 A JP10094283 A JP 10094283A JP H0532934 B2 JPH0532934 B2 JP H0532934B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- fluctuation
- output
- signal
- gain control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 230000003287 optical effect Effects 0.000 claims description 11
- 230000001629 suppression Effects 0.000 claims description 8
- 101100381996 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) BRO1 gene Proteins 0.000 description 8
- 239000000203 mixture Substances 0.000 description 6
- 239000003990 capacitor Substances 0.000 description 5
- 238000010586 diagram Methods 0.000 description 5
- 230000003321 amplification Effects 0.000 description 3
- 230000008878 coupling Effects 0.000 description 3
- 238000010168 coupling process Methods 0.000 description 3
- 238000005859 coupling reaction Methods 0.000 description 3
- 238000003199 nucleic acid amplification method Methods 0.000 description 3
- 239000000284 extract Substances 0.000 description 2
- 230000010355 oscillation Effects 0.000 description 2
- 238000013459 approach Methods 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000008030 elimination Effects 0.000 description 1
- 238000003379 elimination reaction Methods 0.000 description 1
- 108091008695 photoreceptors Proteins 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/60—Receivers
- H04B10/66—Non-coherent receivers, e.g. using direct detection
- H04B10/69—Electrical arrangements in the receiver
- H04B10/691—Arrangements for optimizing the photodetector in the receiver
- H04B10/6911—Photodiode bias control, e.g. for compensating temperature variations
Landscapes
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Optical Communication System (AREA)
Description
【発明の詳細な説明】
（技術分野）
本発明はパイロツトキヤリア方式の全AGC回
路を有する光信号受信回路に使用する直流変動抑
圧回路に関するものである。DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to a DC fluctuation suppression circuit used in an optical signal receiving circuit having a pilot carrier type all-AGC circuit.
（従来技術）
従来パイロツトキヤリア方式の全AGC回路
（APD電流制御形）を有する光信号受信回路の構
成を第１図に示す。第１図においてOPTINは光
信号入力、APDはアバランシエフオトダイオー
ド、Ｒは抵抗、Ｃはカツプリングコンデンサ、
RECは初段の増幅器BA１と後段の増幅器OAと
から成る受光増幅器、AGCはバンドパスフイル
タBPFと検波器DETとローパスフイルタLPF１
と高圧発生回路HAとから成る自動利得制御回
路、Soutは信号出力である。光信号入力OPTIN
が変化すると自動利得制御回路AGCはパイロツ
ト信号の電圧に応じてアバランシエフオトダイオ
ードAPDに流れる電流（逆バイアス電流）を変
化させ、信号出力Soutが一定となるように制御
していた。ここで、受信信号を電気信号に変換し
た出力Ssには、AGC回路の制御出力、すなわち
HAの出力による直流成分Sdが混入する。この直
流変動分が受光増幅器RECの電源電圧に接近す
ると、受光増幅器がクリツプ領域に置い込まれる
ことになり、直線増幅が不可能になる。すなわ
ち、パイロツトキヤリアが小さくなつたり、無く
なつたりすることになる。(Prior Art) Figure 1 shows the configuration of an optical signal receiving circuit having a conventional pilot carrier type all-AGC circuit (APD current control type). In Figure 1, OPTIN is an optical signal input, APD is an avalanche photodiode, R is a resistor, C is a coupling capacitor,
REC is a light receiving amplifier consisting of first-stage amplifier BA1 and second-stage amplifier OA, and AGC is composed of bandpass filter BPF, detector DET, and low-pass filter LPF1.
An automatic gain control circuit consisting of a high voltage generating circuit HA and a high voltage generating circuit HA, Sout is a signal output. Optical signal input OPTIN
When Sout changes, the automatic gain control circuit AGC changes the current (reverse bias current) flowing through the avalanche photodiode APD in accordance with the pilot signal voltage, controlling the signal output Sout to be constant. Here, the output S s obtained by converting the received signal into an electrical signal is the control output of the AGC circuit, i.e.
A DC component S d from the HA output is mixed in. When this DC fluctuation approaches the power supply voltage of the photoreceptor amplifier REC, the photoreceiver amplifier is placed in the clip region, making linear amplification impossible. In other words, the pilot carrier becomes smaller or disappears.
正常の受信状態であつても、光入力信号
OPTINが小さくなつた場合、利得制御回路AGC
によつて信号出力Soutが大ききなるように制御
される。ところが直流変動分が混入してパイロツ
トキヤリアが小さくなつた場合にこのような制御
がされると、更に直流変動が大きくなることにな
る。このように直流変動分がある場合、光信号入
力OPTINに、パイロツトキヤリアレベルが比例
しなくなる。 Even under normal reception conditions, the optical input signal
When OPTIN becomes small, the gain control circuit AGC
The signal output Sout is controlled to be large. However, if such control is performed when the pilot carrier becomes small due to the introduction of DC fluctuations, the DC fluctuations will become even larger. If there is a DC fluctuation component like this, the pilot carrier level will no longer be proportional to the optical signal input OPTIN.
ここで、カツプリングコンデンサＣの容量につ
いて述べる。容量Ｃが大きければ、直流変動分が
伝送され易いが、一方容量Ｃが小さければ低減の
波形歪を生じる。このため低域の発振現象を抑え
るために容量Ｃを大きくとりながら、利得制御回
路AGCの時定数を大きくして直流変動分の周波
数を下げることが考えられる。しかしそのため
に、高速の利得制御動作が不可能であるという問
題点があつた。 Here, the capacitance of the coupling capacitor C will be described. If the capacitance C is large, DC fluctuations are easily transmitted, but if the capacitance C is small, waveform distortion will occur. Therefore, in order to suppress the low-frequency oscillation phenomenon, it is possible to increase the time constant of the gain control circuit AGC while increasing the capacitance C to reduce the frequency of the DC fluctuation. However, this has caused a problem in that high-speed gain control operation is not possible.
（発明の目的）
本発明の目的はこれら欠点を除去する為、直流
変動分を受光増幅器の低レベル段（初段）で検出
し、それを極性反転して加算し、自動利得制御に
伴う直流変動分を相殺した後、受光増幅器の高レ
ベル段（高段）に送り、信号分のみを増幅できる
ようにしたものであり以下詳細に説明する。(Objective of the Invention) In order to eliminate these drawbacks, the object of the present invention is to detect DC fluctuations at the low level stage (first stage) of the photoreceiver amplifier, invert the polarity and add them. After canceling out the signal components, the signal is sent to the high level stage (high stage) of the light receiving amplifier so that only the signal component can be amplified, and will be described in detail below.
（発明の構成）
本発明は、パイロツトキヤリア方式の全AGC
回路を有する光信号受信回路の直流変動抑圧回路
において、前記AGC回路のローパスフイルタと
等しいかもしくは高く信号成分の下限の周波数よ
りも低いカツトオフ周波数特性を有し利得制御に
起因する直流変動分を抜きとる低減フイルタと、
該抜きとられた直流変動分の極性を反転する回路
と、該反転された信号に前記低域フイルタ前段の
信号成分と直流変動分を含む信号を加えて該直流
変動分を相殺する回路から構成されることを特徴
とする直流変動抑圧回路。(Structure of the Invention) The present invention provides a pilot carrier system for all AGC systems.
A DC fluctuation suppression circuit of an optical signal receiving circuit having a cut-off frequency characteristic that is equal to or higher than the low-pass filter of the AGC circuit and lower than the lower limit frequency of the signal component, and extracts DC fluctuations caused by gain control. A reduction filter that takes
Consisting of a circuit that inverts the polarity of the extracted DC fluctuation, and a circuit that adds a signal containing the signal component before the low-pass filter and the DC fluctuation to the inverted signal to cancel out the DC fluctuation. A DC fluctuation suppression circuit characterized in that:
（実施例）
第２図は本発明の実施例を示すブロツク図であ
り、BA１は初段の増幅回路、BA２は増幅回路、
LPF２はローパスフイルタ、INVは利得可変機
能を有する極性反転回路、MIXは加算回路、OA
は後段の増幅回路を示し、他の記号は第１図と同
じものを示す。一点破線で囲んだ部分RECは受
光増幅器を構成する部分であり、本発明に係る直
流変動抑圧回路である。(Embodiment) FIG. 2 is a block diagram showing an embodiment of the present invention, where BA1 is a first-stage amplifier circuit, BA2 is an amplifier circuit,
LPF2 is a low-pass filter, INV is a polarity inversion circuit with variable gain function, MIX is an addition circuit, OA
indicates a rear-stage amplifier circuit, and other symbols indicate the same ones as in FIG. A portion REC surrounded by a dotted line is a portion constituting a light receiving amplifier, and is a DC fluctuation suppression circuit according to the present invention.
第３図は第２図の各部の動作波形を示すもので
あり、，，，，は両図において対応す
る。以下、第２図と第３図を用いて本発明の動作
を説明する。 FIG. 3 shows operating waveforms of each part in FIG. 2, and , , , corresponds in both figures. The operation of the present invention will be described below with reference to FIGS. 2 and 3.
入力信号をサンウエーブであると仮定して説明
する。APDに一定のバイアスがかかつた状態で、
光入力信号OPTINのエンベロープが第３図に
示すようにステツプ状に変化した場合、これは
APD出力Ssとして、コンデンサＣを介して受光
増幅器RECへ与えられる。この時、本来の信号
成分Ssに、利得制御に伴う直流変動分Sdが加算さ
れ、実際にRECに与えられる波形は第３図
（Ss＋Sd）のようになる。なお、ここで波形、
また後述する波形の中心の点線は、これらの波
形の平均値を示す。 The following explanation assumes that the input signal is a sunwave. With a certain bias applied to APD,
If the envelope of the optical input signal OPTIN changes in a step-like manner as shown in Figure 3, this
It is applied as the APD output S s to the light receiving amplifier REC via the capacitor C. At this time, the direct current variation S d due to gain control is added to the original signal component S s , and the waveform actually given to the REC becomes as shown in FIG. 3 (S s +S d ). In addition, here the waveform,
Moreover, the dotted line at the center of the waveforms described later indicates the average value of these waveforms.
この波形は増幅回路BA１に与えられ、k0（Ss
＋Sd）として出力される（ここではk0は、回路素
子によつて定まる定数である。以後、k1〜k3まで
も同様である）。この出力は、増幅回路BA２、
および加算回路MIXに与えられる。 This waveform is given to the amplifier circuit BA1, and k 0 (S s
+S d ) (here, k 0 is a constant determined by the circuit element. Hereinafter, the same applies to k 1 to k 3 ). This output is the amplifier circuit BA2,
and is given to the adder circuit MIX.
増幅回路BA２は、増幅回路BA１から入力さ
れた波形をさらに増幅し、k1（ss＋Sd）としてロ
ーパスフイルタLPF２に出力する。なおここで、
増幅回路BA１の入力および出力、さらに増幅回
路BA２の出力をもとにで示しているが、これ
らは増幅回路BA１，BA２が直線領域にある限
りそれぞれ相似形の波形となるので、ここでは簡
単のためにすべてとして示す。 The amplifier circuit BA2 further amplifies the waveform input from the amplifier circuit BA1 and outputs it as k 1 (s s +S d ) to the low-pass filter LPF2. Furthermore, here,
These are shown based on the input and output of amplifier circuit BA1 and the output of amplifier circuit BA2, but as long as amplifier circuits BA1 and BA2 are in the linear region, they have similar waveforms, so we will use a simple diagram here. for all shown as.
ローパスフイルタLPF２は、増幅器BA２の出
力から直流変動分のみを抜き取り、波形Ｃ（k2Sd）
として出力する。これを極性反転回路INVに入
力する。極性反転回路INVでは、その利得を調
整することにより、ローパスフイルタLPF２の
出力を増幅回路BA１の出力の直流変動分のレベ
ル、すなわちk0Sdと等しくし、さらに極性を反転
させて出力する。これにより、第３図の波形
（−k0Sdが得られる。これを加算回路MIXへ入力
する。 The low-pass filter LPF2 extracts only the DC variation from the output of the amplifier BA2, and creates a waveform C (k 2 S d ).
Output as . This is input to the polarity inversion circuit INV. The polarity inverting circuit INV adjusts its gain to make the output of the low-pass filter LPF2 equal to the DC fluctuation level of the output of the amplifier circuit BA1, that is, k 0 S d , and further inverts the polarity and outputs it. As a result, the waveform (-k 0 S d) shown in FIG. 3 is obtained. This is input to the adder circuit MIX.
加算回路MIXには、増幅回路BA１の出力k0
（Ss＋Sd）と、極性反転回路INVの出力（−
k0Sd）とが入力される。 The adder circuit MIX has the output k 0 of the amplifier circuit BA1.
(S s + S d ) and the output of the polarity inversion circuit INV (−
k 0 S d ) is input.
加算回路MIXでは、これらの入力信号を加算
して出力する。これにより直流変動分が相殺さ
れ、第３図に示す波形（k3Ss）が得られる。そ
してこれ後段の増幅回路OAにて増幅され、出力
信号Soutとなる。 The adder circuit MIX adds these input signals and outputs the result. As a result, the DC fluctuation component is canceled out, and the waveform (k 3 S s ) shown in FIG. 3 is obtained. The signal is then amplified by the amplifier circuit OA at the subsequent stage, and becomes the output signal Sout.
第３図に示す波形のスパイク部分が受光増幅
回路の非直線領域に入ると、直線増幅が不可能と
なるが、この場合でも点線で示す波形の平均値
は変化していない。従つてパイロツトキヤリアが
なくなることはなく、発振現象が生じることはな
い。 When the spike portion of the waveform shown in FIG. 3 enters the non-linear region of the light receiving and amplifying circuit, linear amplification becomes impossible, but even in this case, the average value of the waveform shown by the dotted line remains unchanged. Therefore, the pilot carrier will not run out, and no oscillation phenomenon will occur.
次に自動利得制御回路AGCの動作を説明する。
信号出力Soutに混合されているパイロツトキヤ
リアはバンドパスフイルタBPFで抜きとられ、
検波器DETで整流され、ローパスフイルタLPF
１で平滑され、高圧発生回路HAで基準電圧Vrと
比較増幅され、アバランシエフオトダイオード
APDの逆バイアスを高圧発生回路HAの入力が基
準電位Vrに等しくなるように変化させる。した
がつて信号出力Soutのレベルは基準電位Vrによ
り変化させることができる。 Next, the operation of the automatic gain control circuit AGC will be explained.
The pilot carrier mixed with the signal output Sout is extracted by a bandpass filter BPF,
Rectified by detector DET and low pass filter LPF
1, and is compared and amplified with the reference voltage Vr in the high voltage generation circuit HA, and then the avalanche photodiode
The reverse bias of the APD is changed so that the input of the high voltage generation circuit HA becomes equal to the reference potential V r . Therefore, the level of the signal output Sout can be changed by the reference potential V r .
ここで、以上説明したような直流抑圧回路の動
作が成立する条件は、信号成分の下限の周波数を
fsl、ローパスフイルタLPF１のカツトオフ周波数
をfL1、ローパスフイルタLPF２のカツトオフ周
波数をfL2とすると、
fsl＞fL2fL1
である。すなわち、信号成分は直流変動分よりも
周波数が高いので、AVC回路のLPF２において
信号成分から直流変動分を抜き取るため、fsl＞
fL2という条件が必要となる。 Here, the condition for the operation of the DC suppression circuit as explained above is to set the lower limit frequency of the signal component to
f sl , the cutoff frequency of the low-pass filter LPF1 is f L1 , and the cut-off frequency of the low-pass filter LPF2 is f L2 , then f sl >f L2 f L1 . In other words, since the signal component has a higher frequency than the DC fluctuation component, in order to extract the DC fluctuation component from the signal component in LPF2 of the AVC circuit, f sl >
The condition fL2 is required.
またAGC回路のローパスフイルタLPF１のカ
ツトオフ周波数fl1を下げると、直流変動の時定
数が低くなる。この場合AGC回路で生ずる直流
変動分をローパスフイルタLPF２ですべてピツ
クアツプできるようにするための条件として、
fL2≧fL1の条件が必要となる。これにより直流
変動分Sdの上限をカツトし、高圧発生回路HAの
入力が基準電圧Vrに等しくなるようにAPDの逆
バイアスを変化させ、一方受光増幅器RECの
LPF２において信号成分Ssに含まれる逆バイアス
の直流変動分を抜き取る操作が達成される。 Furthermore, when the cutoff frequency fl1 of the low-pass filter LPF1 of the AGC circuit is lowered, the time constant of DC fluctuation becomes lower. In this case, the conditions for allowing the low-pass filter LPF2 to pick up all of the DC fluctuations that occur in the AGC circuit are as follows:
The condition fL2≧fL1 is required. As a result, the upper limit of the DC fluctuation Sd is cut, and the reverse bias of the APD is changed so that the input of the high voltage generation circuit HA becomes equal to the reference voltage V r , while the
In the LPF 2, the operation of extracting the reverse bias DC fluctuation included in the signal component Ss is achieved.
尚、パイロツトキヤリアを信号出力Soutより
除去する必要がある場合は、出力回路にパイロツ
トキヤリアの周波数fpのバンドエリミテートフイ
ルタもしくは信号成分を通すローパスフイルタを
挿入すればよい。 If it is necessary to remove the pilot carrier from the signal output Sout, a band elimination filter having the frequency f p of the pilot carrier or a low pass filter that passes the signal component may be inserted in the output circuit.
以上説明したように、本実施例では自動利得制
御に起因する直流変動分を除去することができる
ので、
(1) 高速動作可能な自動利得制御回路が得られ
る。 As explained above, in this embodiment, the DC fluctuation caused by automatic gain control can be removed, so (1) an automatic gain control circuit capable of high-speed operation is obtained.
(2) カツプリングコンデンサＣの値を大きくして
低域の波形歪を除去することができる。(2) Low-frequency waveform distortion can be removed by increasing the value of the coupling capacitor C.
といつた利点がある。There are some advantages.
（発明の効果）
本発明の直流変動抑圧回路は自動利得制御に起
因する直流変動分を除去することができ、高速動
作可能な自動利得制御回路を得ることができる
為、映像信号のベースバンド伝送等に利用するこ
とができる。(Effects of the Invention) The DC fluctuation suppression circuit of the present invention can remove DC fluctuations caused by automatic gain control, and an automatic gain control circuit capable of high-speed operation can be obtained, which enables baseband transmission of video signals. It can be used for etc.
第１図は従来の光信号受信回路の説明図、第２
図は本発明の実施例を示す説明図、第３図は各部
の動作波形を示す説明図である。
APD……アバランシエフオトダイオード、Ｒ
……抵抗、Ｃ……コンデンサ、BA１，BA２，
OA……増幅回路、LPF１，LPF２……ローパス
フイルタ、INV……極性反転回路、MIX……加
算回路、REC……受光増幅器、OPTIN……光入
力信号、Sout……出力信号、BPF……バンドパ
スフイルタ、DET……検波器、HA……高圧発生
回路、AGC……自動利得制御回路。
Figure 1 is an explanatory diagram of a conventional optical signal receiving circuit;
The figure is an explanatory diagram showing an embodiment of the present invention, and FIG. 3 is an explanatory diagram showing operating waveforms of each part. APD...Avalanche photodiode, R
...Resistance, C...Capacitor, BA1, BA2,
OA...Amplification circuit, LPF1, LPF2...Low pass filter, INV...Polarity inversion circuit, MIX...Addition circuit, REC...Photoreceiving amplifier, OPTIN...Optical input signal, Sout...Output signal, BPF...Band Pass filter, DET...detector, HA...high voltage generation circuit, AGC...automatic gain control circuit.
Claims (1)
のバイアス電流を制御する利得制御回路を有する
光信号受信回路の、前記バイアス電流に含まれる
直流変動を抑圧する直流変動抑圧回路において、 前記受光素子の出力から前記直流変動分を抜き
取るフイルタと、 このフイルタによつて抜き取られた前記直流変
動分の極性を反転する反転回路と、 前記受光素子の出力と前記反転回路の出力とを
加算して、前記直流変動を相殺する加算器とから
構成され、 この加算器の出力を利得制御回路の入力とする
ことを特徴とする、 直流変動抑圧回路。 ２ 特許請求の範囲第１記載のフイルタは、前記
利得制御回路のローパスフイルタのカツトオフ周
波数に等しいかもしくは高く、かつ受信信号成分
の下限周波数よりも低いカツトオフ周波数特性を
有することを特徴とする、特許請求の範囲第１項
記載の直流変動抑圧回路。[Scope of Claims] 1. A DC fluctuation suppression circuit for suppressing DC fluctuations included in the bias current of an optical signal receiving circuit having a gain control circuit for controlling the bias current of a light receiving element that receives a pilot carrier signal, comprising: a filter for extracting the DC fluctuation from the output of the light receiving element; an inverting circuit for reversing the polarity of the DC fluctuation extracted by the filter; and an inverting circuit for adding the output of the light receiving element and the output of the inverting circuit. and an adder for canceling the DC fluctuation, and the output of the adder is used as an input to a gain control circuit. 2. The filter according to claim 1 is characterized in that it has a cut-off frequency characteristic that is equal to or higher than the cut-off frequency of the low-pass filter of the gain control circuit, and lower than the lower limit frequency of the received signal component. A DC fluctuation suppression circuit according to claim 1.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58100942A JPS59226527A (en) | 1983-06-08 | 1983-06-08 | Circuit for suppressing dc variation |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58100942A JPS59226527A (en) | 1983-06-08 | 1983-06-08 | Circuit for suppressing dc variation |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS59226527A JPS59226527A (en) | 1984-12-19 |
| JPH0532934B2 true JPH0532934B2 (en) | 1993-05-18 |
Family
ID=14287402
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58100942A Granted JPS59226527A (en) | 1983-06-08 | 1983-06-08 | Circuit for suppressing dc variation |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59226527A (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62116029A (en) * | 1985-11-15 | 1987-05-27 | Fujitsu Ltd | Detecting system for cut off of optical signal |
| US10033337B2 (en) * | 2016-08-09 | 2018-07-24 | Qualcomm Incorporated | Multi-stage bandpass low-noise amplifier |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55113383A (en) * | 1979-02-22 | 1980-09-01 | Fujitsu Ltd | Light receiving circuit |
| JPS5850811A (en) * | 1981-09-22 | 1983-03-25 | Nec Corp | Agc circuit |
-
1983
- 1983-06-08 JP JP58100942A patent/JPS59226527A/en active Granted
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55113383A (en) * | 1979-02-22 | 1980-09-01 | Fujitsu Ltd | Light receiving circuit |
| JPS5850811A (en) * | 1981-09-22 | 1983-03-25 | Nec Corp | Agc circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS59226527A (en) | 1984-12-19 |
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