JPH05327021A - Optical device - Google Patents
Optical deviceInfo
- Publication number
- JPH05327021A JPH05327021A JP4133595A JP13359592A JPH05327021A JP H05327021 A JPH05327021 A JP H05327021A JP 4133595 A JP4133595 A JP 4133595A JP 13359592 A JP13359592 A JP 13359592A JP H05327021 A JPH05327021 A JP H05327021A
- Authority
- JP
- Japan
- Prior art keywords
- package
- optical device
- electrode
- recess
- mounting substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000003287 optical effect Effects 0.000 title claims abstract description 41
- 239000000758 substrate Substances 0.000 claims abstract description 24
- 239000010409 thin film Substances 0.000 claims description 3
- 229920005989 resin Polymers 0.000 abstract description 6
- 239000011347 resin Substances 0.000 abstract description 6
- 238000005476 soldering Methods 0.000 abstract description 3
- 239000000919 ceramic Substances 0.000 abstract description 2
- 238000004806 packaging method and process Methods 0.000 abstract 1
- 238000012216 screening Methods 0.000 abstract 1
- 238000000034 method Methods 0.000 description 8
- 229910000679 solder Inorganic materials 0.000 description 8
- 238000007747 plating Methods 0.000 description 4
- 238000007789 sealing Methods 0.000 description 3
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 239000006071 cream Substances 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000010292 electrical insulation Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 238000001125 extrusion Methods 0.000 description 1
- 230000004907 flux Effects 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 238000001746 injection moulding Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 229920002050 silicone resin Polymers 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229910052718 tin Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/483—Containers
- H01L33/486—Containers adapted for surface mounting
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
Landscapes
- Led Device Packages (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、表面実装用の光学装置
に関し、特に組立後のモジユール厚みをできるだけ薄く
したい場合に使用される光学装置に係る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical device for surface mounting, and more particularly to an optical device used when it is desired to make the module thickness after assembly as thin as possible.
【０００２】[0002]
【従来の技術】従来の表面実装用の光学装置（サーフェ
イスマウントデバイス）として、図７〜９に示すような
ものがある（特公昭６０−４３０４０号参照）。これ
は、ＬＥＤチップ等の光学素子１から発する光束を効率
良く前面に放つために、パツケージ（反射ケース）３内
に傾斜反射面を有する凹部２を形成し、この凹部２内に
光学素子１をダイボンドしたものである。2. Description of the Related Art As a conventional optical device for surface mounting (surface mount device), there is one as shown in FIGS. 7 to 9 (see Japanese Patent Publication No. 60-43040). In order to efficiently emit the light flux emitted from the optical element 1 such as an LED chip to the front surface, a recess 2 having an inclined reflection surface is formed in a package (reflection case) 3, and the optical element 1 is placed in the recess 2. It is die-bonded.
【０００３】なお、図７〜９中、４はめつき等の電極
部、５は凹部２に充填された透光性封止樹脂である。In FIGS. 7 to 9, 4 is an electrode portion such as a fitting, and 5 is a translucent sealing resin filled in the recess 2.
【０００４】[0004]
【発明が解決しようとする課題】従来の光学装置では、
光学素子１をパツケージ３の凹部２内にダイボンドして
いるため、凹部２の深さ寸法Ｄ０だけ、パツケージ３の
高さ寸法が大となってしまう。In the conventional optical device,
Since the optical element 1 is die-bonded in the recess 2 of the package 3, the height dimension of the package 3 is increased by the depth dimension D0 of the recess 2.
【０００５】そうすると、外部プリント基板への搭載後
の部品高さが高くなり、高密度実装のより薄い寸法を要
求されるモジユールには向いていない。Then, the component height after mounting on the external printed circuit board becomes high, and it is not suitable for a module which requires a thinner dimension for high-density mounting.
【０００６】本発明は、上記課題に鑑み、表面実装後の
部品高さを低くできる光学装置の提供を目的とする。In view of the above problems, it is an object of the present invention to provide an optical device capable of reducing the height of components after surface mounting.
【０００７】[0007]
【課題を解決するための手段】本発明による課題解決手
段は、図１〜６の如く、パツケージ１１の上面に凹部１
６が形成され、該凹部１６の底面に、薄膜状の電極部１
７が形成され、該電極部１７に光学素子１９が搭載さ
れ、前記電極部１７は、外部実装基板１３に半田にて接
続するよう前記凹部１６の底面から側面、パツケージ１
１の上面および側壁面を介して、パツケージ１１の裏面
電極１７ａにまで立体的に引きまわしされた光学装置に
おいて、前記パツケージ１１の底部１２に、該底部１２
が外部実装基板１３の実装孔１４に埋め込み可能な小幅
寸法となるよう段差１２ａが形成されたものである。As shown in FIGS. 1 to 6, the problem solving means according to the present invention is such that a recess 1 is formed on the upper surface of a package 11.
6 is formed, and the thin-film electrode portion 1 is formed on the bottom surface of the recess 16.
7 is formed, an optical element 19 is mounted on the electrode portion 17, and the electrode portion 17 is connected to the external mounting substrate 13 by soldering from the bottom surface to the side surface of the recess 16 and the package 1.
In the optical device which is three-dimensionally drawn to the back surface electrode 17a of the package 11 through the upper surface and the side wall surface of the package 1, the bottom portion 12 of the package 11 is attached to the bottom portion 12 of the package 11.
The step 12a is formed to have a small width dimension that can be embedded in the mounting hole 14 of the external mounting substrate 13.
【０００８】[0008]
【作用】上記課題解決手段において、実装時には、パツ
ケージ１１の小幅とされた底部１２を、外部実装基板１
３の実装孔１４に埋め込む。そうすると、底部１２の突
出寸法Ｔ１を外部実装基板１３の実装孔１４の深さ寸法
Ｔ２で吸収できる。In the above-mentioned means for solving the problems, at the time of mounting, the bottom portion 12 of the package 11 having a small width is attached to the external mounting substrate 1.
Embedded in the mounting hole 14 of No. 3. Then, the protrusion dimension T1 of the bottom portion 12 can be absorbed by the depth dimension T2 of the mounting hole 14 of the external mounting substrate 13.
【０００９】[0009]
【実施例】図１は本発明の一実施例の光学装置において
表面実装動作を示す斜視図、図２は図１のＡ−Ａ断面
図、図３は図１のＢ−Ｂ断面図、図４は従来の光学装置
と本発明の光学装置を外部実装基板に実装した場合の高
さ比較をした側断面図、図５は光学装置を両面実装に応
用した場合の側断面図、図６は光学装置を外部実装基板
にサイド光授受となるように搭載した場合の斜視図であ
る。1 is a perspective view showing a surface mounting operation in an optical device according to an embodiment of the present invention, FIG. 2 is a sectional view taken along line AA of FIG. 1, and FIG. 3 is a sectional view taken along line BB of FIG. 4 is a side sectional view comparing the heights of the conventional optical device and the optical device of the present invention mounted on an external mounting substrate, FIG. 5 is a side sectional view when the optical device is applied to double-sided mounting, and FIG. 6 is FIG. 6 is a perspective view of a case where an optical device is mounted on an external mounting substrate so as to receive and transmit side light.
【００１０】図示の如く、本実施例の光学装置は、表面
実装用の光学装置（サーフェイスマウントデバイス）に
関し、特に組立後のモジユール厚みをできるだけ薄くし
たい場合に使用されるもので、そのパツケージ１１とし
て、図１〜３の如く、リードフレームを用いずに、小
型、薄型の一体化した部品を得るためのＭｏｌｄｅｄＩ
ｎｔｅｒｃｏｎｎｅｃｔｉｏｎ Ｄｅｖｉｃｅ法（以
下、ＭＩＤ法と称す）を用いたものである。ここで、Ｍ
ＩＤ法とは、射出成形または押出し成形によつて得られ
た成形品に化学めつき等の方法で電気回路を形成したも
のをいう。As shown in the figure, the optical device of this embodiment relates to an optical device for surface mounting (surface mount device), and is particularly used when it is desired to make the module thickness after assembly as thin as possible. As shown in FIGS. 1 to 3, MoldedI for obtaining a small and thin integrated component without using a lead frame.
The connection device method (hereinafter referred to as the MID method) is used. Where M
The ID method refers to a molded product obtained by injection molding or extrusion molding and having an electric circuit formed by a method such as chemical plating.
【００１１】該パツケージ１１は、電気的絶縁性を有す
る高耐熱性の遮光性樹脂やセラミクスが使用され、一本
の有機樹脂棒として数十個のデバイスが一列に連結する
よう金型成形され、後に、図１〜３に示すようなデバイ
ス（単位部）にダイシング分割される。The package 11 is made of a highly heat-resistant light-shielding resin or ceramic having electrical insulation, and is molded as one organic resin rod so that dozens of devices are connected in a line. Later, it is diced into devices (units) as shown in FIGS.
【００１２】そして、該パツケージ１１の底部１２には
段部１２ａが形成され、これにより底部１２は、図１，
３の如く、外部実装基板１３の実装孔１４に埋め込まれ
るよう、上部１５に比べて小幅とされている。A step portion 12a is formed on the bottom portion 12 of the package 11, so that the bottom portion 12 is formed as shown in FIG.
As shown in FIG. 3, the width is smaller than that of the upper portion 15 so as to be embedded in the mounting hole 14 of the external mounting substrate 13.
【００１３】また、該パツケージ１１の上面には、逆台
錐形の凹部１６が形成され、その底面には、めっき手法
にて薄膜状の電極部１７が形成される。該電極部１７
は、すず、半田、金、銀等の鍍金表面が形成されたもの
で、前記凹部１６の底面から側面、頂面およびパツケー
ジ１１の側壁面を介して、パツケージ１１の裏面電極１
７ａにまで立体的に引きまわしされ、このうちのいずれ
か一部分が外部実装基板１３の半田付けパツドに半田接
合される。An inverted trapezoidal concave portion 16 is formed on the upper surface of the package 11, and a thin film electrode portion 17 is formed on the bottom surface by a plating method. The electrode part 17
Is a plated surface of tin, solder, gold, silver or the like. The bottom surface electrode 1 of the package 11 extends from the bottom surface of the recess 16 to the side surface, the top surface and the side wall surface of the package 11.
7a is three-dimensionally drawn, and any one of them is soldered to the soldering pad of the external mounting substrate 13.
【００１４】そして、該電極部１７に、ＬＥＤチップ等
の光学素子１９が上向きに搭載される。An optical element 19 such as an LED chip is mounted on the electrode portion 17 so as to face upward.
【００１５】なお、該電極部１７は、光学素子１９を搭
載するためのみならず、光学素子１９からの照射光を凹
部１６の傾斜壁面で反射させることにより、軸上光度を
高める機能を有する。The electrode portion 17 has a function not only for mounting the optical element 19 but also for increasing the axial luminous intensity by reflecting the irradiation light from the optical element 19 on the inclined wall surface of the concave portion 16.
【００１６】図１〜４中、２１は凹部１６に充填される
シリコン樹脂やエポキシ樹脂等の透光性封止樹脂、２２
はボンデイングワイヤである。In FIGS. 1 to 4, reference numeral 21 denotes a translucent sealing resin such as a silicone resin or an epoxy resin with which the recess 16 is filled, 22
Is a bonding wire.
【００１７】上記の光学装置は、次のように製造され
る。The above optical device is manufactured as follows.
【００１８】まず、多数のめつきグレードのパツケージ
１１を、複数デバイス分一列に並置して一体的に成形す
る。この際、各デバイス領域の上面に凹部１６を形成す
るとともに、底部１２を上部１５に比べて小幅としてお
く。First, a large number of plating grade packages 11 are arranged in a row for a plurality of devices and integrally molded. At this time, the recess 16 is formed on the upper surface of each device region, and the bottom portion 12 is made narrower than the upper portion 15.
【００１９】次に、図１の如く、凹部１６にめつき処理
を行い電極部１７を形成する。この電極部１７は、パツ
ケージ１１の側壁面を介して、パツケージ１１の裏面電
極１７ａまで引きまわししておく。Next, as shown in FIG. 1, the concave portion 16 is subjected to a plating treatment to form an electrode portion 17. The electrode portion 17 is drawn around to the back surface electrode 17a of the package 11 via the side wall surface of the package 11.
【００２０】次に、光学素子１９を電極部１７に搭載
し、ボンデイングワイヤ２２を用いてボンデイング結線
し、その上を透光性封止樹脂２１で封止する。Next, the optical element 19 is mounted on the electrode portion 17, bonding is performed using a bonding wire 22, and the upper portion is sealed with a translucent sealing resin 21.
【００２１】その後、ダイシングソーで切断してチップ
化し、図１〜３に示すＭＩＤ型光学装置を形成する。After that, it is cut into chips by a dicing saw to form the MID type optical device shown in FIGS.
【００２２】実装時には、図１の如く、パツケージ１１
の小幅とされた底部１２を、外部実装基板１３の実装孔
１４に埋め込む。そうすると、図４の如く、底部１２の
突出寸法Ｔ１を外部実装基板１３の実装孔１４の深さ寸
法（厚さ寸法）Ｔ２で吸収でき、図４中、３で示した従
来のパツケージに比べて、光学装置の外部実装基板１３
からの突出を軽減できる。なお、図１中、２５は半田で
ある。At the time of mounting, as shown in FIG.
The bottom 12 having a small width is embedded in the mounting hole 14 of the external mounting substrate 13. Then, as shown in FIG. 4, the protruding dimension T1 of the bottom portion 12 can be absorbed by the depth dimension (thickness dimension) T2 of the mounting hole 14 of the external mounting substrate 13, and compared with the conventional package shown by 3 in FIG. External mounting substrate 13 of optical device
The protrusion from the can be reduced. In FIG. 1, 25 is solder.
【００２３】しかも、パツケージ１１の底部１２を、外
部実装基板１３の実装孔１４に埋め込んだ後に半田付け
できるので、両者の位置決めが容易となつて半田リフロ
ー時の位置ずれを防止できる。Moreover, since the bottom portion 12 of the package 11 can be soldered after being embedded in the mounting hole 14 of the external mounting substrate 13, the positioning of the both can be facilitated and the positional deviation during solder reflow can be prevented.
【００２４】したがつて、高密度実装機器への組み込み
が容易となる。Therefore, it can be easily incorporated into a high-density mounting device.
【００２５】また、図５の如く、外部実装基板１３が、
両面実装タイプのものであり、かつその厚さ寸法Ｔ２が
パツケージ１１の底部１２の突出寸法Ｔ１よりも薄い場
合には、半田クリームを外部実装基板１３の裏面に塗布
して裏面配線パターンに接続しても良い。そうすると、
両面リフローが必要な外部実装基板においても、半田ペ
ースト塗布工程を一度のみで行なうことができる。ま
た、場合によつては、外部実装基板１３のうち、他の部
品２６が搭載される裏面にのみ配線パターンを配して、
その表面の配線パターンを省略でき、パターン印刷工程
が軽減する。Further, as shown in FIG. 5, the external mounting substrate 13 is
In the case of the double-sided mounting type and the thickness dimension T2 thereof is thinner than the projecting dimension T1 of the bottom portion 12 of the package 11, solder cream is applied to the back surface of the external mounting substrate 13 and connected to the back surface wiring pattern. May be. Then,
Even on an external mounting substrate that requires double-sided reflow, the solder paste application step can be performed only once. In some cases, the wiring pattern is arranged only on the back surface of the external mounting substrate 13 on which the other component 26 is mounted,
The wiring pattern on the surface can be omitted, and the pattern printing process is reduced.
【００２６】ところで、一般にチップ部品の左右両側に
半田ペーストを塗布し、後に半田リフローして熔融する
方式では、半田ペーストのリフロー時の表面張力が非常
に強いため、左右の塗布量のバランスによつては片側の
みに表面張力が働き、チップ部品が起き上がってしまう
こと（倒立現象）がある。そうすると、断線や、光学的
位置精度の劣化の原因となる。しかし、このような問題
は、本実施例の光学装置を用いることで解決できる。By the way, generally, in a method in which the solder paste is applied on both the left and right sides of the chip component and then the solder is reflowed and melted, the surface tension at the time of reflowing the solder paste is very strong. As a result, surface tension acts on only one side, causing the chip component to rise (upside down phenomenon). Then, it may cause disconnection or deterioration of optical position accuracy. However, such a problem can be solved by using the optical device of this embodiment.
【００２７】すなわち、図６の如く、パツケージ１１を
横に倒してサイド光授受として使用することで、リフロ
ー時に半田ペーストの塗布点を支点としてパツケージ１
１が起き上がろうとしても、その上部１５が底部１２よ
り大幅とされて突出しているため、上部１５がパツケー
ジ１１の起き上がりを妨げる。したがつて、パツケージ
１１の倒立現象を防止することができる。That is, as shown in FIG. 6, the package 11 is tilted sideways and used as a side light transmitter / receiver, so that the package paste 1 is used as a fulcrum during the reflow process.
Even if 1 is going to rise, the upper portion 15 is made larger than the bottom portion 12 and protrudes, so that the upper portion 15 prevents the package 11 from rising. Therefore, the inverted phenomenon of the package 11 can be prevented.
【００２８】なお、本発明は、上記実施例に限定される
ものではなく、本発明の範囲内で上記実施例に多くの修
正および変更を加え得ることは勿論である。The present invention is not limited to the above embodiment, and it goes without saying that many modifications and changes can be made to the above embodiment within the scope of the present invention.
【００２９】例えば、上記実施例では、光学素子をＬＥ
Ｄチツプ等のとしていたが、フオトダイオードやフオト
トランジスタ等の受光素子であつてもよい。For example, in the above embodiment, the optical element is LE
Although it is described as a D chip or the like, it may be a light receiving element such as a photo diode or a photo transistor.
【００３０】[0030]
【発明の効果】以上の説明から明らかな通り、本発明に
よると、パツケージの底部を小幅とし、外部実装基板の
実装孔に埋め込んで実装するので、底部の突出寸法を外
部実装基板の実装孔の深さ寸法で吸収でき、光学装置の
外部実装基板からの突出を軽減できる。したがつて、高
密度実装機器への組み込みが容易になるといつた優れた
効果がある。As is apparent from the above description, according to the present invention, since the bottom of the package has a small width and is embedded in the mounting hole of the external mounting board for mounting, the projecting dimension of the bottom corresponds to that of the mounting hole of the external mounting board. The depth dimension can be absorbed, and the protrusion of the optical device from the external mounting substrate can be reduced. Therefore, when it is easily incorporated into high-density mounting equipment, it has an excellent effect.
【図１】本発明の一実施例の光学装置において表面実装
動作を示す斜視図FIG. 1 is a perspective view showing a surface mounting operation in an optical device according to an embodiment of the present invention.
【図２】図１のＡ−Ａ断面図FIG. 2 is a sectional view taken along line AA of FIG.
【図３】図１のＢ−Ｂ断面図FIG. 3 is a sectional view taken along line BB of FIG.
【図４】従来の光学装置と本発明の光学装置を外部実装
基板に実装した場合の高さ比較をした側断面図FIG. 4 is a side sectional view showing a height comparison between a conventional optical device and an optical device of the present invention mounted on an external mounting substrate.
【図５】光学装置を両面実装に応用した場合の側断面図FIG. 5 is a side sectional view when the optical device is applied to double-sided mounting.
【図６】光学装置を外部実装基板にサイド光授受となる
ように搭載した場合の斜視図FIG. 6 is a perspective view when an optical device is mounted on an external mounting substrate so as to perform side light transmission / reception.
【図７】従来の光学装置の斜視図FIG. 7 is a perspective view of a conventional optical device.
【図８】図７のＣ−Ｃ断面図FIG. 8 is a sectional view taken along line CC of FIG.
【図９】図７のＤ−Ｄ断面図9 is a sectional view taken along line DD of FIG.
１１ パツケージ １９ 光学素子 １６ 凹部 １７ 電極部 １７ａ 裏面電極 １２ 底部 １３ 外部実装基板 １４ 実装孔 １５ 上部 11 Package 19 Optical Element 16 Recess 17 Electrode 17a Back Electrode 12 Bottom 13 External Mounting Board 14 Mounting Hole 15 Top
Claims (1)
凹部の底面に、薄膜状の電極部が形成され、該電極部に
光学素子が搭載され、前記電極部は、外部実装基板に半
田にて接続するよう前記凹部の底面から側面、パツケー
ジの上面および側壁面を介して、パツケージの裏面電極
にまで立体的に引きまわしされた光学装置において、前
記パツケージの底部に、該底部が外部実装基板の実装孔
に埋め込み可能な小幅寸法となるよう段差が形成された
ことを特徴とする光学装置。1. A recess is formed on the upper surface of the package, a thin-film electrode portion is formed on the bottom surface of the recess, an optical element is mounted on the electrode portion, and the electrode portion is soldered to an external mounting substrate. In the optical device which is three-dimensionally drawn to the back surface electrode of the package through the bottom surface of the concave portion, the top surface and the side wall surface of the recess so as to connect the bottom surface of the package to the external mounting substrate. An optical device in which a step is formed so as to have a small width size that can be embedded in the mounting hole.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4133595A JP2802411B2 (en) | 1992-05-26 | 1992-05-26 | Optical device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4133595A JP2802411B2 (en) | 1992-05-26 | 1992-05-26 | Optical device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH05327021A true JPH05327021A (en) | 1993-12-10 |
| JP2802411B2 JP2802411B2 (en) | 1998-09-24 |
Family
ID=15108488
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4133595A Expired - Fee Related JP2802411B2 (en) | 1992-05-26 | 1992-05-26 | Optical device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2802411B2 (en) |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2001069693A1 (en) * | 2000-03-17 | 2001-09-20 | Matsushita Electric Industrial Co., Ltd. | Light-emitting semiconductor device and surface-emitting device |
| EP1189291A2 (en) * | 2000-09-13 | 2002-03-20 | Citizen Electronics Co., Ltd. | Chip type light emitting diode and method of manufacture thereof |
| JP2003234507A (en) * | 2002-02-07 | 2003-08-22 | Koha Co Ltd | Side emission type led lamp |
| JP2007155714A (en) * | 2005-11-10 | 2007-06-21 | Honeywell Internatl Inc | Compact package for moving sensor sensing axis |
| US7486348B2 (en) | 2001-05-30 | 2009-02-03 | Hitachi, Ltd. | Liquid crystal display device |
| DE102008011862A1 (en) * | 2008-02-29 | 2009-09-03 | Osram Opto Semiconductors Gmbh | Miniature housing, carrier assembly with at least one miniature housing, and a method for producing a carrier assembly |
| EP2372793A1 (en) * | 2010-03-31 | 2011-10-05 | Hitachi Consumer Electronics Co. Ltd. | LED package and LED package mounting structure |
| JP2016171217A (en) * | 2015-03-13 | 2016-09-23 | シチズン電子株式会社 | Lateral face mounting type light-emitting device |
| US9458982B2 (en) | 2009-09-11 | 2016-10-04 | Rohm Co., Ltd. | Light emitting device |
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|---|---|---|---|---|
| JPS6043040A (en) * | 1983-08-15 | 1985-03-07 | Hitachi Ltd | Cooling air partition plate of rotary electric machine |
| JPS6262471U (en) * | 1985-10-09 | 1987-04-17 | ||
| JPS63182579U (en) * | 1987-05-18 | 1988-11-24 |
-
1992
- 1992-05-26 JP JP4133595A patent/JP2802411B2/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6043040A (en) * | 1983-08-15 | 1985-03-07 | Hitachi Ltd | Cooling air partition plate of rotary electric machine |
| JPS6262471U (en) * | 1985-10-09 | 1987-04-17 | ||
| JPS63182579U (en) * | 1987-05-18 | 1988-11-24 |
Cited By (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6597018B2 (en) | 2000-03-17 | 2003-07-22 | Matsushita Electric Industrial Co., Ltd. | Semiconductor light emitter and flat panel display lighting system |
| WO2001069693A1 (en) * | 2000-03-17 | 2001-09-20 | Matsushita Electric Industrial Co., Ltd. | Light-emitting semiconductor device and surface-emitting device |
| EP1189291A2 (en) * | 2000-09-13 | 2002-03-20 | Citizen Electronics Co., Ltd. | Chip type light emitting diode and method of manufacture thereof |
| KR100454777B1 (en) * | 2000-09-13 | 2004-11-05 | 가부시키가이샤 시티즌 덴시 | Chip type light emitting diode and method of manufacture thereof |
| EP1189291A3 (en) * | 2000-09-13 | 2006-03-22 | Citizen Electronics Co., Ltd. | Chip type light emitting diode and method of manufacture thereof |
| US7486348B2 (en) | 2001-05-30 | 2009-02-03 | Hitachi, Ltd. | Liquid crystal display device |
| US7714954B2 (en) | 2001-05-30 | 2010-05-11 | Hitachi, Ltd | Liquid crystal display device |
| JP2003234507A (en) * | 2002-02-07 | 2003-08-22 | Koha Co Ltd | Side emission type led lamp |
| JP2007155714A (en) * | 2005-11-10 | 2007-06-21 | Honeywell Internatl Inc | Compact package for moving sensor sensing axis |
| DE102008011862A1 (en) * | 2008-02-29 | 2009-09-03 | Osram Opto Semiconductors Gmbh | Miniature housing, carrier assembly with at least one miniature housing, and a method for producing a carrier assembly |
| US8633408B2 (en) | 2008-02-29 | 2014-01-21 | Osram Opto Semiconductors Gmbh | Miniature housing and support arrangement having at least one miniature housing |
| US9458982B2 (en) | 2009-09-11 | 2016-10-04 | Rohm Co., Ltd. | Light emitting device |
| US10084117B2 (en) | 2009-09-11 | 2018-09-25 | Rohm Co., Ltd. | Light emitting device |
| EP2372793A1 (en) * | 2010-03-31 | 2011-10-05 | Hitachi Consumer Electronics Co. Ltd. | LED package and LED package mounting structure |
| JP2016171217A (en) * | 2015-03-13 | 2016-09-23 | シチズン電子株式会社 | Lateral face mounting type light-emitting device |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2802411B2 (en) | 1998-09-24 |
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