JPH05316361A - Block distortion elimination filter - Google Patents

Abstract

PURPOSE:To reduce a step difference (block distortion) of brightness cased between blocks by detecting an edge of a picture based on a DCT coefficient distribution of the picture divided into blocks and smoothing the picture subjected to block division corresponding to the result of detection. CONSTITUTION:The filter is provided with a filter selection section 12 as a detection means detecting an edge of a picture and a filter 15 as a smoothing means smoothing a picture subjected to block division corresponding to the result of detection. That is, the filter selection section 12 observes the distribution state of the DCT coefficient for each block from the DCT coefficient stored in a DCT coefficient memory 13 and the filter 15 is controlled corresponding to the distribution state. When all DCT coefficients except the DCT coefficient on a 1st row and a 1st column of the block are O, it is discriminated to be a flat picture without an edge, the picture signal subjected to block division stored in the picture memory 16 is smoothed by a 2-dimension filter being the filter 15 selected by the filter selection section 12.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a block distortion elimination filter suitable for use in, for example, a decoder for decoding an encoded image signal.

[0002]

2. Description of the Related Art FIG. 9 is a block diagram showing a configuration of an example of a conventional encoder. For example, an image (image signal) composed of 720 pixels × 480 lines (720 pixels in the horizontal direction and 480 lines in the vertical direction) has 8 pixels × 8.
When divided into line blocks and input to the DCT circuit 42 via the motion detection circuit 51 and the subtractor 41, the DCT circuit 42 subjects the block-divided image signal to DCT (discrete cosine transform) processing. .. D
The data (DCT coefficient) output from the CT circuit 42 is zigzag scanned, input to the quantization circuit 43 and quantized, and then input to the VLC circuit 44, converted into a variable length code such as Huffman code, and buffered. Memory 45
And is output to, for example, a transmission line (not shown) at a constant transmission rate.

The data quantized by the quantization circuit 43 is I picture (intra-coded image) or P
If it is a picture (forward predictive encoded image), it is supplied to the dequantization circuit 46 and dequantized. Inverse quantization circuit 4
The data inversely quantized by 6 is further input to the inverse DCT circuit 47 and subjected to inverse DCT processing. Inverse DCT circuit 4
The data output from 7 is supplied to the frame memory (FM) 49 via the adder 48 and stored therein.

On the other hand, the motion detection circuit 51 detects the motion of the input image signal and outputs the motion vector to the motion compensation circuit 50 and the VLC circuit 44. The motion compensation circuit 50 performs motion compensation corresponding to the motion vector on the data stored in the FM 49, and outputs the data to the subtractor 41 and the adder 48. The subtractor 41 subtracts the data output from the motion compensation circuit 50 from the input image signal. As a result, a P picture is generated as a predicted image (an image serving as a reference for taking a difference) that has been previously decoded in time, and a P picture is generated, or a predicted image is temporally generated. An I or P picture that was previously located and has already been decoded,
A B picture (bidirectional predictive coded image) is generated that uses three types of images, i.e., interpolated images created from already decoded I pictures and / or P pictures that are temporally behind, as prediction images. .. The I picture is generated when only the input image signal is supplied to the DCT circuit 42 without using the data from the motion compensation circuit 50.

The adder 48 adds the motion-compensated data output from the motion compensation circuit 50 and the data supplied from the inverse DCT circuit 47, and decodes the I-picture, P-picture or B-picture decoded image. Produces FM49
Supply and store. That is, the quantization circuit 4
The image data obtained by quantizing by 2 and decoding the same data as the data supplied to the buffer memory 45 via the VLC circuit 44 is stored in the FM 49. As a result, it becomes possible to obtain P picture data or B picture data using the data stored in the FM 49.

On the other hand, the quantizing circuit 43 monitors the amount of data stored in the buffer memory 45, and the DCT prevents the amount of storage from overflowing or underflowing.
The quantization step size (quantization characteristic) for quantizing the DCT coefficient output from the circuit 42 is increased or decreased. As a result, the VLC circuit 7 causes the buffer memory 45
The amount of data (bit rate) supplied to the buffer memory changes to prevent the buffer memory 45 from overflowing or underflowing.

Further, FIG. 10 is a block diagram showing a configuration of an example of a decoder for decoding the image signal encoded by the encoder of FIG. The coded image signal transmitted at a constant transmission rate is temporarily stored in the buffer memory 1. When a code request is output from the inverse VLC circuit 2 to the buffer memory 1, the data stored in the buffer memory 1 is supplied to the inverse VLC circuit 2 and the inverse VLC circuit 2 is supplied.
It is processed. The inverse VLC circuit 2 has an inverse V of the input data.
When the LC processing is completed, the data is supplied to the inverse quantization circuit 3. And the code request is buffer memory 1
, And request transfer of new data.

The inverse quantization circuit 3 inversely quantizes the data supplied from the inverse VLC circuit 2. The quantization step size and the motion vector supplied from the inverse VLC circuit 2 to the motion compensation circuit 8 are supplied from the quantization circuit 43 and the motion detection circuit 51 to the VLC circuit 44 in the encoder of FIG. Via the memory 45,
It was transmitted.

Data output from the inverse quantization circuit 3 (D
The CT coefficient) is scanned by the inverse zigzag scanning circuit 4 in the order reverse to the zigzag scanning performed by the encoder of FIG. 1 (inverse zigzag scanning), and is output to the inverse DCT circuit 5. The inverse DCT circuit 5 performs inverse DCT processing on the data supplied from the inverse zigzag scan circuit 4. Reverse DC
When the T-processed data is I-picture data, the switch 10 selects the terminal 10a side, and 0 is supplied to the adder 6. 0 supplied from switch 10,
The data supplied from the inverse DCT circuit 5 is added by the adder 6, that is, the data supplied from the inverse DCT circuit 5 is directly supplied to the frame memory (FM) 7 and stored therein.

The data output from the inverse DCT circuit 5 is
In the case of P picture data in which an I picture is a predicted image, the switch 10 selects the terminal 10b side. Then, the I picture data is called from the FM 7, the motion is compensated in the motion compensation circuit 8, the noise is removed by the loop filter 9, and the noise is supplied to the adder 6. Adder 6
Generates the P picture data by adding the data output from the inverse DCT circuit 5 and the data output from the motion compensation circuit 8 via the loop filter 9 and the switch 10. This data is also stored in FM7.

The data output from the inverse DCT circuit 5 is B
In case of picture data, switch 10
The b side is selected. Then, the I picture or P picture data is read from the FM 7, the motion is compensated by the motion compensating circuit 8, the noise is removed by the loop filter 9, and the noise is supplied to the adder 6. The adder 6 is the inverse DCT circuit 5
The data output from the motion compensation circuit 8 via the loop filter 9 and the switch 10 is added, so that the decoded B picture data is obtained. This data is also stored in FM7.

The data (block-divided image signal) thus stored in the FM 7 is D / A converted by, for example, a D / A converter, and then supplied to a display (neither is shown) for display. It

[0013]

In the DCT circuit 42 of the encoder shown in FIG. 9, when a complex image (image signal) whose brightness changes drastically is DCT-processed, a horizontal frequency component f is obtained. _The coefficient data spread from the low frequency band to the high frequency band is output (calculated) for both the _H and vertical frequency components f _V. When such coefficient data is quantized by the quantization circuit 43 and converted into a variable-length code by the VLC circuit 44, the code (data) length becomes longer, and the amount of data stored in the buffer memory 45 (buffer Memory storage amount) increases. Therefore, since it corresponds to a complicated image signal, the quantization step in the quantization circuit 43 becomes coarse as described above. That is, when the buffer memory storage amount becomes large (there is a risk that the buffer memory 45 will overflow), the quantization circuit 43 controls the quantization characteristic so as to make the quantization step coarse.

Further, in the DCT circuit 42 of the encoder of FIG. 9, when a flat image (image signal) whose brightness changes gently or hardly changes is DCT processed, frequency components in the horizontal direction are generated. both f _H and the vertical frequency component f _V coefficient data concentrated on low frequency is output (calculated). When such coefficient data is quantized by the quantization circuit 43 and converted into a variable-length code by the VLC circuit 3, the code (data) length becomes shorter, and therefore the amount of data stored in the buffer memory 45 ( Buffer memory storage amount) decreases. Therefore, since the small change of the flat image signal is held, the quantization step in the quantization circuit 43 becomes fine as described above. That is, when the buffer memory storage amount becomes small (there is a risk that the buffer memory 45 will underflow), the quantization circuit 43
The quantization characteristic is controlled so as to make the quantization step finer.

Next, the image input to the encoder of FIG.
When the complex image is switched to the flat image, the buffer memory 45 is provided while the complex image continues.
The amount of data (buffer memory accumulated amount) stored in is a predetermined value B _max , but when the image is switched to a flat image, the data amount decreases to a predetermined value B _min (B _max > B _min ).

As described above, when the image input to the encoder of FIG. 9 is switched from a complicated image to a flat image, the buffer memory storage amount starts to decrease, but the B
It does not decrease from _max to B _min , but takes a predetermined time T to decrease. As described above, when the buffer memory storage amount is large (when the buffer memory 45 is likely to overflow), the quantization circuit 43 roughens the quantization step. Therefore, during the predetermined time T, the flat image is quantized by the coarse quantization step.

That is, in this case, for example, when the image signal of a flat image as shown in FIG. 11 is coded and decoded, it becomes an image signal as shown in FIG. 12, and a small change of the flat image signal. However, there is a problem that a large level difference in luminance, that is, block distortion occurs between blocks of a decoded image.

Therefore, there is a method of smoothing the decoded image signal to reduce block distortion (smoothing the step of luminance). In this method, the high frequency component of the image signal is lost and the image signal of the image is lost. There was a problem that the edges were blurred.

In order to prevent this, for example, "Journal of the Institute of Electronics, Information and Communication Engineers '89 / 4 Vol. J72-BI"
NO. 4 p. p377 to 384 ”, there is a method of reducing the block distortion while maintaining the edge of the image. However, in such a method, block distortion is detected from the decoded image signal, the image signal is subjected to DCT processing again, and the DCT coefficient is manipulated to perform inverse DCT processing. There was a problem that processing became difficult.

The present invention has been made in view of such a situation, and makes it possible to easily reduce (make inconspicuous) block distortion in a flat image.

[0021]

A block distortion removal filter according to claim 1 is a DCT of an image divided into blocks.
A filter selection unit 12 as a detection unit that detects an edge of an image divided into blocks from a coefficient distribution, and a filter 15 as a smoothing unit that smoothes the image divided into blocks according to the detection result of the filter selection unit 12. And is provided.

A block distortion removing filter according to a second aspect of the present invention is characterized in that the filter selecting section 12 detects the presence / absence and the direction of the edge of the block-divided image from the DCT coefficient distribution of the block-divided image. ..

A block distortion removing filter according to a third aspect of the present invention causes the filter selecting unit 12 to detect the presence or absence of an edge and the direction of the block-divided image from the DCT coefficient distribution of the block-divided image, and the filter 15 It is characterized by comprising a plurality of filters and selecting a predetermined filter from the plurality of filters in accordance with the detection result of the filter selection unit 12.

According to a fourth aspect of the present invention, the block distortion eliminating filter is characterized in that the filter 15 has at least a two-dimensional low-pass filter, a one-dimensional vertical low-pass filter and a one-dimensional horizontal low-pass filter.

[0025]

In the block distortion removing filter according to the first aspect, the edge of the block-divided image is detected from the DCT coefficient distribution of the block-divided image, and the block is divided according to the detection result of the edge. Smooth the image. Therefore, the image is smoothed without damaging the edges of the image, and thus it is possible to reduce a large luminance step (block distortion) generated between blocks of the decoded image.

In the block distortion removal filter according to the second aspect, the presence or absence and the direction of the edge of the block-divided image are detected from the DCT coefficient distribution of the block-divided image, so that the edge of the image is prevented from being damaged. To be done.

In the block distortion removal filter according to the third aspect, the presence or absence and the direction of the edge of the block-divided image is detected from the DCT coefficient distribution of the block-divided image, and the filter is detected according to the detection result. 15 selects a predetermined filter from a plurality of filters. Therefore, since the image divided into blocks by the optimum filter is smoothed, a large luminance step (block distortion) generated between blocks of the image can be reduced.

In the block distortion elimination filter according to claim 4, an image having no edges, an image having edges in the horizontal direction, by a two-dimensional low-pass filter, a one-dimensional vertical low-pass filter, or a one-dimensional horizontal low-pass filter,
Alternatively, since each image having edges in the vertical direction is smoothed, a large luminance step (block distortion) that occurs between blocks of the image can be further reduced.

[0029]

1 is a block diagram showing the configuration of an embodiment of a decoder to which the block distortion elimination filter of the present invention is applied. The parts corresponding to those in FIG. 10 are designated by the same reference numerals. The image decoding unit 20 includes an inverse DCT circuit 5, an adder 6, an FM 7, a motion compensation circuit 8, a loop filter 9, and a switch 10, as well as a filter 15 and an image memory 16. The filter 15 is controlled by the filter selection unit 12 and has a built-in 5 × 5 tap two-dimensional low-pass filter (two-dimensional filter), five-tap one-dimensional vertical low-pass filter (vertical filter), or five-tap one-dimensional horizontal low-pass filter. The filter (horizontal filter) (FIG. 2) smoothes the block-divided image signal stored in the image memory 16. Image memory 1
6 temporarily stores the image signal divided into blocks, which is supplied from the FM 7 via the filter 15.

The filter controller 30 comprises an adder 11, a filter selector 12, a DCT coefficient memory 13 and a switch 14. The adder 11 adds the DCT coefficient output from the inverse zigzag scan circuit 4 to 0 selected by the switch 14 or the DCT coefficient output from the DCT coefficient memory 13 via the filter selection unit 12. The filter selection unit 12 observes the distribution state of the DCT coefficients for each block from the DCT coefficients output from the adder 11, and controls the filter 15 according to the distribution state. The DCT coefficient memory 13 includes a filter selection unit 1
The DCT coefficient output from the adder 11 via 2 is temporarily stored.

The switch 14 operates in synchronization with the switch 10, and outputs the DC output from the inverse zigzag scan circuit 4.
When the T coefficient is obtained by subjecting the I picture data to DCT processing, the terminal 14a is selected and 0 is supplied to the adder 11. In addition, the switch 14 determines whether the DCT coefficient output from the inverse zigzag scan circuit 4 is the DCT-processed data of the P-picture with the I-picture as the prediction image or the DCT-processed data of the B-picture. If there is, the terminal 14b is selected, and the DCT coefficient stored in the DCT coefficient memory 13 is set to the filter selection unit 12
Is supplied to the adder 11 via.

Next, the operation will be described. For example, an image signal encoded by the encoder of FIG. 9 is transmitted at a constant transmission rate and temporarily stored in the buffer memory 1,
When the code request is output from the inverse VLC circuit 2 to the buffer memory 1, the data stored in the buffer memory 1 is supplied to the inverse VLC circuit 2 and subjected to the inverse VLC process. When the inverse VLC processing of the input data is completed in the inverse VLC circuit 2, the data is supplied to the inverse quantization circuit 3, the code request is output to the buffer memory 1 again, and transfer of new data is requested. ..

The inverse VLC processed data is inversely quantized in the inverse quantization circuit 3, and the inverse zigzag scanning circuit 4
Is output to. In addition, the quantization step size in the inverse quantization circuit 3 and the motion compensation circuit 8 from the inverse VLC circuit 2
The motion vector supplied to the VLC circuit is supplied from the quantization circuit 43 and the motion detection circuit 51 to the VLC circuit 44 in the encoder of FIG. 1, and is transmitted through the buffer memory 45 together with the image data.

The data output from the inverse quantization circuit 3 (D
The CT coefficient) is scanned by the inverse zigzag scanning circuit 4 in the order reverse to the zigzag scanning performed by the encoder of FIG. 1 (inverse zigzag scanning), and is output to the image decoding unit 20 and the filter control unit 30. .. Image decoding unit 20
In the inverse DCT circuit 5, the inverse zigzag scan circuit 4
The supplied data is subjected to inverse DCT processing and supplied to the adder 6. When the inverse DCT-processed data is I-picture data, the switch 10 selects the terminal 10a side, and 0 is supplied to the adder 6. The 0 supplied from the switch 10 and the data supplied from the inverse DCT circuit 5 are added by the adder 6, that is, the data supplied from the inverse DCT circuit 5 is supplied to the frame memory (FM) 7 as it is and stored. To be done.

The data output from the inverse DCT circuit 5 is
In the case of P picture data in which an I picture is a predicted image, the switch 10 selects the terminal 10b side. Then, the I picture data is called from the FM 7, the motion is compensated in the motion compensation circuit 8, the noise is removed by the loop filter 9, and the noise is supplied to the adder 6. Adder 6
In, the data output from the inverse DCT circuit 5 and the data output from the motion compensation circuit 8 via the loop filter 9 and the switch 10 are added to generate P picture data. This data is also stored in FM7.

The data output from the inverse DCT circuit 5 is B
In case of picture data, switch 10
The b side is selected. Then, the I picture or P picture data is read from the FM 7, the motion is compensated by the motion compensating circuit 8, the noise is removed by the loop filter 9, and the noise is supplied to the adder 6. In the adder 6, the inverse DC
The data output from the T circuit 5 and the data output from the motion compensation circuit 8 via the loop filter 9 and the switch 10 are added, and the decoded B picture data is output to the FM 7. The decoded B picture data is also stored in the FM7.

The data (block-divided image signal) stored in the FM 7 is supplied to the image memory 16 via the filter 15 and temporarily stored in the image memory 16.

On the other hand, when the data (DCT coefficient) supplied from the inverse zigzag scan circuit 4 to the adder 11 of the image decoding unit 30 is the I picture data subjected to the DCT process, the switch 14 switches the terminal 14a side to Selected, 0
Is supplied to the adder 11. In the adder 11, the DCT coefficient supplied from the gag zigzag scan circuit 4 and the 0 supplied from the switch 14 are added, that is, the DCT coefficient supplied from the gag zigzag scan circuit 4 is directly passed through the filter selector 12. And is output to the DCT coefficient memory 13 for storage.

When the DCT coefficient supplied from the inverse zigzag scanning circuit 4 to the adder 11 of the image decoding unit 30 is the data of the P picture in which the I picture is the predicted image is subjected to the DCT processing, or the data of the B picture. To DCT
If it has been processed, the switch 14 selects the terminal 14b, and the DCT coefficient stored in the DCT coefficient memory 13 is supplied to the adder 11 via the filter selection unit 12. In the adder 11, the DCT coefficient supplied from the gag zigzag scan circuit 4 and the filter selection unit 12
And the DCT coefficient supplied from the DCT coefficient memory 13 via the switch 14 and the DCT coefficient are added, and the filter selection unit 12
Is output to and stored in the DCT coefficient memory 13 via.

In the filter selecting section 12, the distribution state of the DCT coefficients for each block is observed from the DCT coefficients stored in the DCT coefficient memory 13, and the filter 15 is controlled according to the distribution state. That is, FIG. 3 (a)
As shown in, when all the DCT coefficients are 0 except the DCT coefficient (DC component) of the 1st row and 1st column of the block (the filled portion in the figure), the image of this block has an edge. Considered to be a flat image (Fig. 3
(B)), in the filter selection unit 12, the filter 15
On the other hand, the two-dimensional filter controls to smooth the block-divided image signal stored in the image memory 16.

Further, when all the DCT coefficients except the DCT coefficient in the first row of the block are 0 (see FIG. 4).
(A)), the image of this block is regarded as an image having edges in the vertical direction (FIG. 4 (b)), and in the filter selection unit 12, the filter 15 is a horizontal filter, and the image memory 16 is stored. Control is performed so as to smooth the stored image signal divided into blocks.

When all the DCT coefficients except the DCT coefficient in the first column of the block are 0 (FIG. 5A), the image of this block is regarded as an image having horizontal edges (FIG. 5A). 5 (b)), in the filter selection unit 12, the filter 15 is controlled by the vertical filter so as to smooth the block-divided image signal stored in the image memory 16.

When the filter selector 12 controls the filter 15 to smooth the image signal stored in the image memory 16 with a two-dimensional filter, the filter 15 blocks the image memory 16 to block. The divided flat image (FIG. 3B) is read out,
Smoothing is performed by a built-in two-dimensional filter. That is, in the filter 15, for example, as shown in FIG.
Pixels in two lines (48 pixels indicated by a circle with a hatched line in the drawing) at the boundaries of the four sides of the block are smoothed by a two-dimensional filter.

In FIG. 2, the circles filled with black are smoothed by 25 or 5 pixels surrounded by a square as a two-dimensional filter, a horizontal filter, or a vertical filter. Pixels are shown. Further, a circle mark (pixel) outside the illustrated 8 × 8 block indicates a pixel of a block adjacent to this block.

In contrast to the filter 15, a horizontal filter,
When control is performed by the filter selection unit 12 so as to smooth the image signal stored in the image memory 16, an image having edges in the vertical direction, which is divided into blocks by the image memory 16 in the filter 15 (see FIG. 4). (B)) is read out, so as not to blur the vertical edge,
Smoothing is performed by a built-in horizontal filter. That is,
In the filter 15, for example, as shown in FIG. 2, pixels of two lines at the boundary between the upper and lower two sides of the block (total of 32 pixels in each of the upper and lower two lines indicated by the circles with diagonal lines in the figure). ) Is smoothed by a horizontal filter.

The filter 15 is a vertical filter,
When control is performed by the filter selection unit 12 so as to smooth the image signal stored in the image memory 16, an image having blocks in the filter 15 and having edges in the horizontal direction is generated in the filter 15 (see FIG. 5). (B)) is read out, so as not to blur the lateral edge,
Smoothing is performed by the built-in vertical filter. That is,
In the filter 15, for example, as shown in FIG. 2, pixels of two lines on the boundary between two left and right sides of the block (two pixels on each of two lines on the right and left indicated by a hatched circle in the figure, a total of 32 pixels). ) Is smoothed by the vertical filter.

The image signal smoothed in this way is
For example, after being D / A converted by a D / A converter, it is supplied and displayed on a display (neither is shown).

Next, referring to the flowchart of FIG.
The operation of the image decoding unit 20 will be described. First, in step S1, first, the DCT coefficient output from the inverse zigzag scan circuit 4 is subjected to inverse DCT processing.
Go to 2. In step S2, reverse D in step S1
Whether the CT-processed data is P-picture data with an I-picture as a predicted image, B-picture data, or I-picture data, that is, the data subjected to the inverse DCT process in step S1 is It is determined whether or not the data has a difference from the image one frame before.

When it is determined in step S2 that the data subjected to the inverse DCT processing in step S1 is the data obtained by subtracting the difference from the image one frame before, the process proceeds to step S3. Is subjected to motion compensation, is added to the data (image data) subjected to the inverse DCT processing in step S1, and the process proceeds to step S4. Step S
When it is determined in step 2 that the data subjected to the inverse DCT processing in step S1 is not the data having the difference from the image one frame before, step S3 is skipped and the process proceeds to step S4. In step S4, the image is filtered, ie the image is smoothed and the process ends.

Further, the operation of the filter control unit 30 will be described with reference to the flowchart of FIG. First, in step S11, the DCT coefficient output from the inverse zigzag scan circuit 4 is obtained by performing DCT processing on the data of a P picture having an I picture as a predicted image,
Alternatively, whether the B-picture data is DCT-processed or the I-picture data is DCT-processed, that is, the DCT coefficient output from the inverse zigzag scan circuit 4 is the same as that of the image one frame before. It is determined whether or not the data (image data) for which the difference is taken is DCT processed.

In step S11, the DCT coefficient output from the inverse zigzag scan circuit 4 is converted into the data (image data) obtained by subtracting the difference from the image one frame before.
When it is determined that the T processing has been performed, step S1
2 and output D from the inverse zigzag scan circuit 4.
The DCT-processed image data of one frame before is added to the CT coefficient, and the process proceeds to step S13. Step S
When it is determined in 11 that the DCT coefficient output from the inverse zigzag scan circuit 4 is not the DCT-processed data (image data) obtained by subtracting the difference from the image one frame before, step S12 is skipped. And proceeds to step S13.

In step S13, the DC of the block
The T coefficient distribution is observed, and the DCT of the first row and first column of the block
It is determined whether or not all the DCT coefficients are 0, except for the coefficient (DC component) (the portion painted black in FIG. 3A). If it is determined in step S13 that all the DCT coefficients except the DCT coefficient (DC component) in the first row and first column of the block are 0, the process proceeds to step S14, and the filter 15 (step S4 in FIG. 6) is used. Control is performed so that the image is filtered (smoothed) by the two-dimensional filter (FIG. 2), and the process ends.

In step S13, all DCs except the DCT coefficient (DC component) in the first row and first column of the block
If it is determined that the T coefficient is not 0, the process proceeds to step S15, and all the D except the DCT coefficient (the black-painted portion in FIG. 4A) of the first row of the block
It is determined whether or not the CT coefficient is 0. Step S1
When it is determined in step 5 that all the DCT coefficients except the DCT coefficient in the first row of the block are 0, the process proceeds to step S16 and the filter 15 (step S4 in FIG. 6).
The control is performed so that the image is filtered (smoothed) by the horizontal filter (FIG. 2), and the process ends.

When it is determined in step S15 that all the DCT coefficients except the DCT coefficient in the first row of the block are not 0, the process proceeds to step S17, and the DCT coefficient in the first column of the block (see FIG. 5A). In, it is determined whether or not all the DCT coefficients are 0, except for the black-painted portion). When it is determined in step S17 that all the DCT coefficients except the DCT coefficient in the first column of the block are 0, the process proceeds to step S18,
The filter 15 (step S4 in FIG. 6) is controlled so that the image is filtered (smoothed) by the vertical filter (FIG. 2), and the process ends.

If it is determined in step S17 that all the DCT coefficients except the DCT coefficient in the first column of the block are not 0, the process proceeds to step S19 and the filter 1
In step 5 (step S4 in FIG. 6), control is performed so that the image is not filtered (smoothed), and the process ends.

FIG. 8 shows the S / N of the image when the image is smoothed in this way. From the figure, the S / N of the image subjected to the smoothing is improved by about 0.8 dB as compared with the S / N of the image not subjected to the smoothing (indicated by a dotted line in the figure). I understand.

As described above, the presence or absence and the direction of the edge in the block-divided image are detected from the distribution state of the DCT coefficients obtained by subjecting the image signal to the DCT, and the edge is smoothed so as not to blur. , Image S
Block distortion can be reduced without degrading / N.

In this embodiment, the filter 15
In this case, the pixels of the block boundary 2 lines (FIG. 2) are smoothed. However, for example, the pixels of the block boundary 1 line or the block boundary 3 lines are smoothed. be able to. Further, the filter selection unit 12 detects the presence or absence of the edge and the direction of the image of the block only in the first row or the first column of the block. In this way, the DCT of a part of the block is detected. Not only the coefficient but also the DCT coefficient of the entire block can be used to detect the presence or absence and the direction of the edge of the image of the block.

[0059]

According to the block distortion removal filter of the first aspect, the edge of the block-divided image is detected from the DCT coefficient distribution of the block-divided image, and the block division is performed according to the detection result. The smoothed image is smoothed. Therefore, the image is smoothed without damaging the edges of the image, and thus it is possible to reduce a large luminance step (block distortion) generated between blocks of the decoded image.

According to the block distortion removal filter of the second aspect, the presence or absence of the edge and the direction of the block-divided image are detected from the DCT coefficient distribution of the block-divided image, so that the edge of the image may be damaged. To be prevented.

According to the block distortion removal filter of the third aspect, the presence or absence of the edge and the direction of the block-divided image are detected from the DCT coefficient distribution of the block-divided image, and the detection result is detected in accordance with the detection result. The smoothing means selects a predetermined filter from the plurality of filters. Therefore, since the image divided into blocks by the optimum filter is smoothed, a large luminance step (block distortion) generated between blocks of the image can be reduced.

According to the block distortion removing filter of the fourth aspect, an image having no edges, an image having edges in the horizontal direction, by a two-dimensional low-pass filter, a one-dimensional vertical low-pass filter, or a one-dimensional horizontal low-pass filter,
Alternatively, since each image having edges in the vertical direction is smoothed, it is possible to reduce a large luminance step (block distortion) generated between blocks of the image without deteriorating the S / N of the image.

[Brief description of drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of a decoder to which a block distortion removal filter of the present invention is applied.

FIG. 2 is a diagram for explaining smoothing (filtering) of a block-divided image in the filter 15 of the embodiment of FIG.

FIG. 3 is a diagram showing a flat image and a distribution of DCT coefficients of the flat image.

FIG. 4 is a diagram showing an image having vertical edges and a distribution of DCT coefficients of an image having vertical edges.

FIG. 5 is a diagram showing an image having edges in the horizontal direction and a distribution of DCT coefficients of an image having edges in the horizontal direction.

FIG. 6 is a flowchart for explaining the operation of the image decoding unit 20 in the embodiment of FIG.

FIG. 7 is a flowchart for explaining the operation of the filter control unit 30 of the embodiment of FIG.

FIG. 8 is a diagram showing S / N of an image subjected to smoothing processing.

FIG. 9 is a block diagram showing a configuration of an example of a conventional encoder.

FIG. 10 is a block diagram showing a configuration of an example of a conventional decoder.

FIG. 11 is a diagram showing a change in luminance of a flat image.

12 is a diagram for explaining that block distortion occurs when the image of FIG. 12 is encoded by the encoder of FIG. 9.

[Explanation of symbols]

 1 Buffer Memory 2 Inverse VLC Circuit 3 Inverse Quantization Circuit 4 Inverse Zigzag Scan Circuit 5 Inverse DCT Circuit 6 Adder 7 Frame Memory (FM) 8 Motion Compensation Circuit 9 Loop Filter 10 Switch 11 Adder 12 Filter Control Section 13 DCT Coefficient Memory 14 switch 20 image decoding unit 30 filter control unit 41 subtractor 42 DCT circuit 43 quantization circuit 44 VLC circuit 45 buffer memory 46 inverse quantization circuit 47 inverse DCT circuit 48 adder 49 frame memory (FM) 50 motion compensation circuit 51 motion Detection circuit

Claims (4)

[Claims] 1. A detection unit for detecting an edge of the block-divided image from a DCT coefficient distribution of the block-divided image, and smoothing the block-divided image corresponding to a detection result of the detection unit. A block distortion removing filter, which comprises: 2. The block distortion removal filter according to claim 1, wherein the detection means detects the presence or absence of an edge and the direction of the block-divided image from the DCT coefficient distribution of the block-divided image. .. 3. The detecting means detects the presence or absence of an edge and the direction of the block-divided image from the DCT coefficient distribution of the block-divided image, and the smoothing means is configured to have a plurality of filters. The block distortion removal filter according to claim 1, wherein a predetermined filter is selected from the plurality of filters in accordance with a detection result of the detection means. 4. The block distortion removing filter according to claim 3, wherein the smoothing unit includes at least a two-dimensional low-pass filter, a one-dimensional vertical low-pass filter, and a one-dimensional horizontal low-pass filter.