JPH05313183A - Liquid crystal display device and method for repairing same - Google Patents

Abstract

PURPOSE:To provide a structure and the method which can easily repair a connection defect, caused after an IC is mounted on a liquid crystal panel, without contacting a transparent electrode which causes the connection defect of the liquid crystal panel. CONSTITUTION:A migration material 106 is provided between a transparent electrode 104 and the bump 103 of the IC 101. Further, a 1st waveform is applied to one terminal of the connection defect part between the IC and transparent electrode and a 2nd waveform which is opposite in phase from the 1st waveform is applied to a transparent electrode group facing a transparent electrode which is excellently connected across a liquid crystal layer; and the 2nd waveform is thus applied to the other end of the connection defect part through a coupling capacitance to the transparent electrode which causes the connection defect.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure of a liquid crystal display device having a structure capable of repairing a defective connection with a semiconductor integrated circuit device (hereinafter referred to as an IC) and a method of repairing the liquid crystal display device. For more information, use an electrical signal to IC
The present invention relates to a liquid crystal display device having a structure for repairing the connection failure and the method for repairing the connection failure part of the liquid crystal display device.

[0002]

2. Description of the Related Art There are two main methods of connecting the transparent electrodes of a matrix type liquid crystal panel and the output terminals of an IC for driving the liquid crystal.

First, as a first connection method, a plurality of ICs are used.
There is a method of forming a liquid crystal drive circuit including the above and connecting it to a transparent electrode of a matrix type liquid crystal panel by using a flexible plate-shaped resin provided with a wiring pattern (hereinafter referred to as FPC). A typical method is to arrange the IC on the FPC (hereinafter referred to as TAB).

On the other hand, as a second connection method, an IC is mounted on the glass of the liquid crystal panel and the transparent electrode and the terminal of the IC are directly connected (hereinafter referred to as COG, CO
G is an acronym for Chip on Glass).

FIG. 7 shows a plan view of a liquid crystal panel in which two ICs are mounted by this COG method. As shown in FIG.
The signal electrode driving IC 701 is mounted on the lower glass 703 having the signal electrode formed on the upper surface by the COG method with the connection terminal surface facing downward.

Similarly, the scan electrode drive IC 702 is mounted on the upper glass 704 having the scan electrodes formed on the lower surface by the COG method with the connection terminal surface facing upward.

The display portion 705 of the liquid crystal panel includes a lower glass 7
03 at the intersection of the upper glass 70 and the upper glass 70
The liquid crystal layer is sandwiched between 4 and the lower glass 703.

An external circuit for generating a power source, a control signal, etc. and the signal electrode driving IC 701 are connected by an FPC 706 via a transparent electrode on a lower glass 703 connected to an input terminal.

Although the number of transparent electrodes required for this FPC connection is about ten or more, the FPC connection is extremely simplified as compared with the TAB method in which several hundred signal electrodes and FPCs must be connected. There are advantages.

The same applies to the FPC 707 that connects the scan electrode driving IC 702 and an external circuit.

As the electrode pitch becomes finer, TA
While it becomes technically difficult to connect the FPC such as B to the transparent electrode for display, in COG, the driving IC is mounted on the glass. It is very easy to connect with the panel.

However, conventionally, when some connection failure occurs between the output terminal of the IC and the electrode formed on the glass, the IC is replaced or the probe is brought into contact with the electrode to repair the connection failure. ..

This repairing method will be described with reference to FIG. FIG. 8 shows a cross-sectional view of the vicinity of the connection between the liquid crystal driving IC and the transparent electrode.

As shown in FIG. 8, an IC 80 for driving a liquid crystal
1 has a circuit formed on a silicon substrate facing downward. That is, the surface of the IC 801 on which the circuit element is formed is arranged on the surface side facing the glass.

Aluminum pad 8 at the output terminal of IC 801
02, a bump 803 of a protrusion provided to make a direct connection with the transparent electrode 804 formed on the glass 805.
To form.

Transparent electrodes 804 and bumps 80 of the liquid crystal panel
3 is bonded with a conductive adhesive (not shown) such as silver paste.

To repair the connection failure, the probe 8 is used.
06 is brought into contact with the transparent electrode 804, a voltage is applied between the IC 801 and the probe 806, and a current 807 is caused to flow.

The portion where the connection failure is likely to occur is at the interface between the aluminum pad 802 and the bump 803 or at the bump 80.
3 and the transparent electrode 804.

It is considered that the cause of the connection failure is that an insulating thin film such as an oxide film is formed on the interface or the adhesive surface. Therefore, a current 807 is passed to destroy these insulating materials by heat generation, etc., and the connection is restored.

[0020]

However, in the above method, when the liquid crystal panel is downsized and the wiring pattern on the glass 805 shown in FIG.
It is very difficult to bring 06 into contact with the transparent electrode 804 having a fine pattern size.

Further, due to the miniaturization of the liquid crystal panel, the gap between the liquid crystal driving IC 801 and the other glass end surface facing the mounting glass 805 is narrowed,
When the IC 801 is adhered and then covered with an epoxy resin such as a molding agent, there is also a problem that there is no place to contact the probe 806.

An object of the present invention is to solve the above problems and to provide a structure and a method capable of easily repairing a defective connection portion in a non-contact manner.

[0023]

In order to achieve the above object, the following structure and method are adopted in the present invention.

The liquid crystal display device of the present invention has an IC connection structure in which bumps are laminated between electrodes formed on glass and ICs to electrically connect the transparent electrodes to the ICs. It is characterized by a structure in which a migration substance that easily causes migration is arranged.

According to the method of repairing a defective portion of a liquid crystal display device of the present invention, a first waveform is applied to a defective connection portion of an IC, and a well-connected electrode has a polarity opposite to that of the first waveform. The waveform of No. 2 is applied, and a waveform having the same potential as the second waveform is applied to the electrode groups facing each other across the liquid crystal layer to repair the defective connection.

[0026]

[Function] A migration substance is provided between the transparent electrode and the bump. Further, the first waveform is applied to one end of the connection failure portion to which the liquid crystal driving IC is connected. On the other hand, the second waveform is applied to the adjacent electrode and the counter electrode group, which are well connected, and the second waveform is applied to the other end of the connection failure portion by capacitive coupling. As a result, an AC current flows through the defective connection,
It is possible to repair the poor connection.

[0027]

EXAMPLE The structure of a liquid crystal display device in an example of the present invention will be described with reference to FIG. 1A and 1B show the vicinity of a connecting portion between a liquid crystal panel and an IC, FIG. 1A is a cross-sectional view from a side surface, and FIG.

As shown in FIG. 1, bumps 103, which are protruding electrodes, are provided on aluminum pads 102, which are input / output terminals of the IC 101. The bump 103 is the lower glass 1
05 is connected to the transparent electrode 104 formed on. Further, a migration substance 106 that easily causes migration is provided between the bump 103 and the transparent electrode 104.

When connection failure occurs in this liquid crystal display device, IC 101 to aluminum pad 102 and bump 1
03, the migration substance 106, the electric current is passed through the path of the transparent electrode 104.

This current causes migration to bring the bump 103 and the transparent electrode 104 into conduction, thereby repairing the connection failure.

When the current is an alternating current, the migration grows in both directions of the bump 103 and the transparent electrode 104, so that it is not necessary to consider the direction of the current.

The migration substance 106 is previously arranged on the adhesive portion by a printing method or an etching method.

When a conductive adhesive such as a silver paste is used to bond the bump 103 and the transparent electrode 104, silver easily migrates.
The migration substance 106 does not need to be specially arranged.

However, it is effective to provide the migration substance 106 when adhering with a substance such as a conductive organic substance which hardly causes migration.

No treatment is required for a liquid crystal display device which is well connected, but migration is caused in the defective connection portion by using the migration substance 106 by the method of the present invention. IC101 and transparent electrode 1
Restores continuity with 04.

The present invention can also be applied to TAB, and if a migration substance is arranged between the transparent electrode and the FPC, or between the liquid crystal driving IC and the FPC,
Similar to the above description, the connection failure can be repaired.

In this embodiment, a high frequency electric field is applied to the defective connection portion, and the occurrence of migration is used to restore conduction. Migration is a phenomenon that easily occurs in silver or the like, and atoms on the interface move so that the energy on the interface decreases.

Conventionally, migration is known to have caused a short circuit in an electric circuit, and easily occurs at high frequencies.

In this embodiment, it is considered that the migration grows like a whisker along the electric field to secure the conduction path.

However, in addition to migration, conduction can be obtained by destruction of the insulating film due to an electric field or local heat generation. Further, if the current continues to flow after the conduction is restored by the migration, there is an effect that the connection is stabilized by the heat generated in the connection failure part.

In the embodiment of the present invention, a method for supplying a current to a defective connection will be described with reference to FIGS. For convenience of explanation, it is assumed that there is a poor connection between the signal electrode driving IC and the transparent electrode of the liquid crystal panel.

FIG. 2 is a timing chart, and FIG.
Is an IC for driving the signal electrode to the terminal that is causing the connection failure.
2B shows a first waveform V1 output from the IC, FIG. 2B shows a second waveform V2 output from the signal electrode driving IC to a terminal having a good connection, and FIG. A waveform V3 output from the scan electrode driving IC is shown to the scan electrode groups facing each other with the layer in between, and FIG. 2D shows a waveform V4 applied to the connection failure part.

As shown in FIG. 2, the second waveform V2 has a polarity opposite to that of the first waveform V1, and the waveform V3 of the opposing electrode group has the same potential as the second waveform V2. ..

As a result, the first waveform V1 can be applied to one end of the poor connection portion, and the waveform V3 having the same potential as the second waveform V2 can be applied to the other end by capacitive coupling.

In FIG. 2D, the amplitude is drawn small in order to clearly show the voltage drop caused by capacitive coupling or the like.

FIG. 3 is an enlarged view showing the electrode arrangement in the upper left corner area of the liquid crystal display section in the embodiment of the present invention. In FIG. 3, the signal electrodes S1, S2, S3 and the scan electrodes C1, C
2 and C3 are orthogonal.

In the following description, for the sake of explanation, it is assumed that a poor connection occurs between the signal electrode S2 and the S2 output terminal of the signal electrode driving IC. In addition, the signal electrode S
1, 1 and 3 are satisfactorily connected to the signal electrode driving IC, and the scanning electrodes C1, C2, and C3 correspond to a part of the electrode group facing each other across the liquid crystal layer.

FIG. 4 shows an equivalent circuit in the vicinity of the defective connection portion of the liquid crystal display device according to the embodiment of the present invention.

As shown in FIG. 4, the output 402 of the signal electrode driving IC is connected to one end of the poor connection portion 401, and the signal electrode S2 is connected to the other end.

The signal electrode S1 and the signal electrode S2 are connected by capacitive coupling 404 generated between the parallel wirings adjacent to each other. Similarly, the signal electrode S3 and the signal electrode S2 are also capacitively coupled 40.
Connected with 3.

The signal electrode S2 and the scanning electrode group (C1, C2,
C3, etc.) 405 are connected by capacitive coupling 406 generated in the thin liquid crystal layer at the intersection.

In FIG. 4, the first waveform V1 shown in FIG. 2 is applied from the output 402 of the IC for driving the signal electrode to one end of the connection failure portion 401.

On the other hand, the second waveform V2 shown in FIG. 2 (scan electrode group V3) is applied to the scan electrode group 405 facing the well-connected signal electrode S1 and signal electrode S3, and capacitive coupling 404 is applied. , 403, 406 through the connection failure portion 40
A voltage waveform is applied to the other end of 1.

The frequency of the first waveform V1, the second waveform V2, and the counter electrode waveform V3 is 10 MHz, and the entire capacitive coupling is 10 MHz.
If 0 pF is set, the impedance of capacitive coupling is 2π / (10 MHz × 100 pF) to 100Ω.

As a result, the influence of capacitive coupling becomes almost the same as the wiring resistance of the electrodes, and a sufficient voltage can be applied to repair the defective connection, and an alternating current can be passed.

The signals given to the liquid crystal drive IC will be described more specifically with reference to FIGS. 5 and 6. FIG. 5 is a circuit diagram showing a liquid crystal driving IC and a liquid crystal display unit. FIG.
(B) is an output block of the IC for driving the signal electrode, FIG.
FIG. 7C is a circuit diagram showing output blocks of the scan electrode driving IC.

As shown in FIG. 5A, the display portion 501 of the liquid crystal panel has n signal electrodes S1, S2, S3, ..., S.
There are n and m scan electrodes C1, C2, C3, ..., Cm.

A defective connection portion 50 indicated by a circle in FIG. 5 (a).
2 is between the IC output for driving the signal electrode and the signal electrode S2.

The signal electrode driving IC includes a reading memory 503, a driving memory 506, and n output blocks 5.
08 and.

Data 50 is stored in the reading memory 503.
4 and the shift clock 505 are input to the input terminal D and the input terminal CK, respectively, and there are n output terminals Q1 to Qn.

In the driving memory 506, the latch clock 507 is input to the input terminal CK, and the reading memory 50
There are data input terminals D1 to Dn and n output terminals Q1 to Qn connected to the outputs Q1 to Qn, respectively.

The n output blocks 508 have outputs Q1 to Qn of the driving memory 506 and an AC signal 5 respectively.
09 and the output terminals are connected to the signal electrodes S1 to Sn. Here, the output block for S2 is connected to the connection failure part 502.

Further, the scan electrode driving IC has a shift register 510 and m output blocks 513.

In the shift register 510, the start signal 511 and the shift clock 512 are input to the input terminal D and the input terminal CK, respectively, and the m output terminals Q1 to Q1.
There is Qm.

The outputs Q1 to Qm of the shift register 510 and the AC signal 514 are input to the m output blocks 513, and the output terminals are connected to the scan electrodes C1 to Cm.

First, a general display method will be outlined with reference to FIG.

In the period from the input of the first latch clock 507 to the input of the next latch clock 507 (hereinafter referred to as the first horizontal scanning period), in synchronization with the shift clock 505, The display memory 503 reads the display data 504, stores it in the corresponding memory area in the order of 1, 2, ...
Output from Qn.

At the next horizontal scanning cycle (hereinafter referred to as the second horizontal scanning period) after the input of n pieces of data is completed, the second latch clock 507 is inputted and the outputs Q1 to Q1 of the reading memory 503 are inputted. Qn is the driving memory 506
Read in batch and output the values from Q1 to Qn.

The n output blocks 508 are driven based on the display data of the first horizontal scanning period between the outputs Q1 to Qn of the driving memory 506 and the AC signal 509 and the second horizontal scanning period. Create a waveform.

On the other hand, in the second horizontal scanning period, the reading memory 503 reads the data 504 to be displayed in the next horizontal period in the same manner as in the first horizontal scanning period.

In the second horizontal scanning cycle, the scanning electrode C
1 to Cm is selected, the selection signal and the output waveform of each output block 508 of the IC for driving the signal electrode are combined, and a waveform that determines the transmittance is applied to the pixel on the selected scanning electrode. To do.

Every time the scan electrodes selected by the shift clock 512 of the scan electrode driving IC synchronized with the latch clock 507 are sequentially moved, the above-mentioned signal electrode drive is repeated to select all the scan electrodes (hereinafter referred to as vertical scan electrodes). (Referred to as scanning). Further, vertical scanning is repeated to display the entire screen.

FIG. 5B is a circuit diagram showing the circuit configuration of one of the n output blocks 508 of the signal electrode driving IC shown in the circuit diagram of FIG. 5A.

The exclusive OR 515 receives the output 516 of the driving memory 506 and the AC signal 509 and outputs it to the level shifter 517. The exclusive OR 515 controls the switching of the output 516 of the driving memory 506 between normal and inversion depending on the polarity of the alternating signal 509. The level shifter 517 converts the output of the exclusive OR 515 into a voltage for driving the liquid crystal.

FIG. 5C is a circuit diagram showing the circuit configuration of one of the m output blocks 513 of the scan electrode driving IC shown in the circuit diagram of FIG. 5A.

The exclusive OR 518 receives the selection timing 519 and the AC signal 514 and outputs it to the level shifter 520.

Further, the selection timing 519 is input to the inverter 521 and the control terminal of the switch SW2, and the output of the inverter 521 is connected to the control terminal of the switch SW1.

One end of the switch SW1 is connected to the liquid crystal driving ground GND, and the other end thereof is connected to the block output 522.

The level shifter 5 is provided at one end of the switch SW2.
The output of 20 and the other end are connected to the block output 522 together with the switch SW1.

When the selection timing 519 becomes the logical value indicating the selected state, the switch SW2 becomes conductive. At the same time, based on the polarity of the alternating signal 514, the exclusive OR 51
8, the output polarity is determined, and the level shifter 520 outputs the voltage converted for driving the liquid crystal from the block output 522.

Further, when the selection timing 519 becomes a logical value indicating the non-selected state, the switch SW1 is turned on and the liquid crystal driving ground GND is output from the block output 522.

A method of obtaining a desired output waveform with the above circuit will be described with reference to the circuit diagram of FIG. 5 and FIG. Figure 6
6 is a timing chart showing signals applied to the circuit shown in FIG. 5 and output waveforms.

FIG. 6A shows I for driving the signal electrode.
The latch clock 507 input to C is shown, (b) shows the shift clock 505 of the IC for driving the signal electrode,
(C) is a memory 50 for reading the IC for driving the signal electrode
3 shows data 504 to be input to (3), (d) shows an alternating signal 509 to be input to an IC for driving a signal electrode, (e)
Shows the output V2 to the signal electrodes (S1, S3, etc.) that are well connected, (f) shows the output V1 of the output terminal for the signal electrode S2, and (g) shows the output V3 to the scan electrode group. And (h) is a waveform showing a difference between the output (f) for the signal electrode S2 and the output of (e) to the signal electrodes S1, S2, etc. (or (g) the output waveform to the scanning electrode group). is there.

As shown in FIG. 6, there are two latch clocks 507 in (a), n clocks in shift clock 505 in (b), and shift clock 505 shown in (b) in data 504 in (c). There is one pulse at the second pulse position of.

As a result, when n shift clocks are input, Q1 and Q3 to Qn of the read memory 503 output a low level and Q2 outputs a high level.

Then, when the second latch clock 507 is input, the output of the driving memory 506 is Q1 and Q3.
Qn becomes low level and Q2 becomes high level.

Therefore, the waveform V2 of the well-connected output in (e) has the same phase as the AC signal. The action of the level shifter is omitted.

On the other hand, the output V1 of the output terminal for the signal electrode S2 in (f) has a phase opposite to that of the alternating signal. The output signal V3 of the scan electrode group in (g) can be obtained by short-circuiting all input terminals including the power supply of the scan electrode driving IC and applying the alternating signal in (d). The waveform of (h) can be obtained by taking the difference of (e) to (g) from (f).

In this way, the waveform shown in FIG. 6 (h) can be applied to the defective connection portion, and V4 shown in FIG. 2 (d) is obtained in consideration of the attenuation due to the transmission path.

However, even if the signal voltage is 5V which is the normal IC operating voltage, the peak value in FIG. 6 (h) is doubled to 10V, and the restoration process can be sufficiently performed even if the attenuation is taken into consideration.

When there is a connection failure on the scan electrode side in the circuit configuration of FIG. 5, the output block connected to the defective portion is selected, the first waveform is output, and the scan electrode drive IC is connected properly. From the output block that is taken, ground GND
Is output to output the second waveform.

The signal electrode driving IC may apply the second waveform to all input terminals including the power source. In this way, even if there is a connection failure on the scan electrode side, the defective portion can be repaired.

In FIG. 5, when the first scan waveform is applied to the poor connection portion, even if the opposing scan electrode groups are fixed at the ground level (center voltage of the first waveform), the same as in the present invention. An alternating current can be applied to the defective connection.

However, since the voltage amplitude is half that of the present invention, the effect is halved. Signal electrode drive IC
Output the first waveform to the whole and scan electrode drive IC
Even if the second waveform is output to the whole, the alternating current can be applied to the defective connection portion, but the electrical energy is dispersed and the efficiency is further deteriorated.

The present invention can be applied to a mounting method such as TAB. Similar effects can be obtained by applying the waveform of the present invention to the connection between the FPC and the electrode on the glass or the connection between the FPC and the driving IC.

Even when a connection failure occurs between the FPC of the COG and the glass, a high frequency is applied to the input causing the connection failure by analogy with the present invention, and the other inputs are fixed to a certain potential. You can leave it.

[0097]

As is apparent from the above description, since the present invention uses only the input terminals including the power source of the liquid crystal driving IC for repairing the defective connection, it is possible to directly contact the electrodes. Absent. Further, since a voltage equal to or lower than that for turning on the liquid crystal panel is applied to the power source and the signal, the defective connection portion can be easily repaired without destroying the drive IC.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing the vicinity of an IC connecting portion of a liquid crystal display device according to an embodiment of the present invention.

FIG. 2 is a timing chart showing a method of repairing a liquid crystal display device according to an embodiment of the present invention.

FIG. 3 is a plan view showing electrodes in an upper left corner region of a liquid crystal display unit in an example of the present invention.

FIG. 4 is a circuit diagram showing an equivalent circuit in the vicinity of a defective connection portion of the liquid crystal display device in the example of the present invention.

FIG. 5 is an IC for driving a liquid crystal display device according to an embodiment of the present invention.
3 is a circuit diagram showing a liquid crystal panel, an output block of an IC for driving a signal electrode, and an output block of an IC for driving a scan electrode. FIG.

FIG. 6 is a timing chart of a circuit of the liquid crystal display device in the example of the present invention.

FIG. 7 is a plan view showing a conventional COG-mounted liquid crystal panel.

FIG. 8 is a cross-sectional view showing the vicinity of a defective connection portion in a conventional repair method.

[Explanation of symbols]

 101 IC 103 Bump 104 Transparent Electrode 105 Glass 106 Migration Material

Claims (2)

[Claims] 1. In an IC connection structure in which a bump is laminated between a transparent electrode formed on glass and an IC to electrically connect the transparent electrode and the IC, migration occurs between the transparent electrode and the bump. A liquid crystal display device characterized by disposing a migration substance which is likely to occur. 2. The liquid crystal display device according to claim 1, wherein
The first waveform is applied to the poorly connected portion of the IC, and the second waveform having the opposite polarity to the first waveform is applied to the well-connected electrodes, and the electrodes facing each other across the liquid crystal layer are applied. Is a method for repairing a liquid crystal display device, wherein a defective connection portion is repaired by applying a waveform having the same potential as the second waveform.