JPH05300039A - Receiver - Google Patents
ReceiverInfo
- Publication number
- JPH05300039A JPH05300039A JP10629692A JP10629692A JPH05300039A JP H05300039 A JPH05300039 A JP H05300039A JP 10629692 A JP10629692 A JP 10629692A JP 10629692 A JP10629692 A JP 10629692A JP H05300039 A JPH05300039 A JP H05300039A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- electric field
- rssi
- amplifier
- mixer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Circuits Of Receivers In General (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、電圧検出回路出力信号
を有する受信装置に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a receiver having a voltage detection circuit output signal.
【０００２】[0002]
【従来の技術】従来、この種の受信装置は、図４に示す
ように構成されていた。この受信装置は、アンテナ１
と、送受信部２と、制御部３とから構成されている。ま
た、送受信部２は、送信部３、分配器４、ＲＦ（高周
波）アンプ５、ＲＦフィルタ６、第１段ミキサ７、第１
段ＩＦ（中間周波）フィルタ８、第２段ミキサ９、第２
段ＩＦフィルタ１０、ＩＦ検波ＩＣ１１とで構成されて
いる。制御部１３は、ゲートアレイ１４、制御回路１
６、メモリ２０とで構成されている。Ｓ１はＲＳＳＩ
（電界検出回路出力）信号、Ｓ２はＲＳＳＩデータ、Ｓ
３は補正後のＲＳＳＩデータである。2. Description of the Related Art Conventionally, this type of receiving apparatus has been constructed as shown in FIG. This receiving device has an antenna 1
And a transmission / reception unit 2 and a control unit 3. The transmitter / receiver 2 includes a transmitter 3, a distributor 4, an RF (high frequency) amplifier 5, an RF filter 6, a first stage mixer 7, and a first mixer.
Stage IF (intermediate frequency) filter 8, second stage mixer 9, second stage
It is composed of a stage IF filter 10 and an IF detection IC 11. The control unit 13 includes a gate array 14 and a control circuit 1.
6 and a memory 20. S1 is RSSI
(Electric field detection circuit output) signal, S2 is RSSI data, S
3 is the corrected RSSI data.
【０００３】この従来の装置によると、ＲＦアンプ５の
利得や、第１段ミキサ７、第２段ミキサ９の変換利得が
一定であったため、電界強度の強いところで受信する
と、ＩＦ検波ＩＣ１１に対して過大入力となるため、Ｉ
Ｆ検波ＩＣ１１のＲＳＳＩ信号が飽和してしまい、ＲＳ
ＳＩ信号のダイナミックレンジが狭くなるといった不具
合があった。その結果、精度の高い受信電界強度の表示
が行なえないといった問題があった。According to this conventional device, since the gain of the RF amplifier 5 and the conversion gains of the first-stage mixer 7 and the second-stage mixer 9 are constant, when the signal is received at a strong electric field strength, the IF detection IC 11 is received. And input becomes excessive, so I
The RSSI signal of the F detection IC 11 is saturated and RS
There was a problem that the dynamic range of the SI signal was narrowed. As a result, there is a problem in that the received electric field strength cannot be displayed with high accuracy.
【０００４】[0004]
【発明が解決しようとする課題】従来の受信装置では、
上述の如くＲＦアンプ５の利得や、第１段ミキサ７、第
２段ミキサ９の変換利得が一定であったため、電界強度
の強いところで受信すると、ＩＦ検波ＩＣ１１に対して
過大入力となるため、ＩＦ検波ＩＣ１１のＲＳＳＩ信号
が飽和してしまい、ＲＳＳＩ信号のダイナミックレンジ
が狭くなり、精度の高い受信電界強度の表示が行なえな
い問題点があった。In the conventional receiving apparatus,
Since the gain of the RF amplifier 5 and the conversion gains of the first-stage mixer 7 and the second-stage mixer 9 are constant as described above, if the signal is received at a strong electric field strength, the IF detection IC 11 has an excessive input. The RSSI signal of the IF detection IC 11 is saturated, the dynamic range of the RSSI signal is narrowed, and there is a problem that the reception electric field strength cannot be displayed with high accuracy.
【０００５】本発明は、上記の様な欠点を改善するため
になされたものであり、ＲＳＳＩ信号のダイナミックレ
ンジが広く、より精度の高い受信電界強度の表示が行な
うことのできる受信装置を提供することを目的とする。The present invention has been made in order to improve the above-mentioned drawbacks, and provides a receiving device which has a wide dynamic range of an RSSI signal and can display the received electric field strength with higher accuracy. The purpose is to
【０００６】[0006]
【課題を解決するための手段】上記目的を達成するため
本発明は、高周波アンプ、ミキサ、中間周波検波回路を
有する送受信部と、電界検出回路出力信号の補正値を求
める制御部からなる受信装置において、電界強度の強さ
に応じて前記高周波アンプ及びミキサの利得を制御する
ＡＧＣ回路を設けたことを特徴とする。In order to achieve the above object, the present invention is a receiving apparatus comprising a transmitting / receiving section having a high frequency amplifier, a mixer and an intermediate frequency detection circuit, and a control section for obtaining a correction value of an electric field detection circuit output signal. In the second aspect, an AGC circuit for controlling the gains of the high frequency amplifier and the mixer according to the strength of the electric field is provided.
【０００７】[0007]
【作用】本発明では、受信電界強度の大きさに応じてＲ
Ｆアンプ、ミキサの利得を可変できるようにしているの
で、ＩＦ検波ＩＣに過大電力が入力されず、ＩＦ検波Ｉ
ＣのＲＳＳＩ信号が飽和しないようにしている。そのた
め、ＲＳＳＩ信号のダイナミックレンジが広くなり、よ
ってより精度の高い受信電界強度の表示を行なうことが
できる。In the present invention, R is set in accordance with the magnitude of the received electric field strength.
Since the gains of the F amplifier and the mixer are variable, the IF detection IC does not receive excessive power and the IF detection I
The RSSI signal of C is prevented from being saturated. Therefore, the dynamic range of the RSSI signal is widened, so that the received electric field strength can be displayed with higher accuracy.
【０００８】[0008]
【実施例】以下、本発明の実施例について図面を参照し
て詳細に説明する。Embodiments of the present invention will now be described in detail with reference to the drawings.
【０００９】図１は本発明の一実施例による受信装置の
内部構成を示すブック図である。本受信装置は、アンテ
ナ１と、送受信部２と、制御部１３とから構成されてい
る。そして、送受信部２は、送信部３、分配器４、ＲＦ
アンプ５、ＲＦフィルタ６、第１段ミキサ７、第１段Ｉ
Ｆフィルタ８、第２段ミキサ９、第２段ＩＦフィルタ１
０、ＩＦ検波ＩＣ１１とで構成されている。制御部１３
は、ゲートアレイ１４、制御回路１６、ＡＧＣ回路１
８、メモリ２０とで構成されている。FIG. 1 is a book diagram showing the internal structure of a receiving apparatus according to an embodiment of the present invention. The receiving device includes an antenna 1, a transmitting / receiving unit 2, and a control unit 13. The transmitter / receiver 2 includes the transmitter 3, the distributor 4, and the RF.
Amplifier 5, RF filter 6, first stage mixer 7, first stage I
F filter 8, second stage mixer 9, second stage IF filter 1
0 and an IF detection IC 11. Control unit 13
Is a gate array 14, control circuit 16, AGC circuit 1
8 and a memory 20.
【００１０】上記の如く構成される本受信装置の動作を
述べる。電界強度の強さに応じて、変化するＲＳＳＩ信
号Ｓ１を制御部１３のゲートアレイ１４で受け、そのＲ
ＳＳＩ信号Ｓ１に応じたＲＳＳＩデータＳ２を制御回路
１６へ送る。The operation of the present receiver configured as described above will be described. The gate array 14 of the control unit 13 receives the RSSI signal S1 that changes according to the strength of the electric field,
The RSSI data S2 corresponding to the SSI signal S1 is sent to the control circuit 16.
【００１１】制御回路１６では、ＲＳＳＩ信号Ｓ１があ
る電圧Ｖ１（Ｖ）以上になると、ＲＦアンプ５、第１段
ミキサ７、第２段ミキサ９の利得を下げ、また、逆にＲ
ＳＳＩ信号Ｓ１がある電圧Ｖ２（Ｖ）以下になると、Ｒ
Ｆアンプ５、第１段ミキサ７、第２ミキサ９の利得を下
げるように制御信号Ｓ４をＡＧＣ回路１８へ送る。この
利得の切替えは、３段階程度行なえようにしておく。図
３の（ａ）に補正がない時のＲＳＳＩ信号の入出力特性
を示す。In the control circuit 16, when the RSSI signal S1 exceeds a certain voltage V1 (V), the gains of the RF amplifier 5, the first stage mixer 7 and the second stage mixer 9 are lowered, and conversely R
When the SSI signal S1 falls below a certain voltage V2 (V), R
The control signal S4 is sent to the AGC circuit 18 so as to reduce the gains of the F amplifier 5, the first-stage mixer 7, and the second mixer 9. This gain switching should be made possible in about three steps. FIG. 3A shows the input / output characteristics of the RSSI signal when there is no correction.
【００１２】ＡＧＣ回路１８では、制御回路１６からの
制御信号Ｓ４に応じて利得切替え信号Ｓ５を出力してＲ
Ｆアンプ５、第１段ミキサ７、第２段ミキサ９のバイア
ス電圧を可変することにより、各利得のきりかえを行な
う。そして、制御回路１６において、ＲＦアンプ５、第
１段ミキサ７、第２段ミキサ９の利得及びＲＳＳＩデー
タＳ２の相対値よりＲＳＳＩ信号の補正値（絶対値）を
求めて補正ＲＳＳＩデータＳ３としてメモリ２０に出力
する。図３の（ｂ）にＲＳＳＩ信号を補正した時の入出
力特性を示す。図３の（ａ）に比べＲＳＳＩ信号のダイ
ナミックレンが広くなっているのが分る。The AGC circuit 18 outputs a gain switching signal S5 according to the control signal S4 from the control circuit 16 to output R.
By changing the bias voltage of the F amplifier 5, the first-stage mixer 7, and the second-stage mixer 9, each gain is switched. Then, in the control circuit 16, a correction value (absolute value) of the RSSI signal is obtained from the gains of the RF amplifier 5, the first-stage mixer 7, and the second-stage mixer 9 and the relative value of the RSSI data S2, and the corrected RSSI data S3 is stored in the memory. Output to 20. FIG. 3B shows input / output characteristics when the RSSI signal is corrected. It can be seen that the dynamic range of the RSSI signal is wider than that in FIG.
【００１３】このように動作するため、ＲＳＳＩ信号の
ダイナミックレンジを広くすることができる。Since it operates in this way, it is possible to widen the dynamic range of the RSSI signal.
【００１４】また、図２はＡＧＣ回路１８の回路構成を
示すブロック図であり、Ｄ／Ａコンバータ２２、抵抗器
２３、コンデンサ２４、オペアンプ２５、可変抵抗器２
６を備えて構成されている。FIG. 2 is a block diagram showing the circuit configuration of the AGC circuit 18, which includes a D / A converter 22, a resistor 23, a capacitor 24, an operational amplifier 25, and a variable resistor 2.
6 is provided.
【００１５】制御回路１６から送られてくる制御信号Ｓ
４をＤ／Ａコンバータ２２で受け、その制御信号Ｓ４に
応じたアナログ電圧をＤ／Ａコンバータ２２より出力す
る。このアナログ電圧をオペアンプ２５による２段の反
転増幅回路を通し、ＲＦアンプ５、第１段ミキサ７、第
２段ミキサ９のバイアス回路の電圧を加減するものであ
る。A control signal S sent from the control circuit 16
4 is received by the D / A converter 22, and an analog voltage corresponding to the control signal S4 is output from the D / A converter 22. This analog voltage is passed through a two-stage inverting amplifier circuit by the operational amplifier 25, and the voltages of the bias circuits of the RF amplifier 5, the first-stage mixer 7, and the second-stage mixer 9 are adjusted.
【００１６】[0016]
【発明の効果】以上説明したように本発明の受信装置に
よれば、ＲＳＳＩ信号が飽和しないようにしているた
め、ＲＳＳＩ信号のダイナミックレンジが広くなり、そ
の結果、受信電界強度を表示する場合により精度の高い
表示が可能となる。As described above, according to the receiving apparatus of the present invention, since the RSSI signal is prevented from being saturated, the dynamic range of the RSSI signal is widened, and as a result, the received electric field strength may be displayed. Highly accurate display is possible.
【図１】本発明の一実施例による受信装置の構成を示す
ブロック図である。FIG. 1 is a block diagram showing a configuration of a receiving apparatus according to an embodiment of the present invention.
【図２】本発明の一実施例による受信装置に設けたＡＧ
Ｃ回路の一例を示すブロック図である。FIG. 2 is an AG provided in a receiving device according to an embodiment of the present invention.
It is a block diagram which shows an example of C circuit.
【図３】ＲＳＳＩ信号入出力特性を示す図である。FIG. 3 is a diagram showing RSSI signal input / output characteristics.
【図４】従来の受信回路の構成を示すブロック図であ
る。FIG. 4 is a block diagram showing a configuration of a conventional receiving circuit.
１………アンテナ ２………送受信部 ３………送信部 ５………ＲＦアンプ ７………第１段ミキサ ９………第２段ミキサ １１………ＩＦ検波ＩＣ １３………制御部 １４………ゲートアレイ １６………制御回路 １８………ＡＧＣ回路 Ｓ１………ＲＳＳＩ信号 Ｓ２………ＲＳＳＩデータ Ｓ３………制御信号 Ｓ４………補正後ＲＳＳＩデータ Ｓ５………利得切替え信号 1 ... Antenna 2 ... Transmitter / receiver 3 ... Transmitter 5 ... RF amplifier 7 ... First stage mixer 9 ... Second stage mixer 11 ... IF detection IC 13 ... Control unit 14 ...... Gate array 16 ...... Control circuit 18 ...... AGC circuit S1 ...... RSSI signal S2 ...... RSSI data S3 ...... Control signal S4 ...... Corrected RSSI data S5 ...... Gain switching signal
Claims (1)
路を有する送受信部と、電界検出回路出力信号の補正値
を求める制御部からなる受信装置において、電界強度の
強さに応じて前記高周波アンプ及びミキサの利得を制御
するＡＧＣ回路を設けたことを特徴とする受信装置。1. A receiver comprising a transmitter / receiver unit having a high frequency amplifier, a mixer, and an intermediate frequency detection circuit, and a control unit for obtaining a correction value of an output signal of the electric field detection circuit, wherein the high frequency amplifier and A receiver provided with an AGC circuit for controlling the gain of a mixer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10629692A JPH05300039A (en) | 1992-04-24 | 1992-04-24 | Receiver |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10629692A JPH05300039A (en) | 1992-04-24 | 1992-04-24 | Receiver |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH05300039A true JPH05300039A (en) | 1993-11-12 |
Family
ID=14430078
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10629692A Pending JPH05300039A (en) | 1992-04-24 | 1992-04-24 | Receiver |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH05300039A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2003019820A1 (en) * | 2001-08-31 | 2003-03-06 | Samsung Electronics Co., Ltd | Apparatus and method for transmitting and receiving forward channel quality information in a mobile communication system |
| US7215196B2 (en) | 2003-03-19 | 2007-05-08 | Sanyo Electric Co., Ltd. | Variable impedance circuit, variable gain differential amplifier, multiplier, high-frequency circuit and differential distributed amplifier |
| US7242915B2 (en) | 2001-09-28 | 2007-07-10 | Broadcom Corporation | Timing based LNA gain adjustment in an RF receiver to compensate for intermodulation interference |
| US7379725B2 (en) | 2001-09-28 | 2008-05-27 | Broadcom Corporation | LNA gain adjustment in an RF receiver to compensate for intermodulation interference |
-
1992
- 1992-04-24 JP JP10629692A patent/JPH05300039A/en active Pending
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2003019820A1 (en) * | 2001-08-31 | 2003-03-06 | Samsung Electronics Co., Ltd | Apparatus and method for transmitting and receiving forward channel quality information in a mobile communication system |
| AU2002329076B2 (en) * | 2001-08-31 | 2004-04-22 | Samsung Electronics Co., Ltd. | Apparatus and method for transmitting and receiving forward channel quality information in a mobile communication system |
| US7242915B2 (en) | 2001-09-28 | 2007-07-10 | Broadcom Corporation | Timing based LNA gain adjustment in an RF receiver to compensate for intermodulation interference |
| US7379725B2 (en) | 2001-09-28 | 2008-05-27 | Broadcom Corporation | LNA gain adjustment in an RF receiver to compensate for intermodulation interference |
| US7912436B2 (en) | 2001-09-28 | 2011-03-22 | Broadcom Corporation | LNA gain adjustment in an RF receiver to compensate for intermodulation interference |
| US7215196B2 (en) | 2003-03-19 | 2007-05-08 | Sanyo Electric Co., Ltd. | Variable impedance circuit, variable gain differential amplifier, multiplier, high-frequency circuit and differential distributed amplifier |
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