JPH05296098A - Internal combustion engine controller - Google Patents

Abstract

PURPOSE:To obtain an internal combustion engine controller which does not load a CPU with any burden except a simple hardware and software, and wherein the precision control is performed by means of a number of pulse more than conventional one. CONSTITUTION:In an internal combustion engine controller 1, a pulse is divided by a dividing circuit 5 acting as a dividing means, and the divided pulse is input to a CPU 3. A first PTM 9 as a partial function of a count means takes the pulse not yet divided as the input and counts the pulse on the basis of the count value sent from the CPU 3. Since the CPU 3 takes the divided pulse as the input, the processing load caused by the interruption is not so large. Also, the pulse not yet divided is counted by the first PTM 9 acting as a partial function of the count means, and this count value is sent from the CPU 3, thereby the renewal of the count number is performed in the timing of the divided pulse, so that and the precision control can be easily realized.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a control device for an internal combustion engine, which reduces the load on a central processing unit by inputting divided pulses in the control of the internal combustion engine.

[0002]

2. Description of the Related Art For example, spill valve control is known as a means for electronically controlling a fuel injection device of a diesel engine. This spill valve is provided in the engine fuel injection pump, and determines the fuel injection amount by adjusting the fuel injection end timing. When performing this spill valve control, it is necessary to increase the number of pulse waves in order to realize precise control.

That is, in this spill valve control, one revolution of the engine is assigned to the number of pulse waves, and the target spill angle is expressed as the sum of the number of pulse waves and the surplus angle, so that the spill valve is adapted to the rotation of the engine. It realizes the opening and closing timing control of. However, the control timing based on the number of pulse waves is synchronized with the rotation of the engine, but the control for the surplus angle counts time using a clock asynchronous with the rotation of the engine. Therefore, if this surplus angle becomes large, the control portion independent of the rotation of the engine becomes large, and precise control cannot be performed. Therefore, the more pulse waves for one revolution of the engine, the finer the control obtained thereby.

However, since the central processing unit (hereinafter referred to as CPU) executes various processes at the pulse interrupt timing, increasing the number of pulse waves causes more interrupt accesses, which imposes a burden on the CPU processing. There is a problem that other processing is stagnant.

Conventionally, as a means for reducing the load on the CPU, there has been an attempt to reduce the interrupt access to the CPU by controlling the opening / closing timing of the spill valve by counting pulses by an external counter. ..

[0006]

However, once the external counter starts counting, if the count setting value needs to be changed in the middle due to factors such as a change in engine speed, the count setting value is changed. Then it will be difficult to update. Therefore, in order to perform precise control with the conventional device, it is necessary to further perform complicated processing by hardware or software, and for that purpose, the CPU is also required.
There was a problem that it burdened me.

In view of the above problems, it is an object of the present invention to enable control with a larger number of pulses than ever before without burdening the CPU with simple hardware and software.

[0008]

To achieve this object, the present invention has the following configuration. That is, as illustrated in FIG. 5, pulse output means for outputting a pulse according to the rotation of the internal combustion engine, frequency dividing means for dividing the pulse from the pulse output means, and pulse from the pulse output means , Counting means for counting based on the count set value and outputting as a control timing signal after the count is finished, and a pulse divided by the dividing means as an interrupt input, and the count set value at the interrupt timing Central processing unit (CPU)
And a control device for an internal combustion engine, characterized by controlling the internal combustion engine based on the control timing signal.

[0009]

In this internal-combustion-engine control device, the pulse is divided by the dividing means, and the divided pulse is input to the CPU. Further, the counting means receives the pulse before frequency division as an input and counts this pulse based on the count set value passed from the CPU. Since the CPU receives the divided pulse as an input, the processing load due to the interrupt does not become so large. The pulse before frequency division is counted by the counter means, and the count set value is CP.
Since it is passed from U, the count number can be updated at the timing of the pulse after the frequency division. Further, since the counting means counts the pulses before the frequency division, the internal combustion engine can be controlled at the pulse timing before the frequency division. This makes it possible to easily realize precise control.

[0010]

Embodiments of the present invention will now be described in detail with reference to the drawings. FIG. 1 is a configuration diagram of essential parts of a control device 1 for an internal combustion engine as an embodiment of the present invention. The control device 1 for an internal combustion engine includes a CPU 3, a frequency dividing circuit 5, two D flip-flops (first D-FF7, second D-FF8), six programmable timer modules (first PTM9, second PTM).
11, third PTM13, fourth PTM15, fifth PTM1
7, sixth PTM 19), two waveform shaping circuits (first waveform shaping circuit 21, second waveform shaping circuit 23), two pickups (first pickup 25, second pickup 2)
7), two types of pulsars existing on the same crankshaft (first
A pulser 29, a second pulser 31), a drive circuit 41, etc. are provided.

Here, the internal combustion engine is a diesel engine, and the control device 1 controls the opening / closing timing of the piezo spill valve of the fuel injection pump as one of the processes. The CPU 3 receives various input data from the outside and performs control processing. As one of the various control processes, the output from the frequency dividing circuit 5 is received as its interrupt input, and the interrupt output of the process described later is sent to the D-FFs 7 and 8 by D.
Sending to input. In addition, this CPU3, PTM9
The counter values of .about.19 are set.

The frequency dividing circuit 5 functions as a frequency dividing means and is a logic circuit for dividing the pulse NE1 transmitted from the first waveform shaping circuit 21. The frequency division ratio of the frequency dividing circuit 5 can be set by a hard switch,
In this embodiment, the input pulse NE is set as the signal P1 having a frequency of 1/4, and the interrupt input of the CPU 3 and D-
It is transmitting to the CLK input of FF7,8. As a result, the CPU 3 causes the pulse P1 having a frequency 1/4 that of NE1.
Will be received as input.

D-FFs 7 and 8 are well-known D flip-flops that partially function as counter means. The first D-FF 7 uses the divided pulse P1 transmitted from the frequency dividing circuit 5 as its clock input CLK, and
The interrupt control signal P3 transmitted from the No. 3 is used as its D input. The signal P7 transmitted from the output Q of the first D-FF7 is the G input of the first PTM9. Second
Similarly, the D-FF8 also inputs the pulse P1 to the clock input CL.
K, interrupt control signal P4 is input D, output Q
The signal transmitted from is the G input of the fourth PTM 15.

The PTMs 9 to 19 each have a partial function as counter means. These PTM9 ~ 1
Reference numeral 9 has a function of a down counter synchronized with the clock input CLK by using the G input as a trigger, and the count value is set by the CPU 3.

The first PTM 9 receives the pulse NE1 before frequency division sent from the first waveform shaping circuit 21 as its clock input C.
LK, and the Q output from the first D-FF 7 is used as its G input. The signal P9 transmitted from the output OUT of the first PTM9 is the G input of the second PTM11.

The second PTM11 is the OUT of the first PTM9.
The output is used as its G input, and an independent clock pulse CLK1 (for example, 1 μsec) not synchronized with NE1 and NE2 is used.
Cycle) as the clock input CLK. This second
The signal P11 transmitted from the output OUT of the PTM11 is
It is the G input of the third PTM 13.

The third PTM 13 is the OU of the second PTM 11.
The T output is used as its G input, and an independent clock pulse CLK2 (for example, 8 μse) not synchronized with NE1 and NE2 is used.
(c period) is used as the clock input CLK. The signal TDL sent from the output OUT of the third PTM 13 is used for the closing timing control of the piezo spill valve and the like.

The fourth to sixth PTMs 15, 17 and 19 are the first
The Q output transmitted from the D-FF8 is set to G of the fourth PTM15.
1 to 3 PTM9,1 except that it is input
It has the same configuration as that of Nos. 1 and 13. The signal P19 sent from the output OUT of the sixth PTM 19 is used for the opening timing control of the piezo spill valve and the like.

The waveform shaping circuits 21 and 23 are electric circuits for shaping the signals transmitted from the pickups 25 and 27, respectively, into digital pulse waveforms as signals synchronized with the rotation of the engine. The first waveform shaping circuit 21
The signal sent from the first pickup 25 serves as an input, and the pulse NE1 after waveform shaping is used as a pulse before frequency division, and the clock inputs CLK and PTM9 of the frequency divider circuit 5 are used. 15 clock inputs CLK.

The second waveform shaping circuit 23 receives the signal sent from the second pickup 27 and sends the pulse NE2 after waveform shaping to the reset input RES of the frequency dividing circuit 5. As a result, the frequency dividing timing of the frequency dividing circuit 5 is measured. The pickups 25 and 27 are pickup circuits that output pulse signals corresponding to the rotations of the pulsers 29 and 31, respectively.

The pulsars 29 and 31 are supported by the crankshaft and rotate according to the engine speed. Further, the first pickup 25 and the first pulser 29 fulfill some functions as pulse output means.

The drive circuit 41 comprises an inverter 43, two transistors (first transistor 45, second transistor 47), a transformer 49, a diode 51, a piezo actuator 53, a DC power supply 55 and the like, which is a known flyback type. It is a drive circuit.

The inverter 43 NOTs the signal P19 transmitted from the sixth PTM 19 as a logical signal value.
It is a logic element. The first transistor 45 is the third PTM.
The charging control signal TDL transmitted from 13 turns on, and in the on state, a current is supplied from the DC power supply 55 to charge the primary winding 49a of the transformer 49 with energy. The second transistor 47 is the inverter 4
The discharge control signal TDOWN transmitted from the sixth PTM 19 via 3 causes the piezoelectric actuator 53 to be turned on. In the on state, the electric charge charged in the piezo actuator 53 is discharged. The transformer 49 generates a high voltage in the secondary winding 49b when the first transistor 45 is turned off in a state where the primary winding 49a is charged with energy and the power supply to the primary winding 49a is cut off. The diode 51 has a secondary winding 49.
Rectification is performed when the piezo actuator 53 is charged by flowing a current through the piezo actuator 53 by the high voltage generated in b. Piezo actuator 53
Is for opening and closing the piezo spill valve. When charged and extended, the spill passage is closed, the fuel pressure in the fuel passage rises, and fuel injection is started. DC power supply 5
Reference numeral 5 is a DC power supply circuit for charging the piezo actuator 53 from the transformer 49.

FIG. 2 is a flowchart showing the processing executed by the CPU 3 triggered by the interrupt signal from the frequency dividing circuit 5. When a person who wants to start the diesel engine turns the starter motor, the CPU 3 executes the flow shown in FIG. 2 by using an interrupt signal from the frequency dividing circuit 5 as a trigger as one of the control processes. In this process, the opening / closing control of the piezo spill valve is performed as a control target. In the present embodiment, one revolution of the engine is used for 480 of the NE1.
The unit angle was set to 0.75 degrees by assigning it to the waves. Then, the target spill angle θsp is obtained as the sum of the number n of pulse waves of NE1 and the remainder angle θrem before the interrupt processing. The number n of pulse waves of NE1 counts down the pulse of NE1 by transmitting to the first PTM 9. The surplus angle θ rem is converted into time and transmitted to the second PTM 11 so that the clock pulse CLK1 (1 μs
ec cycle). This second PT
The rising of the control signal is controlled by the countdown of M11. The count value of the clock pulse CLK2 (8 μsec cycle) is transmitted to the third PTM 13 as the timing of raising the finally output waveform.

When the interrupt signal from the frequency dividing circuit 5 is input and the processing is started, the CPU 3 first increments the count value of the internal counter by one (step 201). Next, based on the count value of this internal counter, it is determined whether or not the processing currently being performed is at the processing timing (step 203). If the processing timing is reached, the NE count value is transmitted to the first PTM 9 as described above (step 205). If it is not in the processing timing,
The processing moves to step 213 described later. Next, the second PT
A count value as the remaining time is set in M11 (step 207). Then, the count value as the rising time is set in the third PTM 13 (step 209). Finally, the "H" signal is output to the D input of the D-FF 7 (step 211). next,
The process currently being performed is the above process (steps 205 to 2).
The timing immediately after the timing (11) is executed (N
It is determined whether or not the processing is due to the pulse input after the frequency division of E1) (step 213). By this process, D
-It is determined whether it is time to return the value held by the FF 7 from "H" to "L". That is, if the processing timing is once, "L" is output to the D-FF 7 (step 215). With this, the CPU 3 finishes the process. If the timing is not reached, the process of step 215 is skipped and the process ends.

At this time, it is assumed that there is a situation in which it is desired to change the count values of the first to third PTMs 9, 11, and 13 on the way, for example, when the engine speed suddenly changes. Even in such a case, the CPU 3 is performing the processing at the interrupt timing after dividing the pulse NE1, and by making the D-FF 7 hold the value of “L” or “H”,
The output can be controlled in synchronization with the pulse after frequency division. That is, the counter value can be reset by the processing of steps 205 to 211 at the rising timing of the pulse P1 after the frequency division.

3 and 4 are timing charts showing this control operation. The above-described processing will be described below based on this timing chart. In FIG. 3, (a)
Is the waveform of the pulse NE1 before frequency division, and (b) is the pulse N1.
The waveform of E2, (c) is the waveform P of the pulse NE1 after frequency division
1, (d) is the waveform P3 of the interrupt signal transmitted from the CPU 3 to the D input of the D-FF 7, and (e) is D-.
Waveforms P7, (f) transmitted from the Q output of FF7 to the first PTM9 are the internal counter value of the first PTM9,
(G) is the output from the OUT of the first PTM9 to the second PTM1.
The waveform P9 (h) of the signal transmitted to the G input of 1 is the internal counter value of the second PTM 11, and (i) is the second PTM.
The waveform P11 (j) of the signal transmitted from the OUT output of 11 to the G input of the third PTM13 is the internal counter value of the third PTM13, and (k) is transmitted from the OUT output of the third PTM13 to the control target. The waveform, (l), respectively shows the timing when the piezo spill valve is finally opened and closed. In particular, the third counter 13 shown in (k)
The timing t5 at which the output TDL from "H" changes to "L" is the timing at which the piezo spill valve is closed and fuel injection is started, and precise control is required.

The CPU 3 counts down the set count value in accordance with the clock pulse CLK2 (8 μsec cycle) at the rising timing of the third PTM 13, and at t0 at which the count ends (k).
As shown in, the third PTM 13 changes its OUT signal to "L".
To "H". The OUT signal of the third PTM 13 is the charge control signal TDL of the drive circuit 41,
At the rising timing, the first transistor 45 is turned on, and the primary winding 49a of the transformer 49 is charged with energy.

For pulse NE1 shown in (a), (b)
Pulse NE2 resets the frequency dividing circuit 5 at the timing of t1. The frequency dividing circuit 5 frequency-divides the NE1 pulse and outputs the result as P1. This waveform is shown in (c). The CPU 3 executes the flow shown in FIG. 2 at the rising timing t2 of P1. As shown in steps 205, 207, and 209 of FIG. 2, the internal counters of the PTMs 9, 11, and 13 are set as shown in (f), (h), and (j). Further, according to step 211 of FIG. 2, the D-FF 7 is interrupted as shown in (d) to hold the value of the “H” signal.

At the next rising timing t3 of the pulse P1 after frequency division, the "H" signal is held in the D-FF7. Therefore, at this timing t3, the waveform P7 of the Q output of the D-FF7 becomes ( As shown in e), it becomes “H”.
P7 is transmitted to the G input of the first PTM 9, and the rising of this triggers the countdown of the internal counter of the PTM 9. This counting is performed in synchronization with the pulse NE1 before frequency division. Note that, as shown in (g), from the output OUT of the first PTM 9 to “L” from when the rising signal is input to the G input until the count ends.
Is output. When the countdown of the first PTM9 is completed and reaches t4, the output OUT of the first PTM9 is
Rise from "L" to "H". With this rising edge as a trigger, the second PTM 11 causes the clock pulse CLK1 (1
A countdown is performed every (μsec cycle). Also,
As shown in (i), “L” is output from the output OUT of the second PTM 11 from the time when the rising signal is input to the G input until the count ends. When the countdown of the second PTM11 ends and t5 is reached, the second PTM11
Output OUT rises from "L" to "H". As shown in the final waveform (k), “L” is output from the output OUT of the third PTM 13 from the time when the rising signal is input to the G input until the end of counting. That is, at the timing t5 when the countdown of the second PTM11 ends, the signal from the output OUT of the third PTM13 changes from "H" to "L".

This t5 is the closing timing of the piezo spill valve. That is, the charge control signal TDL, which is the output of the third PTM 13, changes from “H” to “L”.
The transistor 45 is turned off, and the energy charging to the primary winding 49a is completed. At the same time when the energy charging is completed, a high voltage is generated in the secondary winding 49b, and the charging of the piezo actuator 53 is started. As a result, the piezo actuator 53 extends, the spill passage is closed, the fuel pressure in the fuel passage rises, and fuel injection is started.

Further, as shown in (j), triggered by the rising of t5, the third PTM 13 counts down by the clock pulse CLK2 (8 μsec cycle). When this countdown ends, the third PTM1
The OUT output from 3 is raised from "L" to "H". This determines the next charge start time.

As shown in FIG. 4, the CPU 3 sets the counter values of the 4th to 6th PTMs 15, 17 and 19 at the timing of t3 which is the rising edge of the pulse P1 after the second frequency division, and sets the counter values of the 1st to 3rd PTMs 9 and 9, respectively. The same control as 11 and 13 is performed. As a result, the sixth PTM1 shown in (s)
By the countdown of 9, as shown in (t),
The waveform P19 of the signal output from the PTM 19 is obtained. The waveform P19 is converted by the inverter 43 into the discharge control signal TDOWN shown in (u). Then, when the discharge control signal TDOWN rises at the timing of t6 when the discharge control signal TDOWN rises, the second transistor 47 is turned on, and the electric charge charged in the piezo actuator 53 is discharged. That is, since the piezo actuator 53 contracts to the length before charging, in the fuel injection device, the spill passage opens, the fuel pressure in the fuel passage decreases, and the fuel injection ends.

Further, the CPU 3 at the timing of t3,
The flow of FIG. 2 is executed again. This time, step 203
It is determined that the processing timing is not based on the count value of the CPU 3, and the processing of step 213 is performed. In step 213, it is determined that the processing is to be performed once after the processing timing, that is, immediately after the processing that executed steps 205 to 211. Then, by the processing of step 215, the D-FF 7
"L" signal is sent to the D input of D-FF7
Holds the signal and prepares for the next input.

Thus, the control device 1 for the internal combustion engine of the present invention
According to the above, it was possible to carry out a pulse of 480 waves for one rotation of the engine. Conventionally, in order to take the load on the CPU 3 into consideration, the control is performed with a pulse of 64 waves for one rotation of the engine. This can be increased to approximately 10,000 waves and adapted depending on the degree of frequency division. Precise control becomes possible because the number of pulses per unit rotation of the engine can be increased. At this time, the divided pulse is input to the CPU 3, so that the processing of the CPU 3 is not burdened.

Further, in the case where an external down counter is provided for control, once the countdown is started, it was difficult to update the count number on the way. However, according to the control device 1 for an internal combustion engine of the present invention, The CPU 3 performs processing at the interrupt timing after dividing the pulse NE1. By holding the value of "L" or "H" in the D-FF 7, the Q output can be controlled in synchronization with the pulse after frequency division. That is, the counter value can be reset at the rising timing of the pulse P1 after the frequency division. Thus, simple hardware and software have enabled precise spill valve control using many pulses.

The control device 1 for an internal combustion engine according to the present invention is
Besides the diesel engine, it can be applied to an injection system such as a gasoline engine. Further, even with other internal combustion engine devices, it is possible to perform precise control when performing control based on the rotation angle of the engine.

[0038]

As described in detail above, the control device for an internal combustion engine according to the present invention can perform control with a larger number of pulses than before, without burdening the CPU with simple hardware and software. Became possible.

[Brief description of drawings]

FIG. 1 is a configuration diagram of a main part of a control device for an internal combustion engine as an embodiment of the present invention.

FIG. 2 is a flowchart showing processing executed by the CPU.

FIG. 3 is a first timing chart showing the operation.

FIG. 4 is a second timing chart showing the operation.

FIG. 5 is a diagram illustrating the configuration of the present invention.

[Explanation of symbols]

1 ... Control device for internal combustion engine, 3 ... CPU, 5 ...
・ Dividing circuit, 7 ... D flip-flop, 9 ... First PTM, 11 ... Second PTM, 13 ... Third PT
M, 15 ... 4th PTM, 17 ... 5th PTM, 1
9 ... 6th PTM, 21 ... 1st waveform shaping circuit, 2
3 ... 2nd waveform shaping circuit, 25 ... 1st pickup, 27 ... 2nd pickup, 29 ... 1st pulser, 31 ... 2nd pulser, 41 ... Drive circuit, 45
... First transistor, 47 ... Second transistor, 49 ... Transformer, 53 ... Piezo actuator

Claims (1)

[Claims] 1. A pulse output means for outputting a pulse in accordance with the rotation of an internal combustion engine, a frequency dividing means for dividing a pulse from the pulse output means, and a pulse from the pulse output means for setting a count set value. Central processing for counting based on the count and outputting as a control timing signal after completion of counting, and a pulse divided by the frequency dividing means as an interrupt input, and setting the count set value in the counting means at the interrupt timing And a control device for controlling the internal combustion engine based on the control timing signal.