JPH0529600A - Solid-state image sensor - Google Patents

Abstract

PURPOSE:To easily control a maximum storage charge amount of a photodiode and to reduce an operating drive voltage of an electronic shutter in a solid state image sensor in which the shutter can be operated in a vertical overflow drain structure. CONSTITUTION:A P<+> type diffused layer 3 is so formed on a surface side of a photodiode 4 as not to be brought into contact with a channel stopper 9, the layer 3 is brought into direct contact with a metal light shielding film 2 through a contact hole 1, and an arbitrary bias voltage responsive to a purpose is applied externally to the shielding film to control a surface potential of the photodiode.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state image pickup device, and more particularly to a solid-state image pickup device having a vertical overflow drain structure and capable of operating an electronic shutter.

[0002]

2. Description of the Related Art FIG. 6 shows a sectional structure of a conventional general solid-state image pickup device. A P-type well 7 is formed on the surface side of an N-type semiconductor substrate 6 made of silicon or the like, and an N-type photoelectric conversion region 4 (hereinafter referred to as a photodiode) for photoelectrically converting incident light on the surface side and accumulating for a certain period and a signal. An N-type transfer channel 5 for transferring charges is formed. The P-type well 7 is selectively provided with a high-concentration P-type region 8 just below the N-type transfer channel 5. The photo on the surface of the diode 4 is provided with P ⁺ -type diffusion layer 3, a portion of the channel stopper 9 (P ⁺ -type element isolation region) and connected with and P-type well 7, the P ⁺ -type diffusion layer 3, the channel stopper 9 has the same potential. Since 0V is applied to the P-type well 7 to fix the potential as described later, the P ⁺ -type diffusion layer 3 is also fixed to 0V. As a result, the interface with the silicon oxide film 11 on the surface is in a non-depleted state and suppresses the generation of dark current from the interface. A power supply 1 is provided between the P-type well 7 and the N-type semiconductor substrate 6.
2 applies 0V to the P-type well 7 side and a positive voltage Vsub to the N-type semiconductor substrate 6 side to determine the maximum charge amount that can be accumulated in the photodiode 4 by this Vsub. It has a so-called vertical overflow drain structure of flowing into the semiconductor substrate 6.

The maximum accumulated charge amount of the photodiode and the electronic shutter operation in this type of conventional solid-state image pickup device will be described below. FIG. 7 shows the XY in FIG.
It is a potential schematic diagram of the electron of a direction. The reverse bias voltage Vsub applied between the P-type well 7 and the N-type semiconductor substrate 6 as described above completely depletes the P-type well portion immediately below the photodiode 4, and the potential distribution shows a curve D in FIG. become that way. If the potential of the P-type well portion directly under the photodiode 4 at this time is φ _B1 , the maximum accumulated charge amount at this time is Q1 accumulated in the portion shown by the diagonal line to the right of FIG. Charges larger than this flow over the potential barrier of the P-type well 7 and flow into the N-type semiconductor substrate 6 as indicated by a in the figure. Further, when the applied Vsub voltage is increased by V1, the potential of the P-type well portion becomes φ _B2 as shown by the curve E in the figure, and the maximum accumulated charge amount becomes Q2 indicated by the left diagonal line (Q1
> Q2). Thus, the maximum amount of charge that can be stored in the photodiode 4 is determined by the voltage applied between the P-type well 7 and the N-type semiconductor substrate 6. Further, in the electronic shutter operation, as shown by the curve F in FIG. 7, the applied voltage is the voltage Vs that eliminates the potential barrier of the P-type well portion.
This is achieved by setting ub + V2 so that all the signal charges that have been accumulated up to that point are ejected to the N-type semiconductor substrate side as shown in FIG. That is, in the horizontal blanking period or in the vertical blanking period, the applied voltage is increased in a pulsed manner to empty the inside of the photodiode, and then the Vsub value is restored to the original value, and the signal charge is accumulated from that point. By restarting, almost any time (1/60
The electronic shutter operation for 1 second to 1 / ∞ second) is possible.

[0004]

In the above-mentioned conventional solid-state image pickup device, the maximum charge amount that can be accumulated in the photodiode is the voltage Vsu applied between the P-type well and the N-type semiconductor substrate.
Although it is determined by b, this Vs is set in order to suppress the leakage (blooming) of the excess charge into the adjacent pixel.
The ub voltage cannot be reduced to a certain value or less, and the voltage has a drawback that the maximum accumulated charge amount is determined. Therefore, it is difficult to increase the maximum accumulated charge amount. In addition, the pulse voltage applied during the electronic shutter operation also requires a very high voltage, and there is a drawback that a large-scale booster circuit for that purpose is required on the camera side to be mounted. A method of increasing the maximum accumulated charge amount of the photodiode is to increase the impurity concentration of the photodiode portion to increase the potential. However, in that case, a higher pulse voltage is required during the above-mentioned electronic shutter operation. .. In other words, we want to make the maximum accumulated charge of the photodiode as large as possible (higher dynamic range), and achieve the electronic shutter operation with the lowest possible pulse voltage.
Since there is a trade-off relationship between the two, the manufacturing conditions have been narrowed and the usage conditions have been severe (for example, the size of the mounted camera has been increased).

[0005]

According to the present invention, a plurality of second-conductivity-type photoelectric conversion regions are arranged in a row in a first-conductivity-type well on a surface portion of a semiconductor substrate, and the second-conductivity-type photoelectric conversion regions are provided in the well. There are a plurality of pixel columns in which the second conductivity type charge transfer channels are arranged adjacent to each other, the first conductivity type element isolation region is arranged between the pixel columns, and the second conductivity type charge transfer channels are arranged on the second conductivity type charge transfer channels. A solid-state imaging device in which a transfer electrode group is arranged via an insulating film, and a metal light-shielding film having an opening corresponding to the second conductivity type photoelectric conversion region is arranged on the transfer electrode group via another insulating film. In, the first conductive type diffusion layer is formed on the surface portion of the photoelectric conversion region separately from the first conductive type element isolation region, and the first conductive type diffusion layer is partly formed with the metal light shielding film. They are in direct contact.

[0006]

In the above-described solid-state image pickup device of the present invention, the potential of the first conductivity type diffusion layer can be controlled by externally applying an arbitrary bias voltage to the metal light shielding film. That is, the potential of the surface of the photodiode can be controlled, and the maximum charge amount that can be accumulated in the photodiode is controlled, and further, the electronic shutter operation is performed by applying an appropriate negative pulse voltage to obtain an extremely low Vsub pulse. It can be achieved with voltage.

[0007]

The present invention will be described below with reference to the drawings.

FIG. 1 is a sectional view of a solid-state image pickup device according to an embodiment of the present invention.

A P-type well 7 is formed on the front surface side of the N-type semiconductor substrate 6.
And an N-type photodiode 4 (N-type photoelectric conversion region) for photoelectrically converting and storing incident light and an N-type transfer channel 5 for transferring a signal charge are formed on the surface side. 9
Is a P ⁺ type channel stopper (P ⁺ type element isolation region)
Reference numeral 11 denotes a silicon oxide film (insulating film), on which the transfer electrode 10 for reading and transferring signal charges is arranged. Up to this point, there is no difference from the above-described conventional solid-state imaging device. The difference from the conventional structure is the P ⁺ type diffusion layer 3 and the metal light shielding film 2 formed on the surface of the photodiode 4. The P ⁺ type diffusion layer 3 is arranged separately from the channel stopper 9, and the lithography technique and etching are used. A contact hole 1 is formed in the silicon oxide film 11 on the P ⁺ type diffusion layer 3 near the transfer electrode 10 by using a technique, and then a metal light-shielding film 2 (eg, aluminum, tungsten) is formed by using a sputtering technique. At this time, the P ⁺ type diffusion layer 3 and the metal light-shielding film 2 are in direct contact with each other at the contact hole 1, and the solid-state imaging device having the structure of the present invention is obtained. The impurity concentration of the P ⁺ type diffusion layer 3 is 10 ¹⁹ to 10 ²¹ pieces / cm 3.
^{Since 3} is selected, the contact with the metal light-shielding film becomes ohmic contact.

Next, the operation of this embodiment will be described.
FIG. 2 is a schematic diagram of electron potentials in the XY directions in FIG. In the figure, the voltage between the P-type well 7 and the N-type semiconductor substrate 6 is fixed to a constant value Vsub (V), and the metal light shielding film 2
Applied voltage to 0 (V), + V3 (V), -V4
It shows how the potential distribution changes when it is changed to (V). When the applied voltage is 0V, the distribution is as shown by the curve A in the figure, and + V3 (V), for example, 1V to 3
When V is applied, the distribution becomes as shown by the curve B, the potential becomes deeper on the surface side of the photodiode 4 than when it is 0 V, and the maximum accumulated charge amount Qmax can be increased accordingly. On the contrary, the applied voltage is -V4 (V), for example, -1.
When set to V to -3V, the photodiode 4 like the curve C
The distribution has a shallower potential on the surface of, and the maximum accumulated charge amount decreases. FIG. 3 shows an example of the relationship between the maximum accumulated charge amount Qmax of the photodiode and the voltage applied to the metal light-shielding film 2.

As described above, it is possible to control the maximum amount of charge that can be accumulated in the photodiode 4 by the voltage applied to the metal light-shielding film 2.
If it is desired to reduce it, a negative voltage may be applied. However,
In order to prevent blooming, the positive voltage must be applied within a voltage range in which the surface potential of the P ⁺ type diffusion layer 3 does not exceed the potential barrier φ _B of the P type well 7. In this example, 4-5V is the maximum voltage.

Next, the electronic shutter operation will be described. FIG. 4 is a timing chart of the electronic shutter operation. The pulse width in the figure is set to an arbitrary width for convenience of description. As described in the electronic shutter operation of the conventional solid-state imaging device, the normal applied voltage V is applied to the N-type semiconductor substrate 6 during any horizontal blanking period or vertical blanking period.
Input a pulse with a voltage higher by ΔVsub than sub (see FIG. 4).
(A)) Then, all the signal charges accumulated up to that time in the photodiode are extracted to the N-type semiconductor substrate side. However, in this embodiment, in addition to the above-mentioned N-type semiconductor substrate input pulse, metal light shielding is performed. A voltage lower by ΔVps than the normal applied voltage Vps as shown in FIG. 4D is input to the film with a delay of Δt time. The width of the above-mentioned pulse (t in the figure)
1, t2) and Δt will not be described in detail, it is better that t1 and t2 are wider in consideration of the rounding of the waveform, but in the case of this embodiment, t1 is 6 to 8 in consideration of noise.
μsec, t2 = 4 to 6 μsec, and Δt = 2 μsec. The simultaneous application of the negative pulse voltage to the metal light-shielding film as described above instantaneously raises the surface potential of the photodiode as shown in the potential schematic diagram of FIG. It is possible to pull out with a lower Vsub voltage. In addition,
The reason for delaying the pulse timing applied to the metal light-shielding film by Δt with respect to the pulse timing applied to the N-type semiconductor substrate is to prevent blooming.

FIG. 5 shows a substrate application pulse (ΔVsub) and a metal light-shielding film application pulse (-ΔV) in the electronic shutter operation.
An example of the relationship of (ps) is shown. In the conventional method of applying the pulse voltage only to the N-type semiconductor substrate, ΔVsub is 20 to
Although 25V was required (corresponding to ΔVps = 0V in the figure), according to the present invention, for example, when ΔVps = −5V, Δ
Vsub may be about 8V, and it can be seen that the voltage can be dramatically reduced.

[0014]

As described above, according to the solid-state image pickup device of the present invention, the first conductivity type diffusion layer on the surface of the photodiode is formed separately from the channel stopper, and is partially in direct contact with the metal light shielding film. , The surface potential of the photodiode can be controlled by the bias voltage applied to the metal light-shielding film,
By selecting the bias voltage according to the purpose, it facilitates the control of the maximum accumulated charge amount of the photodiode, especially the increase of the maximum accumulated charge amount, which has been difficult from the past.
Since the electronic shutter operation can be dramatically reduced in voltage, there is no need to install a special booster circuit on the mounted camera side, which is advantageous for downsizing the camera, and the effect is remarkable. ..

[Brief description of drawings]

FIG. 1 is a sectional view showing an embodiment of the present invention.

FIG. 2 is a schematic diagram of a one-dimensional potential of electrons in a depth direction of a photoelectric conversion unit in one example.

FIG. 3 is a characteristic diagram showing the relationship between the voltage applied to the metal light-shielding film 2 and the maximum accumulated charge amount of the photodiode 4 in one example.

FIG. 4 is a timing chart of an electronic shutter operation in one embodiment.

FIG. 5 is a characteristic diagram showing a relationship between ΔVsub and ΔVps used for explaining an electronic shutter operation in one embodiment.

FIG. 6 is a cross-sectional view showing a conventional solid-state imaging device.

7 is a schematic diagram of one-dimensional potentials of electrons in the AB direction of FIG.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Contact hole 2 Metal light-shielding film 3 P ⁺ type diffusion layer 4 Photoelectric conversion region (photodiode) 5 N type charge transfer channel 6 N type semiconductor substrate 7 P type well 8 High concentration region of P type well 7 P ⁺ type Channel stopper 10 Charge transfer electrode (also serves as charge read electrode) 11, 11a Silicon oxide film

Claims (1)

Claim: What is claimed is: 1. A plurality of second-conductivity-type photoelectric conversion regions are arranged in a row in a first-conductivity-type well on a surface portion of a semiconductor substrate and are adjacent to the second-conductivity-type photoelectric conversion regions. A plurality of pixel columns in which the second conductivity type charge transfer channels are arranged, and the first conductivity type element isolation region is arranged between the pixel columns.
A transfer electrode group is arranged on the conductive type charge transfer channel via an insulating film, and a metal light shielding film having an opening corresponding to the second conductive type photoelectric conversion region is provided on the transfer electrode group via another insulating film. In the arranged solid-state imaging device, a first conductivity type diffusion layer is formed on the surface portion of the photoelectric conversion region separately from the first conductivity type element isolation region, and the first conductivity type diffusion layer is formed as described above. A solid-state imaging device characterized in that it is in partial contact with a metal light-shielding film.