JPH05291932A - Electronic circuit - Google Patents

Abstract

PURPOSE:To externally attain initial setting by holding a bi-directional external buffer to the input state for a prescribed period after the transition from an active period of an initializing signal to an inactive period and setting the buffer to the output state to eliminate the addition of any external terminal. CONSTITUTION:An initializing signal (regarded to be initialized at an L level) is delayed by a time DELTAt at a delay circuit 1. While an output of the circuit 1 is at an L level, the state of the bi-directional external buffer 3 is controlled by an output from the circuit 1. That is, while an output of the circuit 1 is at an L level, the buffer 3 is set to the input state and when the output of the circuit 1 is at an H level, the buffer 3 is set to the output state. Then the buffer 3 is switched from the input state into the output state being delayed by DELTAt time after the level of the initializing signal changes from an L to an H level. Since an output from the buffer 3 is latched in an FF 4 by a leading edge of the initializing signal, the initial setting data set externally when the buffer 3 is set to the input state are surely fetched when the time DELTAt is set to be a sufficient time.

Description

Detailed Description of the Invention

[0001]

FIELD OF THE INVENTION The present invention relates to electronic circuits, and more particularly to integrated electronic circuits.

[0002]

2. Description of the Related Art In the development of an integrated circuit which is required to be miniaturized, the number of input / output terminals has a great influence on the size and cost of the package.

However, as the circuits are integrated and have higher functions, the number of input / output signals often increases, and the circuits are designed to have versatility so that operation modes and the like can be set from the outside. It is also attempted to reduce the risk of changes, but in such cases it is necessary to add an external terminal for setting.

Therefore, in order to keep the number of external terminals to a minimum, the initial setting data such as the operation mode is generally set serially from a CPU (central processing unit) or a memory.

[0005]

However, when the initial setting data is set to be serial, at least two (serial data and serial clock) external terminals are required, and it is also necessary to add parts such as a CPU and a memory. . Further, there is a drawback that the circuit startup is delayed by the time required for data setting.

The electronic circuit of the present invention has been made in view of such a problem, and an object thereof is to provide an electronic circuit which can be initialized from the outside without requiring the addition of an external terminal. To provide.

[0007]

In order to achieve the above object, an electronic circuit of the present invention is connected to an internal circuit initialized by a predetermined initialization signal and an output of the internal circuit, and has an input state. And an output state, and a logic level externally set to the output terminal of the bidirectional external buffer in the input state of the bidirectional external buffer from the active period of the initialization signal. A latch circuit that latches as data at the transition edge to the inactive period and outputs it to the internal circuit, and the bidirectional external buffer for a predetermined period after the active period of the initialization signal and the transition from the active period to the inactive period. To an input state and then to an output state.

[0008]

That is, in the electronic circuit of the present invention, the bidirectional external buffer is used, and the bidirectional external buffer is kept in the input state for a predetermined period after the active period of the initialization signal and the transition from the active period to the inactive period. Hold and then switch to the output state.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the electronic circuit of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment.
In the figure, an initialization signal is a signal for the purpose of initializing the internal circuit 2 and is either input from the outside or internally generated internally.

The initialization signal is input to the internal circuit 2 to initialize the internal circuit 2 and, at the same time, to switch the input / output of the bidirectional external buffer 3 via the delay circuit 1 as a switching means. That is, the bidirectional external buffer 3 has the active signal of the initialization signal delayed by the delay circuit 1.
It is input at level and output at inactive level. That is, the bidirectional external buffer 3 is in the input state until a predetermined time after initialization (determined by the delay time of the delay circuit 1), and then switched to the output state. When the bidirectional external buffer 3 is in the input state, the output signal is in a high impedance state, so that the output signal is externally fixed to a high level or a low level by using the pull-up resistor 5 or the pull-down resistor 6. be able to.

The level set externally is taken into the circuit via the bidirectional external buffer 3, and the flip-flop 4 as a latch means at the rising edge of the initialization signal.
And is used for controlling the internal circuit 2 as initial setting data. The operation of the circuit of FIG. 1 will be described below with reference to the timing chart of FIG.

In this embodiment, the initialization signal is low active (initialization at low level). As shown in FIG. 2, the initialization signal is delayed by the delay circuit 1 by Δt. The output of the delay circuit 1 controls the state of the bidirectional external buffer 3. That is, the bidirectional external buffer 3 is switched to the input state while the output of the delay circuit 1 is low level, and the bidirectional external buffer 3 is switched to the output state while the output of the delay circuit 1 is high level.

Therefore, in the bidirectional external buffer 3, the initialization signal changes from the low level to the high level and is switched from the input state to the output state with a delay of Δt. The output from the bidirectional external buffer 3 is latched by the flip-flop 4 at the rising edge of the initialization signal. Therefore, if Δt is sufficient, the bidirectional external buffer 3 is externally set during the input state. Data can be captured reliably.

That is, Δt has only to satisfy the data hold time of the flip-flop 4 (generally, a few nanoseconds to a few tens of nanoseconds), and immediately after the circuit is initialized by the initialization signal, the bidirectional external signal is output. The buffer 3 is in the output state and can start the circuit. Although the initialization signal is described as low active in the above embodiment,
The same applies to the case of high active.

In this case, the bidirectional external buffer 3 switches to the input state when the output of the delay circuit 1 is at the high level and to the output state when the output of the delay circuit 1 is at the low level. The flip-flop 4 latches data at the falling edge of the initialization signal.

[0017]

As described in detail above, according to the present invention, by sharing the output terminal and the input terminal for the initialization data, it is possible to perform the external initialization without adding an external terminal. There is. Further, since the data to be set becomes valid immediately after the initialization is completed, there is an effect that the circuit can be activated immediately after the initialization is completed.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a timing chart for explaining the operation of the circuit shown in FIG.

[Explanation of symbols]

1 ... Delay circuit, 2 ... Internal circuit, 3 ... Bidirectional external buffer, 4 ... Flip-flop, 5 ... Pull-up resistor, 6 ...
Pull-down resistance.

Claims (2)

[Claims] 1. An internal circuit initialized by a predetermined initialization signal, a bidirectional external buffer connected to the output of the internal circuit and having two states of an input state and an output state, and the bidirectional external buffer. In the input state, a latch for latching the logic level externally set to the output terminal of the bidirectional external buffer as data at the transition edge from the active period to the inactive period of the initialization signal and outputting it to the internal circuit A circuit and switching means for holding the bidirectional external buffer in an input state for a predetermined period after the active period of the initialization signal and a transition from the active period to the inactive period, and thereafter switching to the output state. An electronic circuit characterized by. 2. The electronic circuit according to claim 1, wherein the initialization signal is generated in the circuit.